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21. 发明申请

US20070005888A1 Wide-port context cache apparatus, systems, and methods 有权
标题翻译：宽端口上下文缓存设备，系统和方法
公开(公告)号：US20070005888A1
公开(公告)日：2007-01-04
申请号：US11171960
申请日：2005-06-29
申请人： William Halleck , Pak-lung Seto , Victor Lau
发明人： William Halleck , Pak-lung Seto , Victor Lau
IPC分类号： G06F12/00 , G06F12/14
CPC分类号： G06F13/385 , G06F12/0875 , G06F12/0891 , G06F2212/303
摘要： Apparatus, systems, methods, and articles may operate to restrict an order of processing of frames associated with a task context stored in at least one context cache memory location. The order of processing may be restricted by selectively locking the context for exclusive use by a selected lane in a multi-lane serial-attached small computer system interface (SAS) hardware protocol engine while the selected lane processes a selected one of the frames.
摘要翻译：设备，系统，方法和文章可以操作以限制与存储在至少一个上下文高速缓冲存储器位置中的任务上下文相关联的帧的处理顺序。可以通过选择性地锁定在多通道串行连接的小型计算机系统接口（SAS）硬件协议引擎中的所选通道专用的上下文来处理处理的顺序，同时所选择的通道处理所选择的一个帧。

22. 发明授权

US08135869B2 Task scheduling to devices with same connection address 有权
标题翻译：任务调度到具有相同连接地址的设备
公开(公告)号：US08135869B2
公开(公告)日：2012-03-13
申请号：US11172776
申请日：2005-06-30
申请人： Naichih Chang , Victor Lau , Pak-lung Seto , William Halleck
发明人： Naichih Chang , Victor Lau , Pak-lung Seto , William Halleck
IPC分类号： G06F15/16 , H04B1/56
CPC分类号： G06F13/385
摘要： Methods of scheduling tasks in computer systems architectures are disclosed. In one aspect, a method may include comparing a connection address of a first node with a connection address of a second node, determining that the connection address of the first node matches the connection address of the second node, and scheduling tasks to the first and second nodes based, at least in part, on the determination. Apparatus to implement task scheduling, and systems including the apparatus are also disclosed.
摘要翻译：公开了在计算机系统架构中调度任务的方法。一方面，一种方法可以包括将第一节点的连接地址与第二节点的连接地址进行比较，确定第一节点的连接地址与第二节点的连接地址相匹配，并将任务调度到第一节点第二节点至少部分地基于确定。还公开了实现任务调度的装置和包括该装置的系统。

23. 发明授权

US07506080B2 Parallel processing of frame based data transfers 失效
标题翻译：基于帧的数据传输的并行处理
公开(公告)号：US07506080B2
公开(公告)日：2009-03-17
申请号：US11229100
申请日：2005-09-16
申请人： Victor Lau , Pak-lung Seto , Suresh Chemudupati , Naichih Chang , William Halleck
发明人： Victor Lau , Pak-lung Seto , Suresh Chemudupati , Naichih Chang , William Halleck
IPC分类号： G06F13/28 , G06F13/00 , H04L12/28 , H04L12/56
CPC分类号： H04L49/901 , G06F13/28 , H04L49/90
摘要： A frame based data transfer device includes a receive frame parser, a receive frame processor, and a DMA engine. The receive frame parser receives a frame, stores framing information from the frame in a receive header queue, and stores an information unit from the frame in an information unit buffer. The receive frame processor is coupled to the receive header queue. The receive frame processor reads a transport layer task context as determined by a tag field in the framing information, determines how to handle the frame from the transport layer task context and framing information, generates a DMA descriptor, and stores an updated transport layer task context. The DMA engine is coupled to the information unit buffer and receive frame processor. The DMA engine reads a DMA task context, transfers the information unit to a destination memory by processing the DMA descriptor, and stores an updated DMA task context.
摘要翻译：基于帧的数据传送设备包括接收帧解析器，接收帧处理器和DMA引擎。接收帧解析器接收帧，从帧中的成帧信息存储在接收头队列中，并将来自帧的信息单元存储在信息单元缓冲器中。接收帧处理器耦合到接收头部队列。接收帧处理器读取由成帧信息中的标签字段确定的传输层任务上下文，确定如何处理来自传输层任务上下文和成帧信息的帧，生成DMA描述符，并存储更新的传输层任务上下文。 DMA引擎耦合到信息单元缓冲器和接收帧处理器。 DMA引擎读取DMA任务上下文，通过处理DMA描述符将信息单元传送到目的地存储器，并存储更新的DMA任务上下文。

24. 发明申请

US20070006235A1 Task scheduling to devices with same connection address 有权
标题翻译：任务调度到具有相同连接地址的设备
公开(公告)号：US20070006235A1
公开(公告)日：2007-01-04
申请号：US11172776
申请日：2005-06-30
申请人： Naichih Chang , Victor Lau , Pak-lung Seto , William Halleck
发明人： Naichih Chang , Victor Lau , Pak-lung Seto , William Halleck
IPC分类号： G06F9/46
CPC分类号： G06F13/385
摘要： Methods of scheduling tasks in computer systems architectures are disclosed. In one aspect, a method may include comparing a connection address of a first node with a connection address of a second node, determining that the connection address of the first node matches the connection address of the second node, and scheduling tasks to the first and second nodes based, at least in part, on the determination. Apparatus to implement task scheduling, and systems including the apparatus are also disclosed.
摘要翻译：公开了在计算机系统架构中调度任务的方法。一方面，一种方法可以包括将第一节点的连接地址与第二节点的连接地址进行比较，确定第一节点的连接地址与第二节点的连接地址相匹配，并将任务调度到第一节点第二节点至少部分地基于确定。还公开了实现任务调度的装置和包括该装置的系统。

25. 发明授权

US07797463B2 Hardware assisted receive channel frame handling via data offset comparison in SAS SSP wide port applications 有权
标题翻译：通过SAS SSP宽端口应用中的数据偏移比较，硬件辅助接收信道帧处理
公开(公告)号：US07797463B2
公开(公告)日：2010-09-14
申请号：US11170851
申请日：2005-06-30
申请人： William Halleck , Pak-lung Seto , Victor Lau , Naichih Chang
发明人： William Halleck , Pak-lung Seto , Victor Lau , Naichih Chang
IPC分类号： G06F3/00 , G06F13/12 , H04J3/16
CPC分类号： G06F13/385 , H04L49/552
摘要： A device includes a task context controller, at least one transport engine connected to the task context controller, and at least one comparator connected to the transport engine. The comparator to compare a data offset from a receive frame with a current data offset and a result is used to determine frame processing order.
摘要翻译：设备包括任务上下文控制器，连接到任务上下文控制器的至少一个传输引擎和连接到传输引擎的至少一个比较器。用于将来自接收帧的数据偏移与当前数据偏移和结果进行比较的比较器用于确定帧处理顺序。

26. 发明申请

US20070067504A1 Parallel processing of frame based data transfers 失效
标题翻译：基于帧的数据传输的并行处理
公开(公告)号：US20070067504A1
公开(公告)日：2007-03-22
申请号：US11229100
申请日：2005-09-16
申请人： Victor Lau , Pak-lung Seto , Suresh Chemudupati , Naichih Chang , William Halleck
发明人： Victor Lau , Pak-lung Seto , Suresh Chemudupati , Naichih Chang , William Halleck
IPC分类号： G06F13/28
CPC分类号： H04L49/901 , G06F13/28 , H04L49/90
摘要： A frame based data transfer device includes a receive frame parser, a receive frame processor, and a DMA engine. The receive frame parser receives a frame, stores framing information from the frame in a receive header queue, and stores an information unit from the frame in an information unit buffer. The receive frame processor is coupled to the receive header queue. The receive frame processor reads a transport layer task context as determined by a tag field in the framing information, determines how to handle the frame from the transport layer task context and framing information, generates a DMA descriptor, and stores an updated transport layer task context. The DMA engine is coupled to the information unit buffer and receive frame processor. The DMA engine reads a DMA task context, transfers the information unit to a destination memory by processing the DMA descriptor, and stores an updated DMA task context.
摘要翻译：基于帧的数据传送设备包括接收帧解析器，接收帧处理器和DMA引擎。接收帧解析器接收帧，从帧中的成帧信息存储在接收头队列中，并将来自帧的信息单元存储在信息单元缓冲器中。接收帧处理器耦合到接收头部队列。接收帧处理器读取由成帧信息中的标签字段确定的传输层任务上下文，确定如何处理来自传输层任务上下文和成帧信息的帧，生成DMA描述符，并存储更新的传输层任务上下文。 DMA引擎耦合到信息单元缓冲器和接收帧处理器。 DMA引擎读取DMA任务上下文，通过处理DMA描述符将信息单元传送到目的地存储器，并存储更新的DMA任务上下文。

27. 发明申请

US20070005898A1 Method, apparatus and system for task context cache replacement 审中-公开
标题翻译：用于任务上下文缓存替换的方法，装置和系统
公开(公告)号：US20070005898A1
公开(公告)日：2007-01-04
申请号：US11170872
申请日：2005-06-30
申请人： William Halleck , Pak-lung Seto , Victor Lau , Naichih Chang
发明人： William Halleck , Pak-lung Seto , Victor Lau , Naichih Chang
IPC分类号： G06F12/00 , G06F12/14
CPC分类号： G06F12/126
摘要： A device includes a cache memory having a locked segment and an unlocked segment. A controller is connected to the cache memory. A method partitions a cache memory into context segments and associates a context entry with at least one of the context segments if a transport layer completes processing a frame for the context entry. The at least one segment is an unlocked context segment.
摘要翻译：一种设备包括具有锁定段和未锁定段的高速缓冲存储器。控制器连接到高速缓冲存储器。如果传输层完成处理上下文条目的帧，则方法将高速缓存存储器划分为上下文段并将上下文条目与上下文段中的至少一个相关联。所述至少一个段是未锁定的上下文段。

28. 发明申请

US20070073857A1 Remote node list searching mechanism for storage task scheduling 有权
标题翻译：用于存储任务调度的远程节点列表搜索机制
公开(公告)号：US20070073857A1
公开(公告)日：2007-03-29
申请号：US11237453
申请日：2005-09-27
申请人： Nai-Chih Chang , Pak-lung Seto
发明人： Nai-Chih Chang , Pak-lung Seto
IPC分类号： G06F15/173
CPC分类号： G06F3/0658 , G06F3/061 , G06F3/0676 , G06F9/4843 , H04L67/1097 , H04L69/32
摘要： According to one embodiment, a device is disclosed. The device includes a first protocol engine (PE) to process tasks to be forwarded to a first remote node, a remote node search unit (RNSU) having a three-dimensional (3-D) task list corresponding to tasks to be forwarded to the two or more sub-nodes, and a connection pointer to maintain a connection between the first PE and the first remote node.
摘要翻译：根据一个实施例，公开了一种装置。该设备包括用于处理要转发到第一远程节点的任务的第一协议引擎（PE），具有对应于要转发到第一远程节点的任务的三维（3-D）任务列表的远程节点搜索单元（RNSU）两个或多个子节点以及用于维护第一PE和第一远程节点之间的连接的连接指针。

29. 发明授权

US07450588B2 Storage network out of order packet reordering mechanism 有权
公开(公告)号：US07450588B2
公开(公告)日：2008-11-11
申请号：US11510109
申请日：2006-08-24
申请人： Nai-Chih Chang , Pak-lung Seto
发明人： Nai-Chih Chang , Pak-lung Seto
IPC分类号： H04L12/28 , H04L12/56 , G06F3/00
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0676 , H04L47/10
摘要： According to one embodiment, a system is disclosed. The system includes an input/output (IO) frame manager (IOFM) to route received IO frames to one or more IO lists and one or more IO frame order managers (IOFOMs) to reorder frames received for each IO list according to a relative order.

30. 发明申请

US20080126608A1 Storage network out of order packet reordering mechanism 有权
标题翻译：存储网络故障分组重排序机制
公开(公告)号：US20080126608A1
公开(公告)日：2008-05-29
申请号：US11510109
申请日：2006-08-24
申请人： Nai-Chih Chang , Pak-lung Seto
发明人： Nai-Chih Chang , Pak-lung Seto
IPC分类号： G06F3/00
CPC分类号： G06F3/0659 , G06F3/0613 , G06F3/0676 , H04L47/10
摘要： According to one embodiment, a system is disclosed. The system includes an input/output (IO) frame manager (IOFM) to route received IO frames to one or more IO lists and one or more IO frame order managers (IOFOMs) to reorder frames received for each IO list according to a relative order.
摘要翻译：根据一个实施例，公开了一种系统。该系统包括用于将接收到的IO帧路由到一个或多个IO列表的输入/输出（IO）帧管理器（IOFM）和一个或多个IO帧顺序管理器（IOFOM），以根据相对顺序重新排序为每个IO列表接收的帧。

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