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21. 发明申请

US20050007492A1 Equilibrium based vertical sync phase lock loop for video decoder 有权
标题翻译：用于视频解码器的基于平衡的垂直同步锁相环
公开(公告)号：US20050007492A1
公开(公告)日：2005-01-13
申请号：US10616754
申请日：2003-07-10
申请人： Karl Renner , Walter Demmer
发明人： Karl Renner , Walter Demmer
IPC分类号： H03L7/00 , H03L7/099 , H04N5/12
CPC分类号： H04N5/126 , H03L7/0991
摘要： The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92), a loop filter (94), a vertical sync discrete time oscillator (DTO) (98), and an output logic (100) adapted to detect a vertical sync (222), wherein the loop filter (94), the vertical sync DTO (98), and the output logic (100) are coupled to the sync detector (92).
摘要翻译：本发明公开了一种PLL（90），其可以以软件，硬件或软件和硬件的组合来实现，其包括同步检测器（92），环路滤波器（94），垂直同步离散时间振荡器 DTO）（98）和适于检测垂直同步（222）的输出逻辑（100），其中环路滤波器（94），垂直同步DTO（98）和输出逻辑（100）耦合到同步检测器（92）。

22. 发明授权

US06459457B1 Adaptive color comb filter 有权
标题翻译：自适应彩梳滤波器
公开(公告)号：US06459457B1
公开(公告)日：2002-10-01
申请号：US09467953
申请日：1999-12-21
申请人： Karl Renner , Weider Peter Chang , Walter Demmer
发明人： Karl Renner , Weider Peter Chang , Walter Demmer
IPC分类号： H04N978
CPC分类号： H04N9/642 , H04N9/78
摘要： A color comb filter (46), video decoder (40) and method for separating chroma (U,V) and luma (Y) signals from a composite video signal (41). The comb filter (46) includes circuitry (48) for generating color filter selections for filtering a chroma video signal (41) and control logic (62) for determining the filter selections based on color boundary properties of the chroma video signal (U,V). The video decoder (40) includes a comb filter (46), a demodulator (42), low pass filter (44), a remodulator (48) and a subtractor (50). The filtered, remodulated chroma signal (Uout,Vout) is subtracted from the composite video signal (41) to produce a luma signal absent hanging dots and false colors.
摘要翻译：彩色梳状滤波器（46），视频解码器（40）和用于从复合视频信号（41）分离色度（U，V）和亮度（Y）信号的方法。梳状滤波器（46）包括用于产生用于滤除色度视频信号（41）的滤色器选择的电路（48）和用于基于色度视频信号（U，V）的颜色边界属性确定滤波器选择的控制逻辑）。视频解码器（40）包括梳状滤波器（46），解调器（42），低通滤波器（44），再调制器（48）和减法器（50）。从复合视频信号（41）中减去经滤波的重新调制的色度信号（Uout，Vout）以产生没有悬点和假色的亮度信号。

23. 发明授权

US06317161B1 Horizontal phase-locked loop for video decoder 有权
标题翻译：视频解码器的水平锁相环
公开(公告)号：US06317161B1
公开(公告)日：2001-11-13
申请号：US09218835
申请日：1998-12-22
申请人： Karl Renner , Weider P. Chang
发明人： Karl Renner , Weider P. Chang
IPC分类号： H03L700
CPC分类号： H04N5/455 , H03L7/07 , H03L7/087 , H03L7/0994 , H04N5/126 , H04N9/44 , H04N9/45 , H04N9/641
摘要： A phase-locked loop is provided which is operable to lock the sampling clock (pixel clock) to the incoming horizontal sync pulse contained within composite video information. Two modes of operation, coarse lock mode and fine lock mode, are used in controlling the phase-locked loop. In the coarse lock mode, coarse corrections are made to a horizontal discrete time oscillator so that a fast lock may be achieve using the fine lock mode. Coarse corrections are based on a normalized sum of weighted pixels collected within a narrow gate window. Lock is achieved when the falling edge is centered within the window.
摘要翻译：提供锁相环，其可操作以将采样时钟（像素时钟）锁定到包含在复合视频信息内的输入水平同步脉冲。使用两种操作模式，粗锁模式和精密锁定模式，用于控制锁相环。在粗略锁定模式下，对水平离散时间振荡器进行粗略校正，以便可以使用精细锁定模式实现快速锁定。粗校正基于在窄门窗内收集的加权像素的归一化和。当下降边缘在窗口中央时，实现锁定。

24. 发明授权

US07453525B2 Motion detector for a video display system 有权
标题翻译：用于视频显示系统的运动检测器
公开(公告)号：US07453525B2
公开(公告)日：2008-11-18
申请号：US11135799
申请日：2005-05-24
申请人： Karl Renner , Weider Peter Chang , Ramesh M. Chandrasekaran
发明人： Karl Renner , Weider Peter Chang , Ramesh M. Chandrasekaran
IPC分类号： H04N9/78 , H04N5/14
CPC分类号： H04N11/146 , H04N5/145 , H04N9/66 , H04N9/77 , H04N9/78 , H04N11/165
摘要： Systems and methods are provided for detecting motion within a composite video signal. A first chroma difference element compares an in-phase chroma component of the composite video signal to a delayed representation of the in-phase chroma component to produce a first chroma difference value for a given pixel. A second chroma difference element compares a quadrature chroma component of the composite video signal to a delayed representation of the quadrature chroma component to produce a second chroma difference value for the pixel. A parameter mapping component maps the first and second difference values to respective first and second motion parameters that indicates the degree of change in the chroma properties of the pixel. A parameter selector determines a composite motion parameter for the pixel from the first and second motion parameters.
摘要翻译：提供用于检测复合视频信号内的运动的系统和方法。第一色差元件将复合视频信号的同相色度分量与同相色度分量的延迟表示进行比较，以产生给定像素的第一色度差值。第二色差元件将复合视频信号的正交色度分量与正交色度分量的延迟表示进行比较，以产生像素的第二色度差值。参数映射组件将第一和第二差分值映射到指示像素的色度特性的变化程度的相应的第一和第二运动参数。参数选择器从第一和第二运动参数确定像素的复合运动参数。

25. 发明授权

US07274406B2 Equilibrium based vertical sync phase lock loop for video decoder 有权
标题翻译：用于视频解码器的基于平衡的垂直同步锁相环
公开(公告)号：US07274406B2
公开(公告)日：2007-09-25
申请号：US10713714
申请日：2003-11-14
申请人： Karl Renner , Walter Heinrich Demmer
发明人： Karl Renner , Walter Heinrich Demmer
IPC分类号： H03L7/00 , H04N5/10
CPC分类号： H03L7/0991 , H04N5/126
摘要： The present invention discloses a PLL (90), which may be implemented in software, hardware, or a combination of software and hardware, which comprises a sync detector (92) adapted to output a phase error (152), a vertical sync discrete time oscillator (DTO) block (98) adapted to output a vertical sync DTO (130) based on the phase error (152), and an output logic (100) adapted to detect a vertical sync based on the vertical sync DTO (130).
摘要翻译：本发明公开了一种PLL（90），其可以以软件，硬件或软件和硬件的组合来实现，其包括适于输出相位误差（152）的同步检测器（92），垂直同步离散时间适于基于相位误差（152）输出垂直同步DTO（130）的振荡器（DTO）块（98），以及适于基于垂直同步DTO检测垂直同步的输出逻辑（130）（130）。

26. 发明授权

US06912012B2 Video decoder having lock algorithm that distinguishes between a noisy television signal input and a video recorder signal 有权
标题翻译：视频解码器具有用于区分噪声电视信号输入和录像机信号的锁定算法
公开(公告)号：US06912012B2
公开(公告)日：2005-06-28
申请号：US10196499
申请日：2002-07-16
申请人： Karl Renner , Walter Demmer
发明人： Karl Renner , Walter Demmer
IPC分类号： H03L7/081 , H03L7/087 , H03L7/091 , H04N5/12 , H04N5/46 , H04N9/64 , H04N5/04 , H04N5/05 , H04N9/44
CPC分类号： H04N5/126 , H03L7/0814 , H03L7/087 , H03L7/091 , H04N5/46 , H04N9/641
摘要： A phase-locked loop is provided which is operable to lock the sampling clock (pixel clock) to the incoming horizontal sync pulse contained within composite video information. Given the input signal is a VCR signal or a normal noise-free signal, there exists two modes of operation, coarse lock mode and fine lock mode, which are used in controlling the phase-locked loop. In the coarse lock mode, coarse corrections are made to a horizontal discrete time oscillator so that a fast lock may be achieve using the fine lock mode. Coarse corrections are based on a normalized sum of weighted pixels collected within a narrow gate window. Lock is achieved when the falling edge is centered within the window. Given the input signal is a television signal having noise, there exists one mode of operation where the flat window phase detector is used instead of coarse lock mode to bring the sync edge to fall within the window, where the flat window normalization constant is tuned.
摘要翻译：提供锁相环，其可操作以将采样时钟（像素时钟）锁定到包含在复合视频信息内的输入水平同步脉冲。给定输入信号是VCR信号或正常无噪声信号，存在两种操作模式，粗锁模式和精密锁定模式，用于控制锁相环。在粗略锁定模式下，对水平离散时间振荡器进行粗略校正，以便可以使用精细锁定模式实现快速锁定。粗校正基于在窄门窗内收集的加权像素的归一化和。当下降边缘在窗口中央时，实现锁定。给定输入信号是具有噪声的电视信号，存在一种操作模式，其中使用平面窗口相位检测器而不是粗略锁定模式以使同步边缘落入窗口内，其中调整平面窗口归一化常数。

27. 发明授权

US06839092B2 Feed forward error correction in video decoder 有权
标题翻译：视频解码器中的前馈纠错
公开(公告)号：US06839092B2
公开(公告)日：2005-01-04
申请号：US09849330
申请日：2001-05-04
申请人： Karl Renner
发明人： Karl Renner
IPC分类号： H04N5/12 , H03L7/07 , H03L7/099 , H04N9/45 , H04N9/445
CPC分类号： H03L7/07 , H03L7/0805 , H03L7/0994 , H04N5/126 , H04N9/45
摘要： In accordance with an embodiment of the present invention a microprocessor in the horizontal phased lock loop reads the horizontal timing with respect to the sync input and provides an increment inch to the horizontal discrete time oscillator to make corrections in its timing to maintain lock to the sync input. The horizontal discrete time oscillator output is used to produce a pixel clock which drives the color discrete time oscillator in a color phased locked loop. A microprocessor reads a phase error between the color burst input and the color local oscillator frequency and writes an increment incsc to the color discrete time oscillator to maintain lock to the color burst. The horizontal phase locked loop adjusts inch that varies about nominal increment (nom_inch) by Δh. The feed forward error correction for the adjustment to the color discrete time oscillator is the nomimal increment (nom_incsc) and a feed forwarded scaled version of Δh.
摘要翻译：根据本发明的实施例，水平定相锁定环路中的微处理器读取相对于同步输入的水平定时，并向水平离散时间振荡器提供增量英寸以对其定时进行校正以维持对同步的锁定输入。水平离散时间振荡器输出用于产生在彩色锁相环中驱动彩色离散时间振荡器的像素时钟。微处理器读出色同步输入和彩色本地振荡器频率之间的相位误差，并向色离散时间振荡器写入增量incsc以保持锁定到色同步信号。水平锁相环调整由Deltah变化的名义增量（nom_inch）的英寸。用于调整色彩离散时间振荡器的前馈误差校正是Deltah的额定增量（nom_incsc）和馈送转发缩放版本。

28. 发明授权

US06330034B1 Color phase-locked loop for video decoder 有权
标题翻译：彩色锁相环视频解码器
公开(公告)号：US06330034B1
公开(公告)日：2001-12-11
申请号：US09183243
申请日：1998-10-30
申请人： Karl Renner , Peter Chang
发明人： Karl Renner , Peter Chang
IPC分类号： H04N945
CPC分类号： H03L7/087 , H03L7/0994 , H04N9/45
摘要： A microprocessor controlled color phase locked loop is provided which provides flexibility and adaptability for different television standards and sampling rates. Color burst phase error and color burst amplitude information are stored in data registers located at the output of the phase locked loop's low pass filter rather than at the output of the color demodulator.
摘要翻译：提供微处理器控制的彩色锁相环，为不同的电视标准和采样率提供灵活性和适应性。颜色突发相位误差和色同步脉冲幅度信息存储在位于锁相环低通滤波器输出端的数据寄存器中，而不是在彩色解调器的输出端。

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