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21. 发明授权

US09352993B2 Method of operating steam boiler 有权
标题翻译：蒸汽锅炉的运行方法
公开(公告)号：US09352993B2
公开(公告)日：2016-05-31
申请号：US13049493
申请日：2011-03-16
申请人： Junichi Nakajima , Junichi Kato , Hiroyuki Mitsumoto , Yoshiro Kaminokado , Takashi Ninomiya
发明人： Junichi Nakajima , Junichi Kato , Hiroyuki Mitsumoto , Yoshiro Kaminokado , Takashi Ninomiya
IPC分类号： F22B37/48 , C02F5/08 , C02F5/00 , C02F5/12 , C23F14/02 , F22B1/18 , C02F1/50 , C01D1/04 , C01B33/113 , H04N1/387 , H04N1/04 , F22B35/10
CPC分类号： C02F5/125 , C02F2209/06 , C02F2303/08 , F22B35/10 , F22B37/48
摘要： Boiler water is heated in a steam boiler while feed water, which has a hardness of 5 mg CaCO3/L or less and is used as the boiler water, is supplied to the steam boiler. A part of the boiler water is appropriately disposed of. A chemical aqueous solution containing an alkaline metal silicate, an alkaline metal hydroxide and at least one kind of scale preventive agents of ethylenediamine tetraacetate, and its alkaline metal salt, is supplied to the feed water so that a concentration of the scale preventive agent is at least 1.5 mol equivalent times relative to the hardness of the feed water. In the steam boiler, a condensation rate of the boiler water is set so that the concentration of the scale preventive agent in the boiler water is 40 mg EDTA/L or less.
摘要翻译：锅炉水在蒸汽锅炉中进行加热，同时将具有5mg CaCO3 / L或更低的硬度并用作锅炉水的给水供应给蒸汽锅炉。一部分锅炉水被适当处理。将含有碱金属硅酸盐，碱金属氢氧化物和至少一种乙二胺四乙酸盐的防垢剂及其碱金属盐的化学水溶液供给给水，使防垢剂的浓度在相对于给水的硬度至少为1.5摩尔当量。在蒸汽锅炉中，锅炉水的冷凝速率设定为锅炉水中防垢剂的浓度为40mg EDTA / L以下。

22. 发明申请

US20130008508A1 LIGHT ABSORBING MATERIAL AND PHOTOELECTRIC CONVERSION ELEMENT 审中-公开
标题翻译：光吸收材料和光电转换元件
公开(公告)号：US20130008508A1
公开(公告)日：2013-01-10
申请号：US13635647
申请日：2011-03-16
申请人： Saki Sonoda , Junichi Kato , Osamu Kawasaki , Mutsuo Takenaga
发明人： Saki Sonoda , Junichi Kato , Osamu Kawasaki , Mutsuo Takenaga
IPC分类号： H01L31/0304
CPC分类号： H01L31/03044 , H01L31/1035 , H01L31/1848 , H01L31/1852 , Y02E10/544
摘要： A new light-absorbing material which can increase the conversion efficiency of a solar cell and a photoelectric conversion element using same are provided. The light-absorbing material of the present invention comprises a nitride-based compound semiconductor obtained by replacement of part of Al and/or Ga in a compound semiconductor expressed by a general formula Al1−yGayN (0≦y≦1) by at least one kind of 3d-transition metals, the nitride-based compound semiconductor having one or more impurity bands between a valence band and a conduction band, and whose light absorption coefficient over an overall wavelength region of not longer than 1500 nm and not shorter than 300 being not lower than 1000 cm−1.
摘要翻译：提供了可以提高太阳能电池的转换效率和使用其的光电转换元件的新的光吸收材料。本发明的光吸收材料包括通过将由通式Al1-yGayN（0＆nlE; y＆nlE; 1）表示的化合物半导体中的Al和/或Ga的一部分置换至少一种而获得的氮化物系化合物半导体一种3d-过渡金属，在价带和导带之间具有一个或多个杂质带的氮化物基化合物半导体，并且在不超过1500nm且不小于300的总波长区域上的光吸收系数为不低于1000厘米-1。

23. 外观设计

USD583476S1 Plug for blood pressure measuring apparatus 有权
标题翻译：血压测量仪插头
公开(公告)号：USD583476S1
公开(公告)日：2008-12-23
申请号：US29288902
申请日：2007-06-26
申请人： Junichi Kato
设计人： Junichi Kato

24. 发明授权

US06998561B2 Wire electric discharge machine 有权
标题翻译：线放电机
公开(公告)号：US06998561B2
公开(公告)日：2006-02-14
申请号：US10689634
申请日：2003-10-22
申请人： Junichi Kato , Keiichiro Miyajima , Yasuo Arakawa , Toshiyuki Ogata
发明人： Junichi Kato , Keiichiro Miyajima , Yasuo Arakawa , Toshiyuki Ogata
IPC分类号： B23H7/06
CPC分类号： B23H7/065 , B23H2500/20
摘要： A wire electric discharge machine capable of preventing a straightness error from being caused by consumption of a wire electrode, to eliminate insufficient machining. A correction angle φ is predetermined for preventing the straightness error of the workpiece due to consumption. Correction amounts d1′, d2′ on a program plane and an upper surface of a workpiece, respectively, are determined based on the predetermined correction angle φ, and are added to or substracted from a predetermined offset amount depending on a wire electrode radius and an electric discharging gap, to determine corrected offset amounts d1, d2 on the program plane and the upper surface of the workpiece, respectively. Correction amounts dlo, dup for lower and upper wire guides in an offset direction are obtained based on the corrected offset amounts d1, d2, respectively, so that motion paths of upper and lower wire guides relative to the workpiece are determined.
摘要翻译：一种能够防止线电极消耗引起的平直度误差的电线放电机，消除不充分的加工。为了防止由于消耗引起的工件的直线度误差，修正角度φi是预定的。基于预定的校正角度phi来确定编程平面和工件的上表面上的校正量d 1'，d 2'，并且根据线电极半径和放电间隙，以分别确定编程平面和工件的上表面上的校正偏移量d 1，d 2。基于校正的偏移量d 1，d 2分别获得偏移方向上下导线器的修正量dlo，dup，从而确定上，下导线器相对于工件的运动路径。

25. 发明申请

US20050276103A1 Non-volatile semiconductor memory device 有权
标题翻译：非易失性半导体存储器件
公开(公告)号：US20050276103A1
公开(公告)日：2005-12-15
申请号：US11143581
申请日：2005-06-03
申请人： Junichi Kato , Masayoshi Nakayama , Takao Ozeki , Asako Miyoshi , Shinichi Hatakeyama
发明人： Junichi Kato , Masayoshi Nakayama , Takao Ozeki , Asako Miyoshi , Shinichi Hatakeyama
IPC分类号： G11C11/34 , G11C14/00 , G11C16/04
CPC分类号： G11C14/00 , G11C16/0441
摘要： A switch section connects a first wire line aSL to the gate of a first memory transistor 1 and the source of a second memory transistor 2 and a second wire line bSL to the source of the first memory transistor 1 and the gate of the second memory transistor 2 when first type data is to be written into a memory cell; and connects the first wire line aSL to the source of the first memory transistor 1 and the gate of the second memory transistor 2 and the second wire line bSL to the gate of the first memory transistor 1 and the source of the second memory transistor 2 when second type data is to be written into a memory cell.
摘要翻译：开关部分将第一有线线路aSL连接到第一存储晶体管1的栅极和第二存储晶体管2的源极和第二有线线路bSL连接到第一存储晶体管1的源极和第二存储晶体管的栅极当第一类数据被写入存储单元时; 并且将第一有线线路aSL连接到第一存储晶体管1的源极和第二存储晶体管2的栅极和第二有线线路bSL到第一存储晶体管1的栅极和第二存储晶体管2的源极，第二类型数据将被写入存储单元。

26. 发明授权

US06888435B2 Composite magnetic body, and magnetic element and method of manufacturing the same 有权
标题翻译：复合磁体，磁性元件及其制造方法
公开(公告)号：US06888435B2
公开(公告)日：2005-05-03
申请号：US10843007
申请日：2004-05-11
申请人： Osamu Inoue , Junichi Kato , Nobuya Matsutani , Hiroshi Fujii , Takeshi Takahashi
发明人： Osamu Inoue , Junichi Kato , Nobuya Matsutani , Hiroshi Fujii , Takeshi Takahashi
IPC分类号： H01F1/24 , H01F1/26 , H01F1/28 , H01F1/33 , H01F17/04 , H01F27/02 , H01F41/02 , H01F41/12
CPC分类号： H01F41/127 , H01F1/24 , H01F1/26 , H01F1/28 , H01F17/04 , H01F27/027 , H01F27/292 , H01F41/0246 , Y10S156/922 , Y10T29/49002 , Y10T29/4902 , Y10T29/49021 , Y10T29/49071 , Y10T29/49073 , Y10T29/49158 , Y10T29/49172 , Y10T29/49176 , Y10T29/4922 , Y10T29/49261 , Y10T29/49277 , Y10T156/1082 , Y10T156/11 , Y10T428/11 , Y10T428/32
摘要： The present invention provides a composite magnetic body containing metallic magnetic powder and thermosetting resin and having a packing ratio of the metallic magnetic powder of 65 vol % to 90 vol % and an electrical resistivity of at least 104 Ω·cm. When a coil is embedded in this composite magnetic body, a miniature magnetic element can be obtained that has a high inductance value and is excellent in DC bias characteristics.
摘要翻译：本发明提供一种复合磁体，其含有金属磁性粉末和热固性树脂，其金属磁性粉末的填充率为65体积％〜90体积％，电阻率为至少10体积％。厘米。当将该线圈嵌入该复合磁体时，可以得到具有高电感值且DC偏置特性优异的微型磁性元件。

27. 发明授权

US06835681B2 Dielectric ceramic composition and dielectric device 失效
标题翻译：介电陶瓷组合物和电介质器件
公开(公告)号：US06835681B2
公开(公告)日：2004-12-28
申请号：US10027620
申请日：2001-12-19
申请人： Kojiro Okuyama , Hiroshi Kagata , Junichi Kato , Hiroyuki Hase
发明人： Kojiro Okuyama , Hiroshi Kagata , Junichi Kato , Hiroyuki Hase
IPC分类号： C03C1400
CPC分类号： H01P1/20345 , C03C8/18 , C03C8/20 , C03C14/004 , C04B35/49 , H01G4/1245 , H01G4/1263 , H01G4/129
摘要： A dielectric ceramic composition containing a first component and a second component (25 to 80 wt %) is used. The first component is a complex oxide represented by Formula: xZrO2-yTiO2-zL(1+u)/3M(2−u)/3O2 (L is at least one element selected from the group consisting of Mg, Zn, Co, and Mn, and M is at least one element selected from the group consisting of Nb and Tb. x, y, z, and u are numerical values represented by x+y+z=1, 0.10≦x≦0.60, 0.20 ≦y≦0.60, 0.01≦z≦0.70, 0≦u≦1.90). The second component is a glass composition containing an oxide of at least one element selected from the group consisting of Si, B, Al, Ba, Ca, Sr, Zn, Ti, La, and Nd.
摘要翻译：使用含有第一成分和第二成分（25〜80重量％）的电介质陶瓷组合物。第一组分是由下式表示的复合氧化物：xZrO2-yTiO2-zL（1 + u）/ 3M（2-u）/ 3O2（L是选自Mg，Zn，Co和 Mn和M是选自Nb和Tb中的至少一种元素，x，y，z，u是由x + y + z = 1，0.10 <= x <= 0.60,0.20， = y <= 0.60,0.01 <= z <= 0.70,0 <= u <= 1.90）。第二组分是含有选自Si，B，Al，Ba，Ca，Sr，Zn，Ti，La和Nd中的至少一种元素的氧化物的玻璃组合物。

28. 发明授权

US06706965B2 Device for deterring cable displacement 失效
标题翻译：用于阻止电缆位移的装置
公开(公告)号：US06706965B2
公开(公告)日：2004-03-16
申请号：US10078312
申请日：2002-02-15
申请人： Junichi Kato , Renato Ravanello
发明人： Junichi Kato , Renato Ravanello
IPC分类号： H01B734
CPC分类号： H01R4/726 , H01R13/5216
摘要： A device for deterring displacement of a cable is effectuated in an embodiment of the invention by an enclosure that envelopes the cable and an affixing mechanism that couples the enclosure to the cable, where the cable is oriented in an assembly such that the enclosure contacts a feature internal to the assembly and deters displacement of the cable.
摘要翻译：用于阻止电缆的位移的装置在本发明的实施例中通过包围电缆的外壳和将外壳耦合到电缆的固定机构来实现，其中电缆被定位在组件中，使得外壳接触特征在组件内部并阻止电缆的位移。

29. 发明授权

US06380585B1 Nonvolatile semiconductor device capable of increased electron injection efficiency 失效
标题翻译：能够提高电子注入效率的非易失性半导体器件
公开(公告)号：US06380585B1
公开(公告)日：2002-04-30
申请号：US09588308
申请日：2000-06-06
申请人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
发明人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
IPC分类号： H01L29788
CPC分类号： H01L29/66825 , H01L29/42324 , H01L29/7885
摘要： The nonvolatile semiconductor memory device of the present invention includes: a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together; a channel region formed in the first surface region of the semiconductor substrate; a source region and a drain region which are formed in the surface of the semiconductor substrate so as to interpose the channel region therebetween; a first insulating film formed on the surface of the semiconductor substrate; a floating gate formed on the first insulating film; a second insulating film formed on the floating gate; and a control gate which is capacitively coupled to the floating gate via the second insulating film. The drain region includes a low-concentration impurity layer which is formed in the second surface region and which has one end extending toward the step side region, and a high-concentration impurity layer which is connected to the low-concentration impurity layer and which is formed in a region distant from the channel region. As impurity concentration of the low-concentration impurity layer is lower than an impurity concentration of the high-concentration impurity layer. The floating gate covers the step side region and at least a part of the low-concentration impurity layer via the first insulating film.
摘要翻译：本发明的非易失性半导体存储器件包括：半导体衬底，具有包括第一层的第一表面区域，低于第一层次的第二层的第二表面区域和将第一表面区域和第二表面区域在一起; 形成在所述半导体衬底的所述第一表面区域中的沟道区; 源极区域和漏极区域，其形成在半导体衬底的表面中，以便在其间插入沟道区域; 形成在所述半导体衬底的表面上的第一绝缘膜; 形成在第一绝缘膜上的浮栅; 形成在浮动栅极上的第二绝缘膜; 以及通过第二绝缘膜电容耦合到浮动栅极的控制栅极。漏区包括形成在第二表面区域中并且具有朝向台阶侧区域延伸的一端的低浓度杂质层和连接到低浓度杂质层的高浓度杂质层，形成在远离通道区域的区域中。由于低浓度杂质层的杂质浓度低于高浓度杂质层的杂质浓度。浮置栅极经由第一绝缘膜覆盖台阶侧区域和至少一部分低浓度杂质层。

30. 发明授权

US06358799B2 Nonvolatile semiconductor memory device and method for fabricating the same, and semiconductor integrated circuit device 失效
标题翻译：非易失性半导体存储器件及其制造方法以及半导体集成电路器件
公开(公告)号：US06358799B2
公开(公告)日：2002-03-19
申请号：US09727536
申请日：2000-12-04
申请人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
发明人： Shinji Odanaka , Kaori Akamatsu , Junichi Kato , Atsushi Hori , Seiki Ogura
IPC分类号： H01L21336
CPC分类号： H01L29/66825 , H01L21/28273 , H01L29/42324 , H01L29/7885
摘要： In a semiconductor substrate having a surface including a first surface region at a first level, a second surface region at a second level lower than the first level, and a step side region linking the first surface region and the second surface region together, a channel region has a triple structure. Thus, a high electric field is formed in a corner portion between the step side region and the second surface region and in the vicinity thereof. A high electric field is also formed in the first surface region. As a result, the efficiency, with which electrons are injected into a floating gate, is considerably increased.
摘要翻译：在具有包括第一水平的第一表面区域的表面的半导体衬底中，具有低于第一水平的第二水平的第二表面区域和将第一表面区域和第二表面区域连接在一起的阶梯侧区域，通道区域有三重结构。因此，在台阶侧区域和第二表面区域之间的角部及其附近形成高电场。在第一表面区域也形成高电场。结果，电子注入浮栅的效率大大增加。

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