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21. 发明授权

US5729423A Puncture resistant electrostatic chuck 失效
公开(公告)号：US5729423A
公开(公告)日：1998-03-17
申请号：US755716
申请日：1996-11-25
申请人： Arik Donde , Hyman J. Levinstein , Robert W. Wu , Andreas Hegedus , Edwin C. Weldon , Shamouil Shamouilian , Jon T. Clinton , Surinder S. Bedi
发明人： Arik Donde , Hyman J. Levinstein , Robert W. Wu , Andreas Hegedus , Edwin C. Weldon , Shamouil Shamouilian , Jon T. Clinton , Surinder S. Bedi
IPC分类号： B23Q3/15 , H01L21/683 , H02N13/00
CPC分类号： H01L21/6831 , H01L21/6833 , H02N13/00 , Y10T279/23
摘要： A puncture resistant electrostatic chuck (20) is described. The chuck (20) comprises at least one electrode (25); and a composite insulator (30) covering the electrode. The composite insulator comprises a matrix material having a conformal holding surface (50) capable of conforming to the substrate (35) under application of an electrostatic force generated by the electrode to reduce leakage of heat transfer fluid held between the substrate and the holding surface. A hard puncture resistant layer, such a layer of fibers or an aromatic polyamide layer, is positioned below the holding surface (50) and is sufficiently hard to increase the puncture resistance of the composite insulator.

22. 发明授权

US4522842A Boron nitride X-ray masks with controlled stress 失效
标题翻译：具有受控应力的氮化硼X射线掩模
公开(公告)号：US4522842A
公开(公告)日：1985-06-11
申请号：US416290
申请日：1982-09-09
申请人： Hyman J. Levinstein , Shyam P. Murarka , David S. Williams
发明人： Hyman J. Levinstein , Shyam P. Murarka , David S. Williams
IPC分类号： C23C16/56 , G03F1/22 , B05D5/00
CPC分类号： G03F1/22 , C23C16/56
摘要： It has been found that stress in X-ray transparent films used to form masks for X-ray lithography also cause distortions of the film and of the high-resolution X-ray-absorptive pattern formed thereon. A method is disclosed which anneals boron nitride films for use in X-ray masks in such a way as to control stress.
摘要翻译：已经发现，用于形成用于X射线光刻的掩模的X射线透明膜中的应力也引起膜上形成的高分辨率X射线吸收图案的变形。公开了一种以控制应力的方式退火用于X射线掩模的氮化硼膜的方法。

23. 发明授权

US4419201A Apparatus and method for plasma-assisted etching of wafers 失效
标题翻译：用于等离子体辅助蚀刻晶片的装置和方法
公开(公告)号：US4419201A
公开(公告)日：1983-12-06
申请号：US295531
申请日：1981-08-24
申请人： Hyman J. Levinstein , Frederick Vratny
发明人： Hyman J. Levinstein , Frederick Vratny
IPC分类号： H01J37/32 , H01J37/34 , H01L21/02 , H01L21/3213 , C23C15/00
CPC分类号： H01L21/02071 , H01J37/32559 , H01J37/34 , H01L21/32137 , H01J2237/20 , Y10S156/914 , Y10S156/917
摘要： In a plasma-assisted etching apparatus and method designed to pattern aluminum or polysilicon, surfaces in the reaction chamber are coated with a layer of aluminum oxide. Contamination of wafers during the etching process is thereby substantially reduced. In practice, this leads to a significant increase in the yield of acceptable chips per wafer.
摘要翻译：在等离子体辅助蚀刻装置和设计用于图案化铝或多晶硅的方法中，反应室中的表面涂覆有一层氧化铝。因此，在蚀刻过程中晶片的污染因此显着降低。在实践中，这导致每个晶片可接受的芯片的产量显着增加。

24. 发明授权

US4149905A Method of limiting stacking faults in oxidized silicon wafers 失效
标题翻译：限制氧化硅片堆垛层错的方法
公开(公告)号：US4149905A
公开(公告)日：1979-04-17
申请号：US864379
申请日：1977-12-27
申请人： Hyman J. Levinstein , Robert B. Marcus , Shyam P. Murarka , Richard S. Wagner
发明人： Hyman J. Levinstein , Robert B. Marcus , Shyam P. Murarka , Richard S. Wagner
IPC分类号： H01L21/02 , H01L21/306 , H01L21/316 , H01L21/322
CPC分类号： H01L21/02054 , H01L21/02046 , H01L21/02238 , H01L21/02255 , H01L21/02312 , H01L21/31662 , Y10S148/024
摘要： Many of the stacking faults which occur after oxidation of silicon wafers are substantially eliminated by the use of an argon-hydrochloric anneal of the wafers just prior to oxidation. This anneal, which is carried out in the same chamber in which oxidation is carried out, removes impurities from the surface of the wafers and thereby limits the sites at which stacking faults form after oxidation.
摘要翻译：在硅晶片的氧化之后发生的许多层叠缺陷通过在氧化之前使用晶片的氩 - 盐酸退火基本上消除。在进行氧化的同一室中进行的退火从晶片的表面去除杂质，从而限制了在氧化后形成堆垛层错的位置。

25. 发明授权

US5753132A Method of making electrostatic chuck with conformal insulator film 失效
标题翻译：用保形绝缘膜制作静电卡盘的方法
公开(公告)号：US5753132A
公开(公告)日：1998-05-19
申请号：US725482
申请日：1996-10-04
申请人： Shamouil Shamouilian , Sasson Somekh , Hyman J. Levinstein , Manoocher Birang , Semyon Sherstinsky , John F. Cameron
发明人： Shamouil Shamouilian , Sasson Somekh , Hyman J. Levinstein , Manoocher Birang , Semyon Sherstinsky , John F. Cameron
IPC分类号： B23Q3/15 , H01L21/683 , H02N13/00 , B44C1/22
CPC分类号： H01L21/6831 , H01L21/6833 , H02N13/00
摘要： A process for fabricating an electrostatic chuck (20) comprising the steps of (c) forming a base (80) having an upper surface with cooling grooves (85) therein, the grooves sized and distributed for holding a coolant therein for cooling the base; and (d) pressure conforming an electrical insulator layer (45) to the grooves on the base by the steps of (i) placing the base into a pressure forming apparatus (25) and applying an electrical insulator layer over the grooves in the base; and (ii) applying a sufficiently high pressure onto the insulator layer to pressure conform the insulator layer to the grooves to form a substantially continuous layer of electrical insulator conformal to the grooves on the base.
摘要翻译：一种用于制造静电卡盘（20）的方法，包括以下步骤：（c）形成具有上表面的基部（80），其中具有冷却槽（85），所述凹槽的尺寸和分布用于将冷却剂保持在其中用于冷却基座; 和（d）通过以下步骤将电绝缘体层（45）施加到基底上的凹槽上：（i）将基底放置在压力成形设备（25）中并将电绝缘体层施加在基底中的凹槽上; 和（ii）将足够高的压力施加到绝缘体层上以使绝缘体层压到沟槽上，以形成与基底上的凹槽保形的基本上连续的电绝缘层。

26. 发明授权

US5585012A Self-cleaning polymer-free top electrode for parallel electrode etch operation 失效
标题翻译：用于平行电极蚀刻操作的自清洁聚合物顶部电极
公开(公告)号：US5585012A
公开(公告)日：1996-12-17
申请号：US357622
申请日：1994-12-15
申请人： Robert Wu , Hyman J. Levinstein , Hongching Shan
发明人： Robert Wu , Hyman J. Levinstein , Hongching Shan
IPC分类号： H05H1/46 , H01J37/32 , H01L21/302 , H01L21/3065 , H05H1/00
CPC分类号： H01J37/32862 , H01J37/32082 , H01J37/32532 , Y10S156/916 , Y10S438/905
摘要： A plasma etch reactor and a related method of its operation to provide self-cleaning of its top electrode, which is subject to being coated by polymer deposits during normal operation. In one form of the invention, radio-frequency (rf) power is applied to the top electrode on a continuous basis, but at a much lower power level than that of a primary rf power source used to supply power through a lower electrode, to generate and sustain a plasma in the reactor. The small rf power applied through the top electrode is selected to be of such a level as to remove deposits from the electrode continuously, as they are formed, but without removing any significant amount of electrode material. In another form of the invention, power is applied to the top electrode periodically during cleaning periods and power supply to the lower electrode is suspended during the cleaning periods. The two cleaning approaches may also be combined, with continuous cleaning being supplemented with occasional or periodic dry cleaning while etch processing is suspended.
摘要翻译：一种等离子体蚀刻反应器及其操作的相关方法，以提供其顶部电极的自清洁，其在正常操作期间被聚合物沉积物涂覆。在本发明的一种形式中，射频（RF）功率连续地施加到顶电极，但是功率水平远低于用于通过下电极供电的初级rf电源的功率水平，在反应器中产生和维持等离子体。选择通过顶部电极施加的小射频功率的水平，以便在形成电极时不断地从电极中去除沉积物，而不去除任何显着量的电极材料。在本发明的另一种形式中，在清洁期间周期性地向上电极施加电力，并且在清洁期间向下电极供电被暂停。两种清洁方法也可以组合，连续清洁补充有偶尔或周期性的干洗，而蚀刻处理被暂停。

27. 发明授权

US4323638A Reducing charging effects in charged-particle-beam lithography 失效
标题翻译：减少带电粒子束光刻中的充电效应
公开(公告)号：US4323638A
公开(公告)日：1982-04-06
申请号：US178988
申请日：1980-08-18
申请人： Arthur C. Adams , Frank B. Alexander, Jr. , Hyman J. Levinstein , Louis R. Thibault
发明人： Arthur C. Adams , Frank B. Alexander, Jr. , Hyman J. Levinstein , Louis R. Thibault
IPC分类号： H01L21/027 , B05D3/06
CPC分类号： H01L21/0271 , H01L21/0277 , Y10S430/143
摘要： In a charged-particle-beam lithographic system, charge accumulation on the workpiece during alignment or writing can cause significant pattern placement errors. A film (16) formed directly under the resist layer (56) to be patterned is utilized as a charge-conducting medium during lithography. The pattern delineated in the resist layer (56) is transferred into the film (16) and subsequently into an underlying layer (20). The film (16) is highly compatible with standard lithographic and etching processes used to fabricate LSI and VLSI circuits.
摘要翻译：在带电粒子束光刻系统中，对准或写入期间工件上的电荷累积可能导致显着的图案放置误差。在光刻过程中，作为导电介质，利用形成在图案化抗蚀剂层（56）正下方的膜（16）。在抗蚀剂层（56）中描绘的图案被转移到膜（16）中并随后转移到下层（20）中。薄膜（16）与用于制造LSI和VLSI电路的标准光刻和蚀刻工艺高度兼容。

28. 发明授权

US4256534A Device fabrication by plasma etching 失效
标题翻译：通过等离子体蚀刻的器件制造
公开(公告)号：US4256534A
公开(公告)日：1981-03-17
申请号：US929567
申请日：1978-07-31
申请人： Hyman J. Levinstein , David N. Wang
发明人： Hyman J. Levinstein , David N. Wang
IPC分类号： H01L21/302 , C23F4/00 , H01L21/02 , H01L21/3065 , H01L21/3213 , C23F1/00 , C23F1/02
CPC分类号： H01L21/02071 , C23F4/00
摘要： Integrated circuit fabrication, e.g., silicon LSI is expedited by plasma etching in any of a novel class of etchants. Appropriate plasma environments are produced by introduction of halide-halogen combinations as exemplified by BCl.sub.3 -Cl.sub.2.
摘要翻译：集成电路制造，例如，硅LSI通过等离子体蚀刻加速了任何一类新的蚀刻剂。通过引入卤代 - 卤素组合产生适当的等离子体环境，例如BCl3-Cl2。

29. 发明授权

US4134125A Passivation of metallized semiconductor substrates 失效
标题翻译：金属化半导体衬底钝化
公开(公告)号：US4134125A
公开(公告)日：1979-01-09
申请号：US817175
申请日：1977-07-20
申请人： Arthur C. Adams , Cesar D. Capio , Hyman J. Levinstein , Shyam P. Murarka
发明人： Arthur C. Adams , Cesar D. Capio , Hyman J. Levinstein , Shyam P. Murarka
IPC分类号： H01L21/205 , H01L21/314 , H01L21/56 , H01L23/29 , H01L29/04
CPC分类号： H01L23/298 , H01L21/02532 , H01L21/0262 , H01L21/314 , H01L21/56 , H01L23/291 , H01L2924/0002 , H01L2924/3011
摘要： Disclosed is a method and structure for protecting circuit components from the ambient and in particular for protecting the contact metal from the adverse effects of moisture. A first layer of amorphous silicon is deposited over the circuit including the metal contacts. A second layer which may be silicon nitride or silicon dioxide is then deposited over the amorphous silicon. The amorphous silicon layer reduces cracking in the second layer and prevents cracks in the second layer from propagating to the circuit components.
摘要翻译：公开了一种用于保护电路组件免受环境影响的方法和结构，特别是用于保护接触金属免受湿气的不利影响。在包括金属触点的电路上沉积第一层非晶硅。然后将可能是氮化硅或二氧化硅的第二层沉积在非晶硅上。非晶硅层减少第二层中的裂纹，并防止第二层中的裂纹传播到电路部件。

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