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21. 发明申请

US20050169356A1 Serial type interface circuit, power saving method thereof, and device having serial interface 失效
标题翻译：串行接口电路，省电方法以及具有串行接口的设备
公开(公告)号：US20050169356A1
公开(公告)日：2005-08-04
申请号：US10977112
申请日：2004-10-29
申请人： Kazunari Matsumoto , Hirohide Sugahara , Katsuhiko Takeuchi , Shinichi Utsunomiya , Sumie Matsubayashi , Nobuyuki Myouga
发明人： Kazunari Matsumoto , Hirohide Sugahara , Katsuhiko Takeuchi , Shinichi Utsunomiya , Sumie Matsubayashi , Nobuyuki Myouga
IPC分类号： G06F1/32 , G06F1/04 , H04B1/38
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/325 , G06F1/3268 , Y02D10/128 , Y02D10/154 , Y02D50/20
摘要： A power saving of a serial interface circuit decreases the unnecessary power consumption of a serial interface circuit, while decreasing the return time and expanding the power saving range. Gates are disposed for stopping the clock supply to a digital portion of the interface circuit while maintaining operation of clock sources in the digital portions. Therefore a quick shift to and return from the power save mode by stopping and restarting clocks is implemented, which further decreases power consumption.
摘要翻译：串行接口电路的省电降低了串行接口电路的不必要的功耗，同时减少了返回时间并扩大了功率节省范围。门被设置用于在保持数字部分中的时钟源的操作的同时停止对接口电路的数字部分的时钟供给。因此，通过停止和重新启动时钟来实现快速移动并从节电模式返回，这进一步降低了功耗。

22. 发明申请

US20050058079A1 Storage control apparatus, storage apparatus, storage control method, and computer product 失效
标题翻译：存储控制装置，存储装置，存储控制方法和计算机产品
公开(公告)号：US20050058079A1
公开(公告)日：2005-03-17
申请号：US10779401
申请日：2004-02-13
申请人： Shini-chi Utsunomiya , Katsuhiko Takeuchi , Nobuyuki Myouga , Sumie Matsubayashi , Hirohide Sugahara
发明人： Shini-chi Utsunomiya , Katsuhiko Takeuchi , Nobuyuki Myouga , Sumie Matsubayashi , Hirohide Sugahara
IPC分类号： G06F13/10 , G06F3/06 , G06F11/00 , G06F11/07
CPC分类号： G06F11/0793 , G06F11/0727
摘要： Information about an attribute of packets that are receivable corresponding to a command is registered. When a packet is received, information about an attribute of the packet received is acquired. Upon occurrence of a reception error that there is no information in the attribute registering unit corresponding to the information acquired by the attribute acquiring unit, a predetermined reception error handling routine is executed according to a type of the reception error.
摘要翻译：记录关于与命令对应的可接收的分组的属性的信息。当接收到分组时，获取关于所接收分组的属性的信息。在出现与属性获取单元获取的信息相对应的属性登记单元中没有信息的接收错误时，根据接收错误的类型来执行预定的接收错误处理程序。

23. 发明授权

US06804673B2 Access assurance for remote memory access over network 有权
标题翻译：通过网络进行远程存储器访问的访问保证
公开(公告)号：US06804673B2
公开(公告)日：2004-10-12
申请号：US09839954
申请日：2001-04-19
申请人： Hirohide Sugahara , Jeffrey D. Larson , Takashi Miyoshi , Takeshi Horie
发明人： Hirohide Sugahara , Jeffrey D. Larson , Takashi Miyoshi , Takeshi Horie
IPC分类号： G06F700
CPC分类号： G06F13/387 , Y10S707/99932
摘要： A method and system provide access assurance regarding an RDMA transaction. The system comprises an initiating device and a target device placed across a network. The initiating device and the target device are coupled to a first and a second buses, respectively. The first and the second buses are coupled to the network router through a first and a second network adaptors. An RDMA space and an associated access assurance space are assigned to the target device in the memory space of the first bus. The initiating device may RDMA the target device by directly reading from or writing into the RDMA space assigned to the target device. To obtain access assurance information regarding the RDMA transaction, the initiator performs a read from the assurance space associated with the RDMA space of the target device in the memory space of the first bus.
摘要翻译：方法和系统提供关于RDMA事务的访问保证。该系统包括通过网络放置的发起设备和目标设备。发起设备和目标设备分别耦合到第一和第二总线。第一和第二总线通过第一和第二网络适配器耦合到网络路由器。 RDMA空间和相关的访问保证空间被分配给第一总线的存储器空间中的目标设备。启动设备可以通过直接从分配给目标设备的RDMA空间读取或写入目标设备来RDMA目标设备。为了获得关于RDMA事务的访问保证信息，启动器从与第一总线的存储器空间中的目标设备的RDMA空间相关联的保证空间执行读取。

24. 发明授权

US06732212B2 Launch raw packet on remote interrupt 有权
标题翻译：在远程中断时启动原始数据包
公开(公告)号：US06732212B2
公开(公告)日：2004-05-04
申请号：US09785071
申请日：2001-02-14
申请人： Hirohide Sugahara , Takashi Miyoshi , Jeffrey D. Larson , Takeshi Horie
发明人： Hirohide Sugahara , Takashi Miyoshi , Jeffrey D. Larson , Takeshi Horie
IPC分类号： G06F1332
CPC分类号： G06F13/24 , G06F2213/2418
摘要： One embodiment of the present invention provides a method for processing a remote interrupt signal or a remote event. Another embodiment of the present invention provides a system for issuing a raw packet over a network in response to a remote interrupt or a remote event. Another embodiment of the present invention provides a network interface system configured to issue interrupt requests over a network.
摘要翻译：本发明的一个实施例提供一种用于处理远程中断信号或远程事件的方法。本发明的另一个实施例提供了一种用于响应于远程中断或远程事件通过网络发出原始分组的系统。本发明的另一个实施例提供一种被配置为通过网络发出中断请求的网络接口系统。

25. 发明授权

US07424628B2 Serial type interface circuit, power saving method thereof, and device having serial interface 失效
标题翻译：串行接口电路，省电方法以及具有串行接口的设备
公开(公告)号：US07424628B2
公开(公告)日：2008-09-09
申请号：US10977112
申请日：2004-10-29
申请人： Kazunari Matsumoto , Hirohide Sugahara , Katsuhiko Takeuchi , Shinichi Utsunomiya , Sumie Matsubayashi , Nobuyuki Myouga
发明人： Kazunari Matsumoto , Hirohide Sugahara , Katsuhiko Takeuchi , Shinichi Utsunomiya , Sumie Matsubayashi , Nobuyuki Myouga
IPC分类号： G06F1/00
CPC分类号： G06F1/3237 , G06F1/3203 , G06F1/325 , G06F1/3268 , Y02D10/128 , Y02D10/154 , Y02D50/20
摘要： A power saving of a serial interface circuit decreases the unnecessary power consumption of a serial interface circuit, while decreasing the return time and expanding the power saving range. Gates are disposed for stopping the clock supply to a digital portion of the interface circuit while maintaining operation of clock sources in the digital portions. Therefore a quick shift to and return from the power save mode by stopping and restarting clocks is implemented, which further decreases power consumption.
摘要翻译：串行接口电路的省电降低了串行接口电路的不必要的功耗，同时减少了返回时间并扩大了功率节省范围。门被设置用于在保持数字部分中的时钟源的操作的同时停止对接口电路的数字部分的时钟供给。因此，通过停止和重新启动时钟来实现快速移动并从节电模式返回，这进一步降低了功耗。

26. 发明授权

US06901451B1 PCI bridge over network 失效
标题翻译： PCI桥接网络
公开(公告)号：US06901451B1
公开(公告)日：2005-05-31
申请号：US09703477
申请日：2000-10-31
申请人： Takashi Miyoshi , Jeffrey D. Larson , Hirohide Sugahara , Takeshi Horie
发明人： Takashi Miyoshi , Jeffrey D. Larson , Hirohide Sugahara , Takeshi Horie
IPC分类号： G06F13/36 , G06F13/40 , G06F15/16 , H04L12/40
CPC分类号： G06F13/4027
摘要： One embodiment of the present invention provides a method for communicating transaction request information from a PCI environment over a network. Another embodiment of the present invention provides a method for communicating request packet information from a network to a PCI environment. Another embodiment of the present invention provides a system for communicating transaction request information from a PCI environment over a network. Another embodiment of the present invention provides a system for communicating request packet information from a network to a PCI environment.
摘要翻译：本发明的一个实施例提供了一种用于通过网络从PCI环境传送交易请求信息的方法。本发明的另一实施例提供了一种用于将请求分组信息从网络传送到PCI环境的方法。本发明的另一实施例提供一种用于通过网络从PCI环境传送交易请求信息的系统。本发明的另一个实施例提供一种用于将请求分组信息从网络传送到PCI环境的系统。

27. 发明申请

US20050080842A1 Interface apparatus and packet transfer method 有权
标题翻译：接口设备和分组传输方法
公开(公告)号：US20050080842A1
公开(公告)日：2005-04-14
申请号：US10777937
申请日：2004-02-12
申请人： Katsuhiko Takeuchi , Shin-ichi Utsunomiya , Nobuyuki Myoga , Sumie Matsubayashi , Hirohide Sugahara
发明人： Katsuhiko Takeuchi , Shin-ichi Utsunomiya , Nobuyuki Myoga , Sumie Matsubayashi , Hirohide Sugahara
IPC分类号： G06F13/12 , G06F3/06 , G06F13/10 , G06F13/38 , G06F15/16 , H04L12/70
CPC分类号： G06F13/385
摘要： A device interface circuit unit transfers a command and data in packet format between the unit and the host. A transport layer is provided with a receive FIFO, a command detection circuit and a send FIFO, and an application layer is provided with a receive task file register and a send task control file register. An available time is generated for each break point of a packet during data transfer in order to receive another command packet from the host. When the command packet is received from the host in the available time during data transfer, the data transfer is suspended and the received command is decoded to execute a process for continuing or canceling the data transfer, after which the data transfer is resumed.
摘要翻译：设备接口电路单元在单元和主机之间传送分组格式的命令和数据。传送层设置有接收FIFO，命令检测电路和发送FIFO，并且应用层具有接收任务文件寄存器和发送任务控制文件寄存器。在数据传输期间为数据包的每个断点生成可用时间，以便从主机接收另一个命令包。当在数据传输期间在可用时间内从主机接收到命令分组时，暂停数据传输并解码所接收的命令以执行用于继续或取消数据传送的处理，之后恢复数据传送。

28. 发明授权

US5402421A Bus control device and bus control method 失效
标题翻译：总线控制装置和总线控制方式
公开(公告)号：US5402421A
公开(公告)日：1995-03-28
申请号：US138082
申请日：1993-10-20
申请人： Kazumi Hayasaka , Hirohide Sugahara
发明人： Kazumi Hayasaka , Hirohide Sugahara
IPC分类号： G06F13/36 , G06F13/364 , H04J3/02
CPC分类号： G06F13/364
摘要： When a unit connected to a data transfer bus on which data transfer is controlled synchronously with a bus cycle makes a request for using the bus, permission is granted to one of the units which have made the request. The permission to use the bus is switched over at a bus cycle when data transfer is completed in the unit. Consequently, the bus cycle can be shortened, and the speed of the data transfer by the bus can be increased. To achieve this, the unit which has granted permission to use the bus sends out a notifying signal notifying switch over of the permission to use the bus at a bus cycle, which precedes the bus cycle when data transfer is completed. The permission to use the bus granted to the unit, which has completed data transfer, is cancelled on the basis of the notifying signal at the bus cycle when data transfer is completed. Permission to use the bus is granted to a subsequent unit at that bus cycle when there is the subsequent unit which is requested use of the bus.
摘要翻译：当连接到与总线周期同步地控制数据传输的数据传输总线的单元发出使用总线的请求时，允许向作出请求的单元之一。当数据传输完成后，在总线周期中切换使用总线的权限。因此，可以缩短总线周期，并且可以增加总线的数据传输速度。为了实现这一点，授权使用总线的单元在数据传输完成之后，在总线周期之前的总线周期发送通知信号通知切换到使用总线的许可。在完成数据传输时，授权给本机的总线的许可在数据传输完成时，基于总线周期的通知信号被取消。当存在要求使用总线的后续单元时，在该总线周期中授权使用总线的后续单元。

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