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21. 发明申请

US20060182031A1 Techniques to provide recovery receive queues for flooded queues 失效
公开(公告)号：US20060182031A1
公开(公告)日：2006-08-17
申请号：US11061997
申请日：2005-02-17
申请人： Hieu Tran
发明人： Hieu Tran
IPC分类号： H04J1/16 , H04L12/56
CPC分类号： H04L49/9084 , H04L49/90
摘要： In a receive-side scaling compatible environment, techniques to provide at least one recovery receive queue for any receive queue that is full or transferring traffic at too slow a rate.

22. 发明申请

US20060091449A1 Stacked gate memory cell with erase to gate, array, and method of manufacturing 有权
标题翻译：具有擦除到栅极，阵列和制造方法的堆叠栅极存储单元
公开(公告)号：US20060091449A1
公开(公告)日：2006-05-04
申请号：US11303567
申请日：2005-12-15
申请人： Bomy Chen , Hieu Tran , Dana Lee , Jack Frayer
发明人： Bomy Chen , Hieu Tran , Dana Lee , Jack Frayer
IPC分类号： H01L29/788
CPC分类号： H01L27/11521 , G11C16/0491 , H01L27/115 , H01L29/7885
摘要： A stacked gate nonvolatile memory floating gate device has a control gate. Programming of the cell in the array is accomplished by hot channel electron injection from the drain to the floating gate. Erasure occurs by Fowler-Nordheim tunneling of electrons from the floating gate to the control gate. Finally, to increase the density, each cell can be made in a trench.
摘要翻译：堆叠式非易失性存储器浮栅器件具有控制栅极。通过从漏极到浮动栅极的热通道电子注入来实现阵列中的单元的编程。擦除由Fowler-Nordheim发生，电子从浮动栅极隧道到控制门。最后，为了增加密度，可以在沟槽中制造每个单元。

23. 发明申请

US20060088248A1 One-piece fiber optic receptacle 有权
标题翻译：一体式光纤插座
公开(公告)号：US20060088248A1
公开(公告)日：2006-04-27
申请号：US10971891
申请日：2004-10-22
申请人： Hieu Tran , James Luther , Xin Liu , Thomas Theuerkorn , Charles Yow
发明人： Hieu Tran , James Luther , Xin Liu , Thomas Theuerkorn , Charles Yow
IPC分类号： G02B6/38
CPC分类号： G02B6/3825 , G02B6/3821 , G02B6/3875 , G02B6/389
摘要： A one-piece fiber optic receptacle is provided for aligning and optically connecting a plug ferrule with a back-side ferrule of like configuration. The fiber optic receptacle includes a receptacle housing defining an internal cavity opening through an external end and an opposed internal end, an alignment sleeve disposed within the internal cavity and received within the internal end of the receptacle housing, and a sleeve retainer removably secured to the internal end of the receptacle housing and operable for providing access to the alignment sleeve from the internal end of the receptacle housing. The fiber optic receptacle further includes biasing member supports that facilitate loading and ensure alignment of at least one biasing member during assembly and use. Tapered posts may be provided on at least one of the alignment sleeve and the sleeve retainer for retaining and guiding the at least one biasing member during assembly and use.
摘要翻译：提供一体式光纤插座，用于对准和光学连接插头套圈与类似结构的背面套圈。光纤插座包括容纳壳体，其限定通过外部端部和相对的内部端部的内部空腔开口，布置在内部空腔内并且容纳在插座壳体的内部端部内的对准套筒，以及可拆卸地固定到插座壳体的内部端部并且可操作以从插座壳体的内端提供对准套筒的接近。光纤插座还包括偏压构件支撑件，其有助于装配和确保在组装和使用期间至少一个偏置构件的对准。锥形柱可以设置在对准套筒和套筒保持器中的至少一个上，用于在组装和使用期间保持和引导至少一个偏置构件。

24. 发明申请

US20050224861A1 Isolation-less, contact-less array of nonvolatile memory cells each having a floating gate for storage of charges, and methods of manufacturing, and operating therefor 有权
标题翻译：非易失性存储单元的无隔离阵列，每个非易失性存储单元均具有用于存储电荷的浮动栅极，以及制造方法和操作方法
公开(公告)号：US20050224861A1
公开(公告)日：2005-10-13
申请号：US10822944
申请日：2004-04-12
申请人： Dana Lee , Hieu Tran , Jack Frayer
发明人： Dana Lee , Hieu Tran , Jack Frayer
IPC分类号： H01L21/8247 , G11C16/04 , G11C16/14 , H01L21/28 , H01L21/336 , H01L27/10 , H01L27/115 , H01L29/423 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7881 , G11C16/0433 , G11C16/0458 , G11C16/0491 , G11C16/14 , H01L21/28273 , H01L27/115 , H01L27/11556 , H01L29/42328 , H01L29/42336 , H01L29/7887
摘要： An isolation-less, contact-less nonvolatile memory array has a plurality of memory cells each with a floating gate for the storage of charges thereon, arranged in a plurality of rows and columns. Each memory cell can be of a number of different types. All the bit lines and source lines of the various embodiments are buried and are contact-less. In a first embodiment, each cell can be represented by a stacked gate floating gate transistor coupled to a separate assist transistor. The entire array can be planar; or in a preferred embodiment each of the floating gate transistors is in a trench; or each of the assist transistors is in a trench. In a second embodiment, each cell can be represented by a stacked gate floating gate transistor with the transistor in a trench. In a third embodiment, each cell can be represented by two stacked gate floating gate transistors coupled to a separate assist transistor, positioned between the two stacked gate floating gate transistors. The entire array can be planar; or in a preferred embodiment each of the floating gate transistors is in a trench; or each of the assist transistors is in a trench. Novel methods to manufacture the arrays and methods to program, erase, and read each of these embodiments of the memory cells is disclosed.
摘要翻译：无隔离的非接触式非易失性存储器阵列具有多个存储单元，每个存储单元具有用于在其上存储电荷的浮动栅极，其布置成多个行和列。每个存储单元可以是多种不同的类型。各种实施例的所有位线和源极线被掩埋并且是无接触的。在第一实施例中，每个单元可以由耦合到单独的辅助晶体管的堆叠栅极浮栅晶体管表示。整个阵列可以是平面的; 或者在优选实施例中，每个浮栅晶体管处于沟槽中; 或者每个辅助晶体管处于沟槽中。在第二实施例中，每个单元可以由晶体管在沟槽中的层叠栅极浮栅晶体管表示。在第三实施例中，每个单元可以由耦合到位于两个堆叠的栅极浮置栅极晶体管之间的单独的辅助晶体管的两个堆叠的栅极浮栅晶体管表示。整个阵列可以是平面的; 或者在优选实施例中，每个浮栅晶体管处于沟槽中; 或者每个辅助晶体管处于沟槽中。公开了制造阵列的新方法和编程，擦除和读取存储器单元的这些实施例的每一个的方法。

25. 发明申请

US20050053342A1 Fiber optic drop cables and preconnectorized assemblies having toning portions 有权
标题翻译：光纤分支电缆和具有调色部分的预连接组件
公开(公告)号：US20050053342A1
公开(公告)日：2005-03-10
申请号：US10963045
申请日：2004-10-12
申请人： Stuart Melton , David Thompson , Michael Gimblet , Hieu Tran , Richard Wagman , Xin Liu
发明人： Stuart Melton , David Thompson , Michael Gimblet , Hieu Tran , Richard Wagman , Xin Liu
IPC分类号： G02B6/38 , G02B6/44
CPC分类号： G02B6/447 , G02B6/3816 , G02B6/3821 , G02B6/3849 , G02B6/3869 , G02B6/387 , G02B6/3873 , G02B6/3879 , G02B6/3885 , G02B6/3887 , G02B6/3894 , G02B6/3897 , G02B6/4405 , G02B6/4429 , G02B6/4433 , G02B6/4471
摘要： A preconnectorized outdoor cable streamlines the deployment of optical waveguides into the last mile of an optical network. The preconnectorized outdoor cable includes a cable and at least one plug connector. The plug connector is attached to a first end of the cable, thereby connectorizing at least one optical waveguide. The cable has at least one optical waveguide, at least one tensile element, and a cable jacket. Various cable designs such as figure-eight or flat cables may be used with the plug connector. In preferred embodiments, the plug connector includes a crimp assembly having a crimp housing and a crimp band. The crimp housing has two half-shells being held together by the crimp band for securing the at least one tensile element. When fully assembled, the crimp housing fits into a shroud of the preconnectorized cable. The shroud aides in mating the preconnectorized cable with a complimentary receptacle.
摘要翻译：预先连接的室外电缆可以将光波导的部署简化到光网络的最后一英里。预连接器室外电缆包括电缆和至少一个插头连接器。插头连接器附接到电缆的第一端，从而将至少一个光波导连接起来。电缆具有至少一个光波导，至少一个拉伸元件和电缆护套。诸如图八或扁平电缆的各种电缆设计可以与插头连接器一起使用。在优选实施例中，插头连接器包括具有压接壳体和压接带的压接组件。卷边壳体具有两个半壳，通过卷边带固定在一起，用于固定至少一个拉伸元件。当完全组装时，压接壳体装配到预连接电缆的护罩中。护罩可以将预连接电缆与互补的插座相配合。

26. 发明授权

US06540410B2 Panel-mounted fiber optic connector 失效
公开(公告)号：US06540410B2
公开(公告)日：2003-04-01
申请号：US09739187
申请日：2000-12-18
申请人： Darrell R. Childers , Hieu Tran , Eric W. Kent
发明人： Darrell R. Childers , Hieu Tran , Eric W. Kent
IPC分类号： G02B636
CPC分类号： G02B6/3897 , G02B6/3821 , G02B6/3869 , G02B6/3893
摘要： A fiber optic connector for mounting on a panel comprises an outer housing defining an interior passage extending longitudinally therethrough, and at least one mounting element connected with the outer housing for mounting the connector onto the panel. The connector also includes a connector insert subassembly inserted through the rear end of the outer housing into the interior passage thereof. The connector insert subassembly is slidable longitudinally within the outer housing, and comprises an inner housing defining an inner passage extending longitudinally therethrough, and a ferrule holder and ferrule mounted within the inner passage of the inner housing. A compression spring is inserted into the rear end of the outer housing abutting the connector insert subassembly, and a spring retainer is inserted into the outer housing behind the compression spring to capture the spring in a compressed condition so as to cause the spring to bias the connector insert subassembly forwardly against a stop defined by the outer housing.

27. 发明申请

US20060215471A1 Single transistor sensing and double transistor sensing for flash memory 有权
标题翻译：用于闪存的单晶体管感测和双晶体管感测
公开(公告)号：US20060215471A1
公开(公告)日：2006-09-28
申请号：US11092166
申请日：2005-03-28
申请人： Hieu Tran
发明人： Hieu Tran
IPC分类号： G11C7/00
CPC分类号： G11C7/067 , G11C7/06 , G11C7/062 , G11C7/12 , G11C11/5642 , G11C16/28 , G11C2211/5634
摘要： A single sensing transistor is selectively diode connected to a sense line that is coupled to reference cells and data cells to store a reference current or leakage currents on the gate of the sensing transistor by opening the switch to disconnect the diode connection of the sensing transistor. Other sensing systems may use two transistors and may stores leakage current. A sensing system with capacitance auto-zeroing is included. The sensing system may include a dynamic differential current differential amplifier.
摘要翻译：单个感测晶体管被选择性地二极管连接到感测线，该感测线耦合到参考单元和数据单元，以通过打开开关来断开感测晶体管的二极管连接来在感测晶体管的栅极上存储参考电流或漏电流。其他感测系统可以使用两个晶体管并且可以存储泄漏电流。包含电容自动归零的感应系统。感测系统可以包括动态差分电流差分放大器。

28. 发明申请

US20060018605A1 Ferrule assembly having highly protruding optical fibers and an associated fabrication method 有权
公开(公告)号：US20060018605A1
公开(公告)日：2006-01-26
申请号：US11234994
申请日：2005-09-26
申请人： James Luther , Hieu Tran , Dennis Knecht , Robert Elkins
发明人： James Luther , Hieu Tran , Dennis Knecht , Robert Elkins
IPC分类号： G02B6/36
CPC分类号： G02B6/3863 , G02B6/38 , G02B6/3885
摘要： A ferrule assembly having highly protruding optical fibers and a corresponding method of efficiently, precisely and repeatedly fabricating the ferrule assemblies are provided. In this regard, a ferrule assembly is provided that includes a plurality of optical fibers extending at least about 3.5 μm beyond the front face. The end portions of the optical fibers of the ferrule assembly may also be substantially coplanar with the end portions of the optical fibers differing in position from one another by no more than 100 nm. The ferrule assembly may be efficiently fabricated by polishing the optical fibers to a desired protrusion without first grinding or polishing the optical fibers to be flush with the front face of the ferrule. The ferrule assembly may be even more efficiently fabricated in instances in which the ferrule includes at least one polishing feature, such as an outwardly extending pedestal or a recessed portion.

29. 发明申请

US20060013028A1 High-speed and low-power differential non-volatile content addressable memory cell and array 有权
标题翻译：高速和低功耗差分非易失性内容可寻址存储单元和阵列
公开(公告)号：US20060013028A1
公开(公告)日：2006-01-19
申请号：US10893811
申请日：2004-07-19
申请人： Vishal Sarin , Hieu Tran , Isao Nojima
发明人： Vishal Sarin , Hieu Tran , Isao Nojima
IPC分类号： G11C15/00
CPC分类号： G11C14/00 , G11C15/046
摘要： A differential non-volatile content addressable memory array has a differential non-volatile content addressable memory cell which uses a pair of non-volatile storage elements. Each of the non-volatile storage elements can be a split-gate floating gate transistor or a stack gate floating gate transistor having a first terminal, a second terminal, a channel therebetween and a floating gate over at least a portion of the channel to control the conduction of electrons in the channel, and a control gate. The floating gate storage transistor can be in one of two states: a first state, such as erase, in which current can flow between the first terminal and the second terminal, and a second state, such as programmed, in which substantially no current flows between the first terminal and the second terminal. A pair of differential compare data lines connects to the control gate of each of the pair of non-volatile floating gate transistors. A match line connects to the first terminal of each of the pair of non-volatile floating gate transistors to a first voltage. Finally, the second terminals of each storage element is connected to a second voltage, different from the first voltage. A current passing through the memory cell is indicative of a mis-match between the contents of the compare data lines and the contents of the storage elements.
摘要翻译：差分非易失性内容可寻址存储器阵列具有使用一对非易失性存储元件的差分非易失性内容可寻址存储器单元。每个非易失性存储元件可以是分离栅极浮栅晶体管或堆叠栅极浮栅晶体管，其具有第一端子，第二端子，其间的沟道以及通道的至少一部分上的浮置栅极以控制通道中的电子传导，以及控制栅极。浮置栅极存储晶体管可以处于以下两种状态之一：电流可以在第一端子和第二端子之间流动的第一状态，例如擦除，以及第二状态，诸如编程的，其中基本上没有电流流动在第一端子和第二端子之间。一对差分比较数据线连接到该对非易失性浮栅晶体管中的每一个的控制栅极。匹配线将一对非易失性浮栅晶体管的每一个的第一端连接到第一电压。最后，每个存储元件的第二端子被连接到与第一电压不同的第二电压。通过存储单元的电流表示比较数据线的内容与存储元件的内容之间的错误匹配。

30. 发明申请

US20060007855A1 Prioritization of network traffic 有权
标题翻译：网络流量优先排序
公开(公告)号：US20060007855A1
公开(公告)日：2006-01-12
申请号：US10885821
申请日：2004-07-07
申请人： Hieu Tran , Dinesh Kumar , Kiran Patil , Linden Cornett
发明人： Hieu Tran , Dinesh Kumar , Kiran Patil , Linden Cornett
IPC分类号： H04L12/28 , H04L12/56
CPC分类号： H04L47/10 , H04L47/2433 , H04L47/245 , H04L47/2475
摘要： A plurality of packets associated with a plurality of protocols are received, wherein the plurality of packets are to be processed by a plurality of processors. Packets associated with a first protocol are sent to be processed by at least one of the plurality of processors before sending packets associated with a second protocol to be processed, in response to determining that the packets associated with the first protocol have a higher priority for processing than the packets associated with the first protocol.
摘要翻译：接收与多个协议相关联的多个分组，其中多个分组将被多个处理器处理。响应于确定与第一协议相关联的分组具有较高的处理优先级，发送与第一协议相关联的分组，以在发送与要处理的第二协议相关联的分组之前由多个处理器中的至少一个处理器处理比与第一协议相关联的分组。

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