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21. 发明申请

US20100128813A1 Multi-channel Signaling with Equalization 失效
标题翻译：均衡化的多信道信令
公开(公告)号：US20100128813A1
公开(公告)日：2010-05-27
申请号：US12515390
申请日：2007-11-09
申请人： Aliazam Abbasfar , Amir Amirkhany
发明人： Aliazam Abbasfar , Amir Amirkhany
IPC分类号： H04L27/00 , H04B1/10 , H04B15/00
CPC分类号： H04L25/03343 , H04L5/0007 , H04L5/06 , H04L25/03057 , H04L27/2637 , H04L27/2644 , H04L2025/03414 , H04L2025/03426 , H04L2025/0349
摘要： A data transmission circuit comprises a plurality of data preparation circuits and a combiner. Each data preparation circuit receives a respective data stream and generates a respective sub-channel signal. Each respective data stream has a respective symbol rate and a respective Nyquist bandwidth. The combiner combines the respective sub-channel signals to generate a data transmission signal having an associated bandwidth. The bandwidth associated with the data transmission signal is greater than or equal to the sum of the Nyquist bandwidths for the respective data streams. Each data preparation circuit comprises a programmable linear equalizer that equalizes the respective sub-channel signal across the bandwidth of the data transmission signal.
摘要翻译：数据传输电路包括多个数据准备电路和组合器。每个数据准备电路接收相应的数据流并产生相应的子信道信号。每个相应的数据流具有相应的符号率和相应的奈奎斯特带宽。组合器组合各个子信道信号以产生具有相关带宽的数据传输信号。与数据传输信号相关联的带宽大于或等于相应数据流的奈奎斯特带宽的总和。每个数据准备电路包括一个可编程线性均衡器，用于跨数据传输信号的带宽均衡相应的子信道信号。

22. 发明申请

US20090067537A1 Adjustable Dual-Band Link 失效
标题翻译：可调双频链路
公开(公告)号：US20090067537A1
公开(公告)日：2009-03-12
申请号：US12268986
申请日：2008-11-11
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/30
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号率的数据流的第二子集传送给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

23. 发明申请

US20080137783A1 Adjustable Dual-Band Link 失效
标题翻译：可调双频链路
公开(公告)号：US20080137783A1
公开(公告)日：2008-06-12
申请号：US12030700
申请日：2008-02-13
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/22
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号速率的数据流的第二子集给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

24. 发明申请

US20140226707A1 OFFSET AND DECISION FEEDBACK EQUALIZATION CALIBRATION 有权
标题翻译：偏差和决策反馈均衡校准
公开(公告)号：US20140226707A1
公开(公告)日：2014-08-14
申请号：US14342367
申请日：2012-08-10
申请人： Kambiz Kaviani , Amir Amirkhany , Jason Chia-Jen Wei , Aliazam Abbasfar
发明人： Kambiz Kaviani , Amir Amirkhany , Jason Chia-Jen Wei , Aliazam Abbasfar
IPC分类号： H04L25/03 , H04B1/12
CPC分类号： H04L25/03057 , H04B1/123 , H04L25/03063 , H04L25/03885
摘要： A decision feedback equalizer is calibrated to compensate for estimated inter-symbol interference in a received signal and offsets of sampling devices. The decision feedback equalizer is configured so that an output signal of a sampling circuit represents a comparison between an input signal and a reference of the sampling circuit under calibration. An input signal is received over a communication channel that includes a predetermined pattern. The predetermined pattern is compared to the output signal to determine an adjusted reference for configuring the sampling circuit that accounts for both offset and inter-symbol interference effects.
摘要翻译：校准反馈均衡器以补偿接收信号中的估计符号间干扰和采样设备的偏移。判定反馈均衡器被配置为使得采样电路的输出信号表示在校准下的输入信号和采样电路的基准之间的比较。在包括预定图案的通信信道上接收输入信号。将预定模式与输出信号进行比较，以确定用于配置考虑到偏移和符号间干扰效应两者的采样电路的调整参考。

25. 发明授权

US08275027B2 Multi-mode transmitter 失效
标题翻译：多模发射机
公开(公告)号：US08275027B2
公开(公告)日：2012-09-25
申请号：US12117680
申请日：2008-05-08
申请人： Aliazam Abbasfar , Amir Amirkhany
发明人： Aliazam Abbasfar , Amir Amirkhany
IPC分类号： H04L27/01
CPC分类号： H04L27/0008
摘要： A multi-mode transmitter within an integrated circuit device. The multi-mode transmitter transmits a first data sequence in a baseband signal when a first transmission mode is enabled, and transmits the first data sequence in a multi-band signal when a second transmission mode is enabled.
摘要翻译：集成电路设备内的多模发射机。当第一传输模式被使能时，多模式发射机发送基带信号中的第一数据序列，并且当启用第二传输模式时，将多个第一数据序列发送到多频带信号。

26. 发明申请

US20120189045A1 Signaling with Superimposed Clock and Data Signals 审中-公开
标题翻译：信号与叠加的时钟和数据信号
公开(公告)号：US20120189045A1
公开(公告)日：2012-07-26
申请号：US13438801
申请日：2012-04-03
申请人： Aliazam Abbasfar , Amir Amirkhany , Bruno W. Garlepp
发明人： Aliazam Abbasfar , Amir Amirkhany , Bruno W. Garlepp
IPC分类号： H04B1/04 , H04L27/01
CPC分类号： H03L7/085 , H03L7/07 , H03L7/087 , H04L7/0008 , H04L7/0025 , H04L7/033
摘要： A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock signal has a frequency N times the associated symbol rate, where N is an integer. A phase-locked loop (PLL) coupled to the interface extracts the clock signal from the input signal to provide an extracted clock signal. A phase interpolator adjusts the phase of the extracted clock signal to provide a phase-adjusted extracted clock signal. A sampling circuit samples the data signal at a sampling point. The sampling circuit is synchronized to the phase-adjusted extracted clock signal.
摘要翻译：数据接收器电路包括接收包括数据信号和叠加在数据信号上的时钟信号的输入信号的接口。数据信号具有相关联的符号率和相关联的符号周期等于相关联符号率的倒数。时钟信号具有相关符号率N倍的频率，其中N是整数。耦合到接口的锁相环（PLL）从输入信号提取时钟信号以提供提取的时钟信号。相位内插器调整提取的时钟信号的相位以提供相位调整的提取的时钟信号。采样电路在采样点采样数据信号。采样电路与相位调整的提取时钟信号同步。

27. 发明授权

US07907676B2 Adjustable dual-band link 失效
标题翻译：可调节双频链路
公开(公告)号：US07907676B2
公开(公告)日：2011-03-15
申请号：US12574629
申请日：2009-10-06
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/28
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号速率的数据流的第二子集给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

28. 发明授权

US07599422B2 Adjustable dual-band link 失效
标题翻译：可调节双频链路
公开(公告)号：US07599422B2
公开(公告)日：2009-10-06
申请号：US12268986
申请日：2008-11-11
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/30
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号率的数据流的第二子集传送给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

29. 发明申请

US20090202004A1 Analog Multi-Tone Receiver 失效
标题翻译：模拟多音频接收器
公开(公告)号：US20090202004A1
公开(公告)日：2009-08-13
申请号：US12369624
申请日：2009-02-11
申请人： Amir Amirkhany
发明人： Amir Amirkhany
IPC分类号： H04L27/00 , H04L27/06
CPC分类号： H04L27/2626 , H04L27/2647 , H04L2025/03414
摘要： An analog multi-tone receiver includes an interface for receiving a data transmission signal containing N sub-channel signals corresponding to N active sub-channels. The receiver includes a plurality of samplers to sample, during each time interval of a sequence of time intervals, the received signal in parallel to produce a plurality of data sets, each sampler having a distinct threshold level. The receiver includes a decoder to jointly decode the plurality of data sets to determine a plurality of data symbols including at least one data symbol for each of the N active sub-channels.
摘要翻译：模拟多音调接收机包括用于接收包含对应于N个有效子信道的N个子信道信号的数据传输信号的接口。接收机包括多个采样器，以在时间序列序列的每个时间间隔期间采样并行接收的信号以产生多个数据集，每个采样器具有不同的阈值电平。接收机包括解码器，以共同解码多个数据集，以确定包括N个有效子信道中的每一个的至少一个数据符号的多个数据符号。

30. 发明申请

US20080297213A1 Signaling with Superimposed Clock and Data Signals 失效
标题翻译：信号与叠加的时钟和数据信号
公开(公告)号：US20080297213A1
公开(公告)日：2008-12-04
申请号：US12128584
申请日：2008-05-28
申请人： Aliazam Abbasfar , Amir Amirkhany , Bruno W. Garlepp
发明人： Aliazam Abbasfar , Amir Amirkhany , Bruno W. Garlepp
IPC分类号： H03L7/06
CPC分类号： H03L7/085 , H03L7/07 , H03L7/087 , H04L7/0008 , H04L7/0025 , H04L7/033
摘要： A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock signal has a frequency N times the associated symbol rate, where N is an integer. A phase-locked loop (PLL) coupled to the interface extracts the clock signal from the input signal to provide an extracted clock signal. A phase interpolator adjusts the phase of the extracted clock signal to provide a phase-adjusted extracted clock signal. A sampling circuit samples the data signal at a sampling point. The sampling circuit is synchronized to the phase-adjusted extracted clock signal.
摘要翻译：数据接收器电路包括接收包括数据信号和叠加在数据信号上的时钟信号的输入信号的接口。数据信号具有相关联的符号率和相关联的符号周期等于相关联符号率的倒数。时钟信号具有相关符号率N倍的频率，其中N是整数。耦合到接口的锁相环（PLL）从输入信号提取时钟信号以提供提取的时钟信号。相位内插器调整提取的时钟信号的相位以提供相位调整的提取的时钟信号。采样电路在采样点采样数据信号。采样电路与相位调整的提取时钟信号同步。

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