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21. 发明申请

US20160260398A1 Shift Register Unit and Driving Method thereof, Shift Register Circuit, and Display Apparatus 有权
标题翻译：移位寄存器单元及其驱动方法，移位寄存器电路和显示装置
公开(公告)号：US20160260398A1
公开(公告)日：2016-09-08
申请号：US14785689
申请日：2015-03-27
申请人： BOE TECHNOLOGY GROUP CO., LTD. , BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
发明人： Shulin Yao , Seung Min Lee , Zhihua Sun , Xingji Wu , Wenhai Cui , Baoyu Liu
IPC分类号： G09G3/36 , G09G3/3258
CPC分类号： G09G3/3648 , G09G3/3258 , G09G3/3266 , G09G3/3677 , G09G2300/04 , G09G2310/0267 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G11C19/28 , H03K19/00361
摘要： The application relates to a shift register unit and a driving method thereof, a shift register circuit and a display apparatus. The shift register unit may include a gate starting terminal, a first clock terminal, a second clock terminal, a reset terminal, a low level terminal, a gate output terminal, a storage capacitor, a charging module, an output control module and a reset module. In the shift register according to the present application, since the reset operation is under control of the second transistor and the fifth transistor both, an improper reset operation will not occur, even if the signal at the reset terminal is unstable.
摘要翻译：本申请涉及移位寄存器单元及其驱动方法，移位寄存器电路和显示装置。移位寄存器单元可以包括门起始端，第一时钟端，第二时钟端，复位端，低电平端，栅极输出端，存储电容，充电模块，输出控制模块和复位模块。在根据本申请的移位寄存器中，由于复位操作在第二晶体管和第五晶体管两者的控制下，即使复位端子的信号不稳定，也不会发生不正确的复位操作。

22. 发明授权

US09344043B2 Output buffer circuit, array substrate and display device 有权
标题翻译：输出缓冲电路，阵列基板和显示装置
公开(公告)号：US09344043B2
公开(公告)日：2016-05-17
申请号：US14444528
申请日：2014-07-28
申请人： BOE TECHNOLOGY GROUP CO., LTD. , BEIJING BOE DISPLAY TECHNOLOGY CO., LTD.
发明人： Baoyu Liu , Liang Zhang , Yizhen Xu , Zhihua Sun
IPC分类号： H03F1/02 , G09G3/36 , H03F3/45
CPC分类号： H03F1/0261 , G09G3/3677 , G09G2310/0291 , H03F3/45183 , H03F2203/45674
摘要： The embodiments of the present invention provide a output buffer circuit, comprising: a first stage operational amplifying circuit configured as a differential input circuit; a second stage operational amplifying circuit configured as a common source amplifying circuit having an active load; and a feedback circuit provided between the first stage operational amplifying circuit and the second stage operational amplifying circuit and configured to have driving capability of providing source current and sink current alternately. By forming a unit gain amplifier comprising the first stage operational amplifying circuit, the second stage operational amplifying circuit and the feedback circuit connected therebetween, the output buffer circuit has the driving capability of providing source current and sink current alternately. No special voltage stabilizing circuit is needed, thus the circuit structure is simple and the chip area is decreased; since the power consumption can be reduced without a special voltage stabilizing circuit, the fluctuation of the output voltage is suppressed at the same time, the stability of the circuit is ensured in operation and offset is suppressed optimally, the output signal is more accurate and the quality of image displayed is improved.
摘要翻译：本发明的实施例提供了一种输出缓冲电路，包括：第一级运算放大电路，被配置为差分输入电路; 配置为具有有源负载的公共源极放大电路的第二级运算放大电路; 以及设置在第一级运算放大电路和第二级运算放大电路之间的反馈电路，并且被配置为具有交替地提供源极电流和吸收电流的驱动能力。通过形成包括第一级运算放大电路，第二级运算放大电路和连接在其间的反馈电路的单位增益放大器，输出缓冲电路具有交替提供源电流和吸收电流的驱动能力。无需特殊的稳压电路，电路结构简单，芯片面积减小; 由于在没有特别的稳压电路的情况下可以降低功耗，因此同时抑制输出电压的波动，确保电路的稳定性，并且最佳地抑制偏移，输出信号更精确，提高了显示图像质量。

23. 发明申请

US20150379950A1 ARRAY SUBSTRATE, DISPLAY DEVICE AND METHOD FOR DRIVE THE SAME 审中-公开
标题翻译：阵列基板，显示装置及其驱动方法
公开(公告)号：US20150379950A1
公开(公告)日：2015-12-31
申请号：US14472581
申请日：2014-08-29
申请人： BOE Technology Group Co., Ltd. , Beijing BOE Display Technology Co., Ltd.
发明人： Zhihua Sun , Liang Zhang , Yizhen Xu , Baoyu Liu , Shulin Yao
IPC分类号： G09G3/36
CPC分类号： G09G3/3614 , G09G2300/0426 , G09G2300/0452
摘要： The present disclosure provides an array substrate, a display device, and a drive method for the display device. The array substrate comprises gate lines and data lines and a plurality of pixel units defined by intersection of the gate lines and the data lines with one another; wherein the plurality of pixel units is divided into a number of pixel regions each of which includes at least one column of the pixel units and is driven by a data line driving unit; wherein, first and second data lines are disposed side by side between two adjacent pixel units that are respectively located at the margins of any two adjacent pixel regions; and, one of the first and the second data lines is connected with the pixel units adjacent thereto and located in odd rows while the other is connected with the pixel units adjacent thereto and located in even rows.
摘要翻译：本公开提供了一种用于显示装置的阵列基板，显示装置和驱动方法。阵列基板包括栅极线和数据线以及由栅极线和数据线彼此相交限定的多个像素单元; 其中所述多个像素单元被划分为多个像素区域，每个像素区域包括至少一列所述像素单元并由数据线驱动单元驱动; 其中，第一和第二数据线并排设置在分别位于任何两个相邻像素区域的边缘处的两个相邻像素单元之间; 并且第一和第二数据线之一与与其相邻并位于奇数行的像素单元连接，而另一个与与其相邻并位于偶数行的像素单元连接。

24. 发明授权

US11846856B2 Array substrate and display device 有权
公开(公告)号：US11846856B2
公开(公告)日：2023-12-19
申请号：US17264498
申请日：2020-03-17
申请人： BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Jianhua Huang , Zhihua Sun , Yingying Qu , Ting Dong , Yifu Chen , Lingdan Bo
IPC分类号： G02F1/1362 , G02F1/1368 , H01L27/12
CPC分类号： G02F1/136286 , G02F1/1368 , G02F1/136209 , H01L27/124
摘要： An array substrate has a plurality of sub-pixel regions. The array substrate includes a base substrate, gate lines disposed on a side of the base substrate and extending in a first direction, pixel electrodes each disposed in a respective one of the sub-pixel regions, and common electrodes disposed on a side, facing away from the base substrate, of the pixel electrodes and the gate lines. An orthographic projection of at least one common electrode on the base substrate at least partially overlaps with an orthographic projection of at least one gate line adjacent to the at least one common electrode on the base substrate, or a border of an orthographic projection of at least one common electrode on the base substrate partially overlaps with a border of an orthographic projection of at least one gate line adjacent to the at least one common electrode on the base substrate.

25. 发明授权

US11823640B2 Display substrate and display device 有权
公开(公告)号：US11823640B2
公开(公告)日：2023-11-21
申请号：US17429937
申请日：2020-10-30
申请人： Beijing BOE Display Technology Co., Ltd. , BOE Technology Group Co., Ltd.
发明人： Chongyang Zhao , Yingmeng Miao , Qiujie Su , Zhihua Sun , Wenjie Hou , Feng Qu
IPC分类号： G09G3/36 , H01L27/12
CPC分类号： G09G3/3677 , H01L27/124 , H01L27/1225
摘要： The present disclosure provides a display substrate and a display device. The display substrate includes: a gate driving circuitry arranged at a peripheral region of the display substrate; n clock signal leads coupled to the gate driving circuitry, each clock signal lead extending in a first direction; and n clock signal lines arranged sequentially in the first direction, each clock signal line extending in a second direction intersecting the first direction, where n is a positive integer greater than 1. The clock signal leads have a same length in the first direction, each clock signal lead extends from a first clock signal line to an nth clock signal line, and each clock signal lead is coupled to a corresponding clock signal line at a position where the clock signal lead intersects the clock signal line.

26. 发明授权

US11796870B2 Array substrate, light control panel, and display device 有权
公开(公告)号：US11796870B2
公开(公告)日：2023-10-24
申请号：US17288963
申请日：2020-09-27
申请人： BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Jianhua Huang , Yingmeng Miao , Chongyang Zhao , Zhihua Sun , Yingying Qu , Ting Dong , Yifu Chen , Lingdan Bo , Senwang Li
IPC分类号： G02F1/1343 , G02F1/1362 , G02F1/1335
CPC分类号： G02F1/134372 , G02F1/134309 , G02F1/136286 , G02F1/133512
摘要： An array substrate, a light control panel, and a display device are disclosed. The array substrate includes a data line layer, a base substrate, a first electrode layer, and a second electrode layer. The first electrode layer includes gate lines, each gate line integrally extends along a first direction, and includes first broken line structures directly connected in sequence in the first direction; the data line layer includes data lines, each data line integrally extends along a second direction; the gate lines and the data lines cross each other to define light control pixel units; the second electrode layer includes common electrodes, each common electrode is provided in at least one light control pixel unit; and at least one gate line at least partially overlaps with an orthographic projection of at least one common electrode on the first electrode layer.

27. 发明授权

US11749161B2 Gate driving circuit and driving method thereof and display panel 有权
公开(公告)号：US11749161B2
公开(公告)日：2023-09-05
申请号：US18082691
申请日：2022-12-16
申请人： BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Yingmeng Miao , Changcheng Liu , Zhihua Sun , Yanping Liao , Seungmin Lee , Xibin Shao , Cong Wang , Feng Qu
IPC分类号： G09G3/20 , G11C19/28
CPC分类号： G09G3/20 , G11C19/28 , G09G2300/0408 , G09G2300/08 , G09G2310/0243 , G09G2310/0267 , G09G2310/0286 , G09G2310/08
摘要： There is provided a gate driving circuit comprising N first shift registers arranged alternately with N second shift registers. An input signal terminal of an n-th stage of first shift register is coupled to an output signal terminal of an (n−i)-th stage of first shift register, and a reset signal terminal of the n-th stage of first shift register is coupled to an output signal terminal of an (n+j)-th stage of first shift register. Input signal terminal and reset signal terminal of n-th stage of second shift register are coupled to output signal terminals of (n−i)-th and (n+j)-th stages of second shift registers respectively. K=6, i=3, and j=4. Reset signal terminals of (N−j+1)-th to N-th stages of first shift registers and reset signal terminals of (N−j+1)-th to N-th stages of second shift registers are configured to receive a total reset signal.

28. 发明公开

US20230215320A1 METHOD OF DRIVING DISPLAY, AND DISPLAY DEVICE 审中-公开
公开(公告)号：US20230215320A1
公开(公告)日：2023-07-06
申请号：US18182479
申请日：2023-03-13
申请人： Beijing BOE Display Technology Co., Ltd. , BOE Technology Group Co., Ltd.
发明人： Zhihua Sun , Yinlong Zhang , Qiujie Su , Feng Qu , Jing Liu , Yanping Liao , Xibin Shao
IPC分类号： G09G3/20
CPC分类号： G09G3/20 , G09G2310/08 , G09G2310/0278 , G09G2310/0205
摘要： Embodiments of the present disclosure provide a method of driving display, and a display device. The method of driving display includes: scanning, progressively or rows by rows, a plurality of sub-pixels arranged in an N×M array, to turn on each row of sub-pixels scanned, so that a duration in which two adjacent rows of sub-pixels are simultaneously in an ON state is greater than or equal to two times a unit scanning time, wherein the unit scanning time is a time required for scanning a row of sub-pixels, N is an integer greater than 1, and M is an integer greater than 1; and applying data signals to at least two rows of sub-pixels simultaneously in the ON state, so that a duration of applying the data signals to each row of sub-pixels is greater than the unit scanning time.

29. 发明申请

US20220399377A1 ARRAY SUBSTRATE, DISPLAY PANEL, AND ELECTRONIC DEVICE 有权
公开(公告)号：US20220399377A1
公开(公告)日：2022-12-15
申请号：US17594832
申请日：2020-12-21
申请人： BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Chongyang Zhao , Yingmeng Miao , Zhihua Sun , Feng Qu , Xiaochun Xu
IPC分类号： H01L27/12 , G02F1/1362
摘要： An array substrate, a display panel, and an electronic device are provided. The array substrate includes: a base substrate; a first electrode arranged on the base substrate; a gate line arranged on the base substrate, wherein the gate line is electrically insulated from the first electrode; a second electrode arranged on a side of the gate line away from the base substrate, wherein at least one first sub-pixel unit provided on the base substrate includes: a first connection portion arranged in a same layer as the second electrode and a second connection portion arranged in a same layer as the gate line, wherein the second connection portion is electrically connected to the first electrode, and an orthographic projection of the second connection portion on the base substrate at least partially overlaps an orthographic projection of the first connection portion on the base substrate.

30. 发明授权

US11362015B2 Heat dissipation structure for chip-on-film, manufacturing method thereof, and display device 有权
公开(公告)号：US11362015B2
公开(公告)日：2022-06-14
申请号：US16081197
申请日：2018-01-22
申请人： BEIJING BOE DISPLAY TECHNOLOGY CO., LTD. , BOE TECHNOLOGY GROUP CO., LTD.
发明人： Ning Zhang , Zhihua Sun , Shulin Yao , Guohuo Su , Xu Zhang
IPC分类号： H01L23/427 , H01L21/48 , H01L23/498
摘要： A heat dissipation structure and a manufacturing method thereof and a display device. The heat dissipation structure includes: a heat dissipation plate body, including an evaporation part and a condensation part; a plurality of micro-cavity structures, disposed in the heat dissipation plate body, two ports of each of the micro-cavity structures being sealed, and the micro-cavity structures being filled with liquid. Each of the micro-cavity structures extends from the evaporation part to the condensation part, and after the liquid absorbs heat at the evaporation part to change into vapor, the vapor moves toward the condensation part, and the vapor moved to the condensation part is condensed and liquefied and moves toward the evaporation part to achieve heat dissipation.

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