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21. 发明申请

US20110049696A1 OFF-CHIP VIAS IN STACKED CHIPS 有权
标题翻译：堆叠式切片中的切割六边形
公开(公告)号：US20110049696A1
公开(公告)日：2011-03-03
申请号：US12941392
申请日：2010-11-08
申请人： Belgacem Haba , Ilyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Wills Mirkarimi
发明人： Belgacem Haba , Ilyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Wills Mirkarimi
IPC分类号： H01L25/11
CPC分类号： H01L21/78 , H01L21/6835 , H01L23/5382 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68377 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/9202 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2225/06582 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15311 , H01L2224/82 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.
摘要翻译：微电子组件包括第一和第二堆叠的微电子元件，每个微电子元件具有沿前表面延伸并且至少其第一边缘延伸的间隔开的迹线。绝缘区域可以接触每个微电子元件的边缘，并且每个微电子元件的迹线的至少部分延伸超过相应的第一边缘。绝缘区域可以限定与微电子元件的第一和第二边缘相邻的第一和第二侧表面。多个间隔开的开口可以沿着微电子组件的侧表面延伸。与相应迹线连接的电导体可以具有设置在相应开口中并沿相应开口延伸的部分。电导体可以延伸到覆盖在微电子元件中的一个的表面上的焊盘或焊球。

22. 发明授权

US08759973B2 Microelectronic assemblies having compliancy and methods therefor 有权
标题翻译：具有兼容性的微电子组件及其方法
公开(公告)号：US08759973B2
公开(公告)日：2014-06-24
申请号：US13335022
申请日：2011-12-22
申请人： Vage Oganesian , Guilian Gao , Belgacem Haba , David Ovrutsky
发明人： Vage Oganesian , Guilian Gao , Belgacem Haba , David Ovrutsky
IPC分类号： H01L23/48
CPC分类号： H01L24/12 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L2224/0231 , H01L2224/0401 , H01L2224/05599 , H01L2224/1132 , H01L2224/1147 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/3011 , H01L2924/351
摘要： A microelectronic assembly is disclosed that includes a semiconductor wafer with contacts, compliant bumps of dielectric material overlying the first surface of the semiconductor wafer, and a dielectric layer overlying the first surface of the semiconductor wafer and edges of the compliant bumps. The compliant bumps have planar top surfaces which are accessible through the dielectric layer. Conductive traces may be electrically connected with contacts and extend therefrom to overlie the planar top surfaces of the compliant bumps. Conductive elements may overlie the planar top surfaces in contact with the conductive traces.
摘要翻译：公开了一种微电子组件，其包括具有触点的半导体晶片，覆盖半导体晶片的第一表面的电介质材料的柔性突起，以及覆盖半导体晶片的第一表面和顺应凸块的边缘的电介质层。顺应性凸块具有可通过电介质层访问的平面顶表面。导电迹线可以与触点电连接并从其延伸以覆盖顺应性凸块的平坦顶表面。导电元件可以覆盖与导电迹线接触的平面顶表面。

23. 发明授权

US08076788B2 Off-chip vias in stacked chips 有权
标题翻译：堆叠芯片中的片外通孔
公开(公告)号：US08076788B2
公开(公告)日：2011-12-13
申请号：US12941392
申请日：2010-11-08
申请人： Belgacem Haba , Ilyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Mirkarimi
发明人： Belgacem Haba , Ilyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Mirkarimi
IPC分类号： H01L23/48 , H01L23/52 , H01L29/40
CPC分类号： H01L21/78 , H01L21/6835 , H01L23/5382 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68377 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/9202 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2225/06582 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15311 , H01L2224/82 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A microelectronic assembly includes first and second stacked microelectronic elements, each having spaced apart traces extending along a front face and beyond at least a first edge thereof. An insulating region can contact the edges of each microelectronic element and at least portions of the traces of each microelectronic element extending beyond the respective first edges. The insulating region can define first and second side surfaces adjacent the first and second edges of the microelectronic elements. A plurality of spaced apart openings can extend along a side surface of the microelectronic assembly. Electrical conductors connected with respective traces can have portions disposed in respective openings and extending along the respective openings. The electrical conductors may extend to pads or solder balls overlying a face of one of the microelectronic elements.
摘要翻译：微电子组件包括第一和第二堆叠的微电子元件，每个微电子元件具有沿前表面延伸并且至少其第一边缘延伸的间隔开的迹线。绝缘区域可以接触每个微电子元件的边缘，并且每个微电子元件的迹线的至少部分延伸超过相应的第一边缘。绝缘区域可以限定与微电子元件的第一和第二边缘相邻的第一和第二侧表面。多个间隔开的开口可以沿着微电子组件的侧表面延伸。与相应迹线连接的电导体可以具有设置在相应开口中并沿相应开口延伸的部分。电导体可以延伸到覆盖在微电子元件中的一个的表面上的焊盘或焊球。

24. 发明授权

US07901989B2 Reconstituted wafer level stacking 有权
标题翻译：重构晶圆级堆叠
公开(公告)号：US07901989B2
公开(公告)日：2011-03-08
申请号：US12143743
申请日：2008-06-20
申请人： Belgacem Haba , Ilyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Wills Mirkarimi
发明人： Belgacem Haba , Ilyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Wills Mirkarimi
IPC分类号： H01L21/00
CPC分类号： H01L21/78 , H01L21/6835 , H01L23/5382 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68377 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/9202 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2225/06582 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15311 , H01L2224/82 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A stacked microelectronic assembly is fabricated from a structure which includes a plurality of first microelectronic elements having front faces bonded to a carrier. Each first microelectronic element may have a first edge and a plurality of first traces extending along the front face towards the first edge. After exposing at least a portion of the first traces, a dielectric layer is formed over the plurality of first microelectronic elements. After thinning the dielectric layer, a plurality of second microelectronic elements are aligned and joined with the structure such that front faces of the second microelectronic elements are facing the rear faces of the plurality of first microelectronic elements. Processing is repeated to form the desirable number of layers of microelectronic elements. In one embodiment, the stacked layers of microelectronic elements may be notched at dicing lines to expose edges of traces, which may then be electrically connected to leads formed in the notches. Individual stacked microelectronic units may be separated from the stacked microelectronic assembly by any suitable dicing, sawing or breaking technique.
摘要翻译：堆叠的微电子组件由包括多个第一微电子元件的结构制成，所述第一微电子元件具有接合到载体的前表面。每个第一微电子元件可以具有第一边缘和沿前表面朝向第一边缘延伸的多个第一迹线。在暴露至少一部分第一迹线之后，在多个第一微电子元件上形成介电层。在使介电层变薄之后，多个第二微电子元件与该结构对准并接合，使得第二微电子元件的正面面对多个第一微电子元件的后表面。重复处理以形成所需数量的微电子元件层。在一个实施例中，微电子元件的堆叠层可以在切割线处切口以暴露迹线的边缘，其可以然后电连接到形成在凹口中的引线。可以通过任何合适的切割，锯切或断裂技术将单个堆叠的微电子单元与堆叠的微电子组件分开。

25. 发明授权

US07749886B2 Microelectronic assemblies having compliancy and methods therefor 有权
标题翻译：具有兼容性的微电子组件及其方法
公开(公告)号：US07749886B2
公开(公告)日：2010-07-06
申请号：US11643021
申请日：2006-12-20
申请人： Vage Oganesian , Guilian Gao , Belgacem Haba , David Ovrutsky
发明人： Vage Oganesian , Guilian Gao , Belgacem Haba , David Ovrutsky
IPC分类号： H01L21/44
CPC分类号： H01L24/12 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L2224/0231 , H01L2224/0401 , H01L2224/05599 , H01L2224/1132 , H01L2224/1147 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/3011 , H01L2924/351
摘要： A method of making a microelectronic assembly includes providing a semiconductor wafer having contacts accessible at a first surface, forming compliant bumps over the first surface and depositing a sacrificial layer over the compliant bumps. The method includes grinding the sacrificial layer and the compliant bumps so as to planarize top surfaces of the compliant bumps, whereby the planarized top surfaces are accessible through said sacrificial layer. The sacrificial layer is removed to expose the compliant bumps and the contacts. A silicone layer is deposited over the compliant bumps and portions of the silicone layer are removed to expose the contacts accessible at the first surface of the semiconductor wafer. Conductive traces are formed having first ends electrically connected with the contacts and second ends overlying the compliant bumps and conductive elements are provided atop the second ends of the traces.
摘要翻译：制造微电子组件的方法包括提供具有可在第一表面处接触的触点的半导体晶片，在第一表面上形成顺应性凸块并在顺应性凸块上沉积牺牲层。该方法包括研磨牺牲层和顺应性凸块，以平坦化顺应凸块的顶表面，由此平坦化的顶表面可通过所述牺牲层进入。去除牺牲层以暴露顺应性凸块和触点。将硅树脂层沉积在顺应性凸块上，并且除去硅氧烷层的部分以露出可在半导体晶片的第一表面处接触的触点。导电迹线形成为具有与触点电连接的第一端和覆盖顺应凸块的第二端，并且导电元件设置在迹线的第二端的顶部。

26. 发明申请

US20090160065A1 Reconstituted Wafer Level Stacking 有权
标题翻译：重建晶片级堆叠
公开(公告)号：US20090160065A1
公开(公告)日：2009-06-25
申请号：US12143743
申请日：2008-06-20
申请人： Belgacem Haba , llyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Wills Mirkarimi
发明人： Belgacem Haba , llyas Mohammed , Vage Oganesian , David Ovrutsky , Laura Wills Mirkarimi
IPC分类号： H01L23/52 , H01L21/00
CPC分类号： H01L21/78 , H01L21/6835 , H01L23/5382 , H01L24/24 , H01L24/48 , H01L24/82 , H01L24/96 , H01L24/97 , H01L25/0657 , H01L25/50 , H01L2221/68377 , H01L2224/16225 , H01L2224/16227 , H01L2224/24145 , H01L2224/48091 , H01L2224/48145 , H01L2224/48227 , H01L2224/9202 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06517 , H01L2225/06524 , H01L2225/06541 , H01L2225/06551 , H01L2225/06582 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/01082 , H01L2924/014 , H01L2924/12042 , H01L2924/15311 , H01L2224/82 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207 , H01L2924/00012
摘要： A stacked microelectronic assembly is fabricated from a structure which includes a plurality of first microelectronic elements having front faces bonded to a carrier. Each first microelectronic element may have a first edge and a plurality of first traces extending along the front face towards the first edge. After exposing at least a portion of the first traces, a dielectric layer is formed over the plurality of first microelectronic elements. After thinning the dielectric layer, a plurality of second microelectronic elements are aligned and joined with the structure such that front faces of the second microelectronic elements are facing the rear faces of the plurality of first microelectronic elements. Processing is repeated to form the desirable number of layers of microelectronic elements. In one embodiment, the stacked layers of microelectronic elements may be notched at dicing lines to expose edges of traces, which may then be electrically connected to leads formed in the notches. Individual stacked microelectronic units may be separated from the stacked microelectronic assembly by any suitable dicing, sawing or breaking technique.
摘要翻译：堆叠的微电子组件由包括多个第一微电子元件的结构制成，所述第一微电子元件具有接合到载体的前表面。每个第一微电子元件可以具有第一边缘和沿前表面朝向第一边缘延伸的多个第一迹线。在暴露至少一部分第一迹线之后，在多个第一微电子元件上形成介电层。在使介电层变薄之后，多个第二微电子元件与该结构对准并接合，使得第二微电子元件的正面面对多个第一微电子元件的后表面。重复处理以形成所需数量的微电子元件层。在一个实施例中，微电子元件的堆叠层可以在切割线处切口以暴露迹线的边缘，其可以然后电连接到形成在凹口中的引线。可以通过任何合适的切割，锯切或断裂技术将单个堆叠的微电子单元与堆叠的微电子组件分开。

27. 发明申请

US20080150121A1 Microelectronic assemblies having compliancy and methods therefor 有权
标题翻译：具有兼容性的微电子组件及其方法
公开(公告)号：US20080150121A1
公开(公告)日：2008-06-26
申请号：US11643021
申请日：2006-12-20
申请人： Vage Oganesian , Guilian Gao , Belgacem Haba , David Ovrutsky
发明人： Vage Oganesian , Guilian Gao , Belgacem Haba , David Ovrutsky
IPC分类号： H01L23/02 , H01L21/00
CPC分类号： H01L24/12 , H01L23/3114 , H01L24/03 , H01L24/05 , H01L24/11 , H01L24/16 , H01L2224/0231 , H01L2224/0401 , H01L2224/05599 , H01L2224/1132 , H01L2224/1147 , H01L2224/13099 , H01L2224/13144 , H01L2224/13147 , H01L2924/00014 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01024 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/3011 , H01L2924/351
摘要： A method of making a microelectronic assembly includes providing a semiconductor wafer having contacts accessible at a first surface, forming compliant bumps over the first surface and depositing a sacrificial layer over the compliant bumps. The method includes grinding the sacrificial layer and the compliant bumps so as to planarize top surfaces of the compliant bumps, whereby the planarized top surfaces are accessible through said sacrificial layer. The sacrificial layer is removed to expose the compliant bumps and the contacts. A silicone layer is deposited over the compliant bumps and portions of the silicone layer are removed to expose the contacts accessible at the first surface of the semiconductor wafer. Conductive traces are formed having first ends electrically connected with the contacts and second ends overlying the compliant bumps and conductive elements are provided atop the second ends of the traces.
摘要翻译：制造微电子组件的方法包括提供具有可在第一表面处接触的触点的半导体晶片，在第一表面上形成顺应性凸块并在顺应性凸块上沉积牺牲层。该方法包括研磨牺牲层和顺应性凸块，以平坦化顺应凸块的顶表面，由此平坦化的顶表面可通过所述牺牲层进入。去除牺牲层以暴露顺应性凸块和触点。将硅树脂层沉积在顺应性凸块上，并且除去硅氧烷层的部分以露出可在半导体晶片的第一表面处接触的触点。导电迹线形成为具有与触点电连接的第一端和覆盖顺应凸块的第二端，并且导电元件设置在迹线的第二端的顶部。

28. 发明授权

US09233511B2 Method of making stamped multi-layer polymer lens 有权
标题翻译：冲压多层聚合物镜片的制作方法
公开(公告)号：US09233511B2
公开(公告)日：2016-01-12
申请号：US13468632
申请日：2012-05-10
申请人： Vage Oganesian , Zhenhua Lu
发明人： Vage Oganesian , Zhenhua Lu
IPC分类号： B29D11/00
CPC分类号： B29D11/00403
摘要： A method of forming lenses includes providing a lens handler having a plurality of cavities formed into an upper surface thereof. For each of the cavities, the method includes dispensing a first polymer material into the cavity, pressing a non-planar stamp surface onto the first polymer material wherein an upper surface of the first polymer material is conformed to the non-planar stamp surface, and applying UV light to the first polymer material to cure the first polymer material. A dispenser carrier can be used that includes a plurality of liquid polymer dispensers. A stamp carrier can be used that includes a plurality of stamps each having a non-planar stamp surface. Alternately, a stamp handler having a plurality of stamps arranged along a curved surface can be used to roll along the polymer material such that an upper surface thereof conforms to the non-planar stamp surfaces.
摘要翻译：一种形成透镜的方法包括提供具有形成在其上表面中的多个空腔的透镜处理器。对于每个空腔，所述方法包括将第一聚合物材料分配到空腔中，将非平面印模表面压在第一聚合物材料上，其中第一聚合物材料的上表面与非平面印模表面一致，以及将UV光施加到第一聚合物材料以固化第一聚合物材料。可以使用包括多个液体聚合物分配器的分配器载体。可以使用包括多个具有非平面印记表面的印章的邮票载体。或者，可以使用具有沿着曲面布置的多个邮票的邮票处理器沿着聚合物材料滚动，使得其上表面符合非平面印记表面。

29. 发明授权

US09125333B2 Electrical barrier layers 有权
标题翻译：电阻层
公开(公告)号：US09125333B2
公开(公告)日：2015-09-01
申请号：US13183870
申请日：2011-07-15
申请人： Cyprian Uzoh , Vage Oganesian , Ilyas Mohammed , Belgacem Haba , Piyush Savalia , Craig Mitchell
发明人： Cyprian Uzoh , Vage Oganesian , Ilyas Mohammed , Belgacem Haba , Piyush Savalia , Craig Mitchell
IPC分类号： H05K1/03 , H05K1/09 , H05K3/40
CPC分类号： H01L24/05 , H01L2224/04042 , H01L2224/05083 , H01L2224/05139 , H01L2224/05144 , H01L2224/05147 , H01L2224/05155 , H01L2224/05164 , H01L2224/05169 , H01L2224/056 , H01L2924/01005 , H01L2924/01006 , H01L2924/01015 , H01L2924/01074 , H01L2924/013 , H05K1/09 , H05K3/4007 , H05K2201/032 , H05K2201/0326 , H05K2201/0338
摘要： Barrier layers for use in electrical applications. In some embodiments the barrier layer is a laminated barrier layer. In some embodiments the barrier layer includes a graded barrier layer.
摘要翻译：用于电气应用的阻隔层。在一些实施例中，阻挡层是层压阻挡层。在一些实施例中，阻挡层包括梯度阻挡层。

30. 发明授权

US08937361B2 BSI image sensor package with variable-height silicon for even reception of different wavelengths 有权
标题翻译： BSI图像传感器封装，具有可变高度的硅，用于均匀接收不同的波长
公开(公告)号：US08937361B2
公开(公告)日：2015-01-20
申请号：US13114243
申请日：2011-05-24
申请人： Vage Oganesian , Belgacem Haba , Ilyas Mohammed , Piyush Savalia , Craig Mitchell
发明人： Vage Oganesian , Belgacem Haba , Ilyas Mohammed , Piyush Savalia , Craig Mitchell
IPC分类号： H01L31/0232 , H01L27/146
CPC分类号： H01L27/14625 , H01L27/1461 , H01L27/14629 , H01L27/14632 , H01L27/1464 , H01L27/14645 , H01L27/14687
摘要： A microelectronic image sensor assembly for backside illumination and method of making same are provided. The assembly includes a microelectronic element having contacts exposed at a front face and light sensing elements arranged to receive light of different wavelengths through a rear face. A semiconductor region has a first thickness between the first light sensing element and the rear face and a second thickness between the second light sensing element and the rear face such that the first and second light sensing elements receive light of substantially the same intensity. A dielectric region is provided at least substantially filling a space of the semiconductor region adjacent at least one of the light sensing elements. The dielectric region may include at least one light guide.
摘要翻译：提供了一种用于背面照明的微电子图像传感器组件及其制造方法。该组件包括具有在正面暴露的触点的微电子元件和被布置成通过后表面接收不同波长的光的光感测元件。半导体区域在第一光感测元件和后表面之间具有第一厚度，并且在第二光感测元件和后表面之间具有第二厚度，使得第一和第二光感测元件接收基本上相同强度的光。提供至少基本上填充与至少一个光感测元件相邻的半导体区域的空间的电介质区域。电介质区域可以包括至少一个光导。

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