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21. 发明授权

US07754578B2 Process for manufacturing a wafer by annealing of buried channels 有权
标题翻译：掩埋通道退火制造晶圆的工艺
公开(公告)号：US07754578B2
公开(公告)日：2010-07-13
申请号：US11904745
申请日：2007-09-28
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

22. 发明申请

US20070042558A1 Process for manufacturing a high-quality SOI wafer 有权
标题翻译：用于制造高质量SOI晶片的工艺
公开(公告)号：US20070042558A1
公开(公告)日：2007-02-22
申请号：US11448589
申请日：2006-06-06
申请人： Flavio Villa , Pietro Corona , Gabriele Barlocchi
发明人： Flavio Villa , Pietro Corona , Gabriele Barlocchi
IPC分类号： H01L21/8222 , H01L21/331
CPC分类号： H01L21/76264 , H01L21/3247
摘要： In a process for manufacturing a SOI wafer, the following steps are envisaged: forming, in a monolithic body of semiconductor material having a front face, a buried cavity, which extends at a distance from the front face and delimits, with the front face, a surface region of the monolithic body, the surface region being surrounded by a bulk region and forming a flexible membrane suspended above the buried cavity; forming, through the monolithic body, at least one access passage, which reaches the buried cavity; and filling the buried cavity uniformly with an insulating region. The surface region is continuous and formed by a single portion of semiconductor material, and the buried cavity is contained and completely insulated within the monolithic body; the step of forming at least one access passage is performed after the step of forming a buried cavity.
摘要翻译：在制造SOI晶片的工艺中，设想以下步骤：在具有前表面的半导体材料的整体式中，与前表面相距一定距离地延伸的掩埋腔，所述整体体的表面区域，所述表面区域被块体区域包围并形成悬浮在所述掩埋空腔上方的柔性膜; 通过整体式的主体形成至少一个到达埋入腔的进入通道; 并且用绝缘区域均匀地填充掩埋腔。表面区域是连续的，由半导体材料的单一部分形成，并且掩埋腔被包含并在整体体内完全绝缘; 在形成掩埋腔的步骤之后，进行形成至少一个进入通道的步骤。

23. 发明授权

US06992367B2 Process for forming a buried cavity in a semiconductor material wafer and a buried cavity 有权
标题翻译：在半导体材料晶片和掩埋腔中形成掩埋腔的工艺
公开(公告)号：US06992367B2
公开(公告)日：2006-01-31
申请号：US10712211
申请日：2003-11-12
申请人： Pietro Erratico , Enrico Sacchi , Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Pietro Erratico , Enrico Sacchi , Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L29/00
CPC分类号： B81C1/00404
摘要： The process comprises the steps of forming, on top of a semiconductor material wafer, a holed mask having a lattice structure and comprising a plurality of openings each having a substantially square shape and a side with an inclination of 45° with respect to the flat of the wafer; carrying out an anisotropic etch in TMAH of the wafer, using said holed mask, thus forming a cavity, the cross section of which has the shape of an upside-down isosceles trapezium; and carrying out a chemical vapor deposition using TEOS, thus forming a TEOS layer which completely closes the openings of the holed mask and defines a diaphragm overlying the cavity and on which a suspended integrated structure can subsequently be manufactured.
摘要翻译：该方法包括以下步骤：在半导体材料晶片的顶部上形成具有格子结构的孔掩模，并且包括多个开口，每个开口具有大致正方形的形状，并且相对于平面的平面倾斜45° 晶圆; 在晶片的TMAH中进行各向异性蚀刻，使用所述带孔掩模，从而形成空腔，其横截面具有倒立的等腰梯形的形状; 并且使用TEOS进行化学气相沉积，由此形成TEOS层，其完全封闭了孔罩的开口，并且限定了覆盖在空腔上的隔膜，并且随后可以制造悬浮的一体结构。

24. 发明授权

US06559035B2 Method for manufacturing an SOI wafer 有权
公开(公告)号：US06559035B2
公开(公告)日：2003-05-06
申请号：US10068108
申请日：2002-02-05
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Montanini
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Montanini
IPC分类号： H01L2136
CPC分类号： H01L21/3065 , H01L21/76248 , H01L21/76294
摘要： Method for manufacturing an SOI wafer. On a monocrystalline silicon wafer, forming protective regions having the shape of an overturned U, made of an oxidation resistant material, the protective regions covering first wafer portions. Forming deep trenches in the wafer which extend between, and laterally delimit the first wafer portions, completely oxidizing the first wafer portions except their upper areas which are covered by the protective regions, to form at least one continuous region of covered oxide overlaid by the non-oxidized upper portions. Removing the protective regions, and epitaxially growing a crystalline semiconductor material layer from the non-oxidized upper portions.

25. 发明授权

US06455391B1 Method of forming structures with buried regions in a semiconductor device 有权
标题翻译：在半导体器件中形成具有掩埋区域的结构的方法
公开(公告)号：US06455391B1
公开(公告)日：2002-09-24
申请号：US09613109
申请日：2000-07-10
申请人： Flavio Villa , Gabriele Barlocchi
发明人： Flavio Villa , Gabriele Barlocchi
IPC分类号： H01L2176
CPC分类号： H01L21/76208 , H01L21/763
摘要： A monocrystalline silicon substrate is subjected to the following operations: implantation of doping impurities in a high concentration to form a planar region of a first type; selective anisotropic etching in order to hollow out trenches to a depth greater than the depth of the planar region; oxidation of the silicon inside the trenches, starting a certain distance from the surface of the substrate, until a silicon dioxide plaque is formed, surmounted by residues of strongly-doped silicon; epitaxial growth between and on top of the silicon residues to close the trenches and to bring about a redistribution of the doping impurities into the silicon grown to produce a buried region with low resistivity in an epitaxial layer of high resistivity.
摘要翻译：对单晶硅衬底进行以下操作：以高浓度注入掺杂杂质以形成第一类型的平面区域; 选择性各向异性蚀刻，以便将沟槽镂空到比平面区域的深度大的深度; 在沟槽内氧化硅，从衬底的表面开始一定距离，直到形成二氧化硅斑块，被强掺杂硅的残余物所覆盖; 在硅残余物之间和之上的外延生长以封闭沟槽，并且使掺杂杂质重新分配到生长的硅中，以在高电阻率的外延层中产生具有低电阻率的掩埋区域。

26. 发明授权

US06376291B1 Process for manufacturing buried channels and cavities in semiconductor material wafers 有权
标题翻译：用于在半导体材料晶片中制造掩埋沟道和空腔的工艺
公开(公告)号：US06376291B1
公开(公告)日：2002-04-23
申请号：US09558959
申请日：2000-04-25
申请人： Gabriele Barlocchi , Flavio Villa , Pietro Corona
发明人： Gabriele Barlocchi , Flavio Villa , Pietro Corona
IPC分类号： H01L21338
CPC分类号： B81C1/00047 , B01L3/5027 , B81B2203/0315 , B81B2203/0338 , B81C2201/0177 , H01L21/764
摘要： A process of forming on a monocrystalline-silicon body an etching-aid region of polycrystalline silicon; forming, on the etching-aid region a nucleus region of polycrystalline silicon surrounded by a protective structure having an opening extending as far as the etching-aid region; TMAH-etching the etching-aid region and the monocrystalline body to form a tub-shaped cavity; removing the top layer of the protective structure; and growing an epitaxial layer on the monocrystalline body and the nucleus region. The epitaxial layer, of monocrystalline type on the monocrystalline body and of polycrystalline type on the nucleus region, closes upwardly the etching opening, and the cavity is thus completely embedded in the resulting wafer.
摘要翻译：在单晶硅体上形成多晶硅的蚀刻助剂区域的工艺; 在所述蚀刻助剂区域上形成由保护结构包围的多晶硅的核区域，所述保护结构具有延伸到所述蚀刻助剂区域的开口; TMAH蚀刻蚀刻助剂区域和单晶体体以形成桶形空腔; 去除保护结构的顶层; 并在单晶体和核区域上生长外延层。在单晶体上的单晶型的外延层和在核区上的多晶型的外延层向上封闭蚀刻开口，并且因此该空腔完全嵌入所得的晶片中。

27. 发明授权

US07705416B2 Method for forming horizontal buried channels or cavities in wafers of monocrystalline semiconductor material 有权
标题翻译：在单晶半导体材料的晶片中形成水平埋入通道或空腔的方法
公开(公告)号：US07705416B2
公开(公告)日：2010-04-27
申请号：US10667113
申请日：2003-09-18
申请人： Gabriele Barlocchi , Flavio Villa
发明人： Gabriele Barlocchi , Flavio Villa
IPC分类号： H01L29/00
CPC分类号： H01L21/2007 , H01L21/30608 , H01L21/3086 , H01L21/76251 , H01L21/76262 , H01L21/764
摘要： A method of forming buried cavities in a wafer of monocrystalline semiconductor material with at least one cavity formed in a substrate of monocrystalline semiconductor material by timed TMAH etching silicon; covering the cavity with a material inhibiting epitaxial growth; and growing a monocrystalline epitaxial layer above the substrate and the cavities. Thereby, the cavity is completely surrounded by monocrystalline material. Starting from this wafer, it is possible to form a thin membrane. The original wafer must have a plurality of elongate cavities or channels, parallel and adjacent to one another. Trenches are then excavated in the epitaxial layer as far as the channels, and the dividers between the channels are removed by timed TMAH etching.
摘要翻译：在单晶半导体材料的晶片中形成掩埋空穴的方法，其中至少一个腔通过定时的TMAH蚀刻硅在单晶半导体材料的衬底中形成; 用抑制外延生长的材料覆盖空腔; 以及在衬底和空腔上生长单晶外延层。因此，腔体被单晶材料完全包围。从该晶片开始，可以形成薄膜。原始晶片必须具有彼此平行并相邻的多个细长空腔或通道。然后在外延层中挖沟直到沟道，并且通过定时TMAH蚀刻去除沟道之间的分隔线。

28. 发明授权

US07071073B2 Process for manufacturing low-cost and high-quality SOI substrates 有权
公开(公告)号：US07071073B2
公开(公告)日：2006-07-04
申请号：US10331189
申请日：2002-12-26
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/76
CPC分类号： H01L21/76262 , H01L21/31662 , H01L21/76208
摘要： For manufacturing an SOI substrate, the following steps are carried out: providing a wafer of semiconductor material; forming, inside the wafer, a plurality of passages forming a labyrinthine cavity and laterally delimiting a plurality of pillars of semiconductor material; and oxidizing the pillars of semiconductor material to form a buried insulating layer. For forming the labyrinthine cavity, a trench is first formed in a substrate; an epitaxial layer is grown, which closes the trench at the top; the wafer is annealed so as to deform the pillars and cause them to assume a minimum-energy handlebar-like shape, and a peripheral portion of the wafer is removed to reach the labyrinthine cavity, and side inlet openings are formed in the labyrinthine cavity. Oxidation is performed by feeding an oxidizing fluid through the side inlet openings.

29. 发明授权

US06362070B1 Process for manufacturing a SOI wafer with buried oxide regions without cusps 失效
标题翻译：用于制造具有埋藏氧化物区域的SOI晶片的方法，而不具有尖端
公开(公告)号：US06362070B1
公开(公告)日：2002-03-26
申请号：US09558934
申请日：2000-04-26
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L2176
CPC分类号： H01L21/02238 , H01L21/02299 , H01L21/31662 , H01L21/32 , H01L21/76208 , H01L21/76248
摘要： A process for manufacturing a SOI wafer with buried oxide regions without cusps that includes forming, in a wafer of monocrystalline semiconductor material, trenches extending between, and delimiting laterally, protruding regions; forming masking regions, implanted with nitrogen ions, the masking regions surrounding completely the tips of the protruding regions; and forming retarding regions on the bottom of the trenches, wherein nitrogen is implanted at a lower dose than the masking regions. A thermal oxidation is then carried out and starts at the bottom portion of the protruding regions and then proceeds downwards; thereby, a continuous region of buried oxide is formed and is overlaid by non-oxidized regions corresponding to the tips of the protruding regions and forming nucleus regions for a subsequent epitaxial growth. The masking regions and the retarding regions are formed through two successive implants, including an angle implant, wherein the protruding regions shield the bottom portions of the adjacent protruding regions, as well as the bottom of the trenches, and a vertical implant is made perpendicularly to the wafer.
摘要翻译：一种用于制造具有埋藏氧化物区域而没有尖端的SOI晶片的方法，包括在单晶半导体材料的晶片中形成在横向延伸并限定突出区域的沟槽; 形成掩蔽区域，注入氮离子，掩蔽区域完全围绕突出区域的尖端; 以及在沟槽的底部形成延迟区域，其中以比掩蔽区域低的剂量注入氮。然后进行热氧化，并从突出区域的底部开始，然后向下移动; 由此，形成了埋入氧化物的连续区域，并且由对应于突出区域的尖端的非氧化区域覆盖并形成用于随后的外延生长的核区域。掩模区域和延迟区域通过两个连续的植入物形成，包括角度注入，其中突出区域屏蔽相邻突出区域的底部以及沟槽的底部，垂直植入物垂直于晶圆。

30. 发明授权

US07294536B2 Process for manufacturing an SOI wafer by annealing and oxidation of buried channels 有权
标题翻译：通过掩埋通道的退火和氧化来制造SOI晶片的工艺
公开(公告)号：US07294536B2
公开(公告)日：2007-11-13
申请号：US10327702
申请日：2002-12-20
申请人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
发明人： Flavio Villa , Gabriele Barlocchi , Pietro Corona
IPC分类号： H01L21/00
CPC分类号： H01L21/76283 , H01L21/3003 , H01L21/3247 , H01L21/76289 , H01L21/764 , H01L29/0649 , Y10S438/967
摘要： A process for manufacturing an SOI wafer, including the steps of: forming, in a wafer of semiconductor material, cavities delimiting structures of semiconductor material; thinning out the structures through a thermal process; and completely oxidizing the structures.
摘要翻译：一种制造SOI晶片的方法，包括以下步骤：在半导体材料的晶片中形成限定半导体材料结构的空腔; 通过热过程稀释结构; 并完全氧化结构。

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