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21. 发明申请

US20140091145A1 INTEGRATED CIRCUITS WITH PERSISTENT DATA STORAGE 有权
标题翻译：具有持续数据存储的集成电路
公开(公告)号：US20140091145A1
公开(公告)日：2014-04-03
申请号：US13900296
申请日：2013-05-22
申请人： Curtis L. Carrender , Roger G. Stewart , John H. Rolin , Ronald Gilbert
发明人： Curtis L. Carrender , Roger G. Stewart , John H. Rolin , Ronald Gilbert
IPC分类号： G06K7/10
CPC分类号： G06K19/0723 , G06K7/10019 , G06K19/07381
摘要： The circuitry introduced in this invention selectively slows down the functioning of an electronic circuit maintaining a particular state for a prolonged period of time. This circuitry is used not only to achieve the desired effect in maintaining security from electronic thieves trying to circumvent codes but also in other applications such as enabling a circuit to continue to function in the event of a brief loss of power. For example, in an RFID system, if a reader is frequency hopping, a tag loses power for as long as about 400 milliseconds when the reader changes to other frequencies. In a preferred embodiment, the disclosed circuitry is used in conjunction with a destruct sequence.
摘要翻译：在本发明中引入的电路选择性地减慢保持特定状态长时间的电子电路的功能。该电路不仅用于在维护电子窃贼试图绕过代码的安全性方面实现期望的效果，而且在其他应用中，例如使电路在短暂的功率损失的情况下继续工作。例如，在RFID系统中，如果读取器跳频，当读取器改变到其他频率时，标签失去长达约400毫秒的功率。在优选实施例中，所公开的电路与破坏序列结合使用。

22. 发明授权

US08279047B2 Methods and apparatus for anti-collision for radio frequency communication 有权
标题翻译：射频通信防碰撞方法和装置
公开(公告)号：US08279047B2
公开(公告)日：2012-10-02
申请号：US11891419
申请日：2007-08-10
申请人： Curt Carrender , John M. Price , Frederick A. Nylander , John H. Rolin , Roger G. Stewart
发明人： Curt Carrender , John M. Price , Frederick A. Nylander , John H. Rolin , Roger G. Stewart
IPC分类号： H04Q5/22
CPC分类号： H04W74/00 , G06K7/0008 , G06K7/10049 , H04W24/00 , H04W52/0219 , Y02D70/166
摘要： An identification system includes a reader and one or more tags. The reader identifies tags such as radio frequency (RF) tags. The system divides a number space into n bins, wherein each bin is associated with m unique bits of the number space, and the number space contains the identification codes of the tags. A command is issued to test v bits of the number space. A response is received from a tag, wherein the response occurs when a first portion of an identification code of the tag matches the v bits of the number space, a timing of the response corresponds to a particular bin and m unique bits associated with the particular bin correspond to a second portion of the identification code.
摘要翻译：识别系统包括读取器和一个或多个标签。读者识别标签，如射频（RF）标签。该系统将数字空间划分为n个存储区，其中每个仓都与数字空间的m个唯一位相关联，并且数字空间包含标签的识别码。发出一个命令来测试数字空间的v位。从标签接收到响应，其中响应发生在标签的识别码的第一部分与数字空间的v位匹配时，响应的定时对应于特定的bin，并且与特定的相关联的m个唯一的位 bin对应于识别码的第二部分。

23. 发明授权

US07411503B2 System and method for disabling data on radio frequency identification tags 有权
标题翻译：禁止射频识别标签数据的系统和方法
公开(公告)号：US07411503B2
公开(公告)日：2008-08-12
申请号：US11535436
申请日：2006-09-26
申请人： Roger G. Stewart , John Rolin , Curtis Carrender
发明人： Roger G. Stewart , John Rolin , Curtis Carrender
IPC分类号： H04Q9/00 , H04Q5/22 , G08B13/14 , G06F17/00 , G06K15/00 , G06K17/00 , G06K19/06 , G06Q20/00
CPC分类号： G06K19/07345 , G06K19/073 , G06Q20/20 , G06Q20/201 , G06Q20/202 , G06Q20/203 , G06Q20/204 , G06Q20/206 , G06Q20/207
摘要： The disclosed embodiments of the present invention are used to permanently disable or destruct an RFID so that it is no longer possible to read some or all of the data encoded on the RFID tag. In one method for disabling data on a radio frequency identification (RFID) tag, an RFID tag is identified and its identity is confirmed. Verification that a prerequisite event has occurred is obtained, occurrence of which is required prior to disablement of the data. A destruct instruction is transmitted to the RFID tag. The RFID tag verifies that the destruct instruction is valid and disables the data upon verifying validity of the destruct instruction. The tag may disable the data by erasing the data, disabling the data, auto-destructing, or performing any operation that makes the data unreadable.
摘要翻译：本发明的所公开的实施例用于永久地禁用或破坏RFID，使得不再可能读取编码在RFID标签上的一些或全部数据。在一种用于禁用射频识别（RFID）标签上的数据的方法中，识别RFID标签并确认其标识。获得发生先决条件事件的验证，在数据禁用之前需要其发生。毁坏指令被传送到RFID标签。 RFID标签验证破坏指令是否有效，并在验证破坏指令的有效性时禁止数据。标签可以通过擦除数据，禁用数据，自动破坏或执行使数据不可读的任何操作来禁用数据。

24. 发明授权

US07173528B1 System and method for disabling data on radio frequency identification tags 有权
标题翻译：禁止射频识别标签数据的系统和方法
公开(公告)号：US07173528B1
公开(公告)日：2007-02-06
申请号：US11029445
申请日：2005-01-04
申请人： Roger G. Stewart , John Rolin , Curtis Carrender
发明人： Roger G. Stewart , John Rolin , Curtis Carrender
IPC分类号： H04Q5/22 , H04M11/04 , G08B11/21
CPC分类号： G06K19/07345
摘要： The disclosed embodiments of the present invention are used to permanently disable or destruct an RFID so that it is no longer possible to read some or all of the data encoded on the RFID tag. In one method for disabling data on a radio frequency identification (RFID) tag, an RFID tag is identified and its identity is confirmed. Verification that a prerequisite event has occurred is obtained, occurrence of which is required prior to disablement of the data. A destruct instruction is transmitted to the RFID tag. The RFID tag verifies that the destruct instruction is valid and disables the data upon verifying validity of the destruct instruction. The tag may disable the data by erasing the data, disabling the data, auto-destructing, or performing any operation that makes the data unreadable.
摘要翻译：本发明的所公开的实施例用于永久地禁用或破坏RFID，使得不再可能读取编码在RFID标签上的一些或全部数据。在一种用于禁用射频识别（RFID）标签上的数据的方法中，识别RFID标签并确认其标识。获得发生先决条件事件的验证，在数据禁用之前需要其发生。毁坏指令被传送到RFID标签。 RFID标签验证破坏指令是否有效，并在验证破坏指令的有效性时禁止数据。标签可以通过擦除数据，禁用数据，自动破坏或执行使数据不可读的任何操作来禁用数据。

25. 发明授权

US06933848B1 System and method for disabling data on radio frequency identification tags 有权
标题翻译：禁止射频识别标签数据的系统和方法
公开(公告)号：US06933848B1
公开(公告)日：2005-08-23
申请号：US10141489
申请日：2002-05-07
申请人： Roger G. Stewart , John Rolin , Curtis Carrender
发明人： Roger G. Stewart , John Rolin , Curtis Carrender
IPC分类号： G06K19/073 , G08B13/14 , G08B21/00 , H04M11/04 , H04Q5/22
CPC分类号： G06K19/07345 , G06K19/073 , G06Q20/20 , G06Q20/201 , G06Q20/202 , G06Q20/203 , G06Q20/204 , G06Q20/206 , G06Q20/207
摘要： The disclosed embodiments of the present invention are used to permanently disable or destruct an RFID so that it is no longer possible to read some or all of the data encoded on the RFID tag. In one method for disabling data on a radio frequency identification (RFID) tag, an RFID tag is identified and its identity is confirmed. Verification that a prerequisite event has occurred is obtained, occurrence of which is required prior to disablement of the data. A destruct instruction is transmitted to the RFID tag. The RFID tag verifies that the destruct instruction is valid and disables the data upon verifying validity of the destruct instruction. The tag may disable the data by erasing the data, disabling the data, auto-destructing, or performing any operation that makes the data unreadable.
摘要翻译：本发明的所公开的实施例用于永久地禁用或破坏RFID，使得不再可能读取编码在RFID标签上的一些或全部数据。在一种用于禁用射频识别（RFID）标签上的数据的方法中，识别RFID标签并确认其标识。获得发生先决条件事件的验证，在数据禁用之前需要其发生。毁坏指令被传送到RFID标签。 RFID标签验证破坏指令是否有效，并在验证破坏指令的有效性时禁止数据。标签可以通过擦除数据，禁用数据，自动破坏或执行使数据不可读的任何操作来禁用数据。

26. 发明授权

US5148058A Logic circuits as for amorphous silicon self-scanned matrix arrays 失效
标题翻译：用于非晶硅自扫描矩阵阵列的逻辑电路
公开(公告)号：US5148058A
公开(公告)日：1992-09-15
申请号：US620682
申请日：1990-12-03
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G02F1/133 , G02F1/136 , G02F1/1368 , G09G3/20 , G09G3/36
CPC分类号： G09G3/2011 , G09G3/3688 , G09G2310/027
摘要： A logic circuit includes pull-up and pull-down transistors and a capacitance, the principal conducting paths of the transistors and the capacitance being coupled in series between a first supply bus and a source of time varying potential. The pull-up transistor is coupled to the capacitance and the capacitance is coupled to the time varying potential. First and second logic signals are applied to the control electrodes of the first and second transistors respectively. The time varying potential is arranged to limit the charge passed by the pull-up transistor permitting use of a relatively small pull-down transistor. The time varying potential has an amplitude sufficiently large to tend to stress the pull-up transistor if such transistor is non conducting. A selectively conductive element (diode) is coupled between a point of clamping potential and the interconnection of the pull-up transistor and capacitance.
摘要翻译：逻辑电路包括上拉和下拉晶体管和一个电容，晶体管的主要导电路径和电容串联在第一电源总线和时变电源之间。上拉晶体管耦合到电容，并且电容耦合到时变电位。第一和第二逻辑信号分别施加到第一和第二晶体管的控制电极。时变电位被布置为限制允许使用相对较小的下拉晶体管的上拉晶体通过的电荷。如果这种晶体管不导通，则时变电位具有足够大的幅度以倾向于对上拉晶体管施加应力。选择性导电元件（二极管）耦合在钳位电位点和上拉晶体管与电容互连之间。

27. 发明授权

US4833644A Memory cell circuit having radiation hardness 失效
标题翻译：存储单元电路具有辐射硬度
公开(公告)号：US4833644A
公开(公告)日：1989-05-23
申请号：US900520
申请日：1986-08-26
申请人： Dora Plus , Roger G. Stewart
发明人： Dora Plus , Roger G. Stewart
IPC分类号： G11C5/00 , G11C11/412 , H01L27/11
CPC分类号： G11C5/005 , G11C11/4125 , H01L27/11 , H01L27/1104
摘要： A memory cell circuit has a pair of inverters and a means, such as gate-drain coupled capacitors, for providing a greater voltage difference at MOS transistor gates during radiation than an initial value. This tends to preserve the latch logic state and thus prevent a change in logic state during radiation.
摘要翻译：存储单元电路具有一对反相器和诸如栅 - 漏耦合电容器的装置，用于在辐射期间在MOS晶体管栅极处提供比初始值更大的电压差。这趋向于保持锁存逻辑状态，从而防止辐射期间逻辑状态的改变。

28. 发明授权

US4612466A High-speed output driver 失效
标题翻译：高速输出驱动
公开(公告)号：US4612466A
公开(公告)日：1986-09-16
申请号：US646102
申请日：1984-08-31
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： H03K19/00 , H03K19/017 , H03K17/04 , H03K5/12 , H03K17/687
CPC分类号： H03K19/01721 , H03K19/0013
摘要： The circuit includes amplifying means whose signal transfer characteristics may be varied connected between an input signal terminal and an output stage and feedback means coupled between the output stage and the amplifying means for altering the signal transfer characteristics of the amplifying means as a function of the output of the output stage. In response to an input signal making a transition from "high" to "low" causing the output stage output to go from a first level to a second level the amplifying means is set to a first condition for which it responds quickly to an input signal making a transition from "low" to "high". In response to a low-to-high transition of the input signal the output stage output goes from the second to the first level and the amplifying means is set to a second condition for which it responds quickly to a high-to-low input signal transition.
摘要翻译：该电路包括放大装置，其信号传输特性可以连接在输入信号端和输出级之间，反馈装置耦合在输出级与放大装置之间，用于根据输出改变放大装置的信号传输特性的输出级。响应于输入信号从“高”转变为“低”，导致输出级输出从第一电平变为第二电平，放大装置被设置为第一条件，其对输入信号进行快速响应从“低”转向“高”。响应于输入信号的低到高转换，输出级输出从第二级输入到第一级，并且放大装置被设置为第二状态，其对其快速响应于高到低的输入信号过渡。

29. 发明授权

US4434381A Sense amplifiers 失效
标题翻译：感应放大器
公开(公告)号：US4434381A
公开(公告)日：1984-02-28
申请号：US328437
申请日：1981-12-07
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G11C7/06 , H03K5/02 , H03K5/153 , H03K3/356
CPC分类号： H03K5/023 , G11C7/067
摘要： A sense amplifier having a transition point defining the signal level at its input above which it senses one binary condition and below which it senses the other binary condition includes precharge means for offsetting the voltage at its input a small amount (.DELTA.V) in a particular sense (which may be plus or minus) from its transition point. The amplifier also includes controllable impedance means connected to its output for adjusting its output at the termination of a precharge period to a voltage level which causes the amplifier to respond in a relatively symmetrical manner to input signals of either binary condition.
摘要翻译：具有定义在其输入处的信号电平的转变点的读出放大器，其在其上感测一个二进制条件，并且低于该二值条件的其它二进制条件包括预充电装置，用于在其输入端偏移特定电压（DELTA V）的电压感觉（可能是正负）从它的转换点。放大器还包括连接到其输出端的可控阻抗装置，用于在预充电周期结束时将其输出调节到使得放大器以相对对称的方式响应于二进制条件的输入信号的电压电平。

30. 发明授权

US4337522A Memory circuit with means for compensating for inversion of stored data 失效
标题翻译：具有用于补偿存储数据的反转的装置的存储器电路
公开(公告)号：US4337522A
公开(公告)日：1982-06-29
申请号：US145324
申请日：1980-04-29
申请人： Roger G. Stewart
发明人： Roger G. Stewart
IPC分类号： G11C7/14 , G11C11/4063 , G11C14/00 , G11C7/00
CPC分类号： G11C7/14 , G11C14/00
摘要： Information stored in a reference cell is inverted when the information stored in a memory cell is inverted. The memory cell information is derived from a first Exclusive OR gate receptive of an input data signal and the reference cell output signal. Information is read out of the memory cell via a second Exclusive-OR gate receptive of the output of the memory cell and the output of the reference cell. Regardless of any inversion within the memory cell, the signal produced at the output of the second Exclusive OR gate is of the same binary significance as the input data applied to the first Exclusive-OR gate.
摘要翻译：当存储在存储单元中的信息被反转时，存储在参考单元中的信息被反转。存储器单元信息从接收输入数据信号和参考单元输出信号的第一异或门导出。通过接收存储器单元的输出和参考单元的输出的第二异或门从存储单元读出信息。不管存储器单元内是否存在任何反转，在第二异或门的输出处产生的信号与施加到第一异或门的输入数据具有相同的二进制有效性。

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