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21. 发明授权

US08030703B2 Field-effect transistor and method for manufacturing a field-effect transistor 有权
标题翻译：场效应晶体管及场效应晶体管的制造方法
公开(公告)号：US08030703B2
公开(公告)日：2011-10-04
申请号：US11964202
申请日：2007-12-26
申请人： Dietmar Kotz , Martin Poelzl , Rudolf Zelsacher
发明人： Dietmar Kotz , Martin Poelzl , Rudolf Zelsacher
IPC分类号： H01L29/66
CPC分类号： H01L29/7813 , H01L29/407 , H01L29/41766 , H01L29/4236 , H01L29/42368 , H01L29/42376 , H01L29/7803
摘要： A field-effect transistor and a method for manufacturing a field-effect transistor is disclosed. One embodiment includes a substrate having a surface along which a trench is implemented, wherein the trench has a trench bottom and a trench edge. A source area is implemented at the trench edge and a gate electrode at least partially implemented in the trench and separated from the substrate by an insulation layer. The field-effect transistor includes a drain electrode at a side of the substrate facing away from the surface. An additional electrode is implemented between the gate electrode and the trench bottom and electrically insulated from the substrate and an electrical connection between the additional electrode and the gate electrode, wherein the electrical connection has a predetermined ohmic resistance value.
摘要翻译：公开了场效应晶体管和制造场效应晶体管的方法。一个实施例包括具有其上实现沟槽的表面的衬底，其中沟槽具有沟槽底部和沟槽边缘。源极区域在沟槽边缘处实现，并且栅极电极至少部分地实现在沟槽中并且通过绝缘层与衬底分离。场效应晶体管包括在衬底的背离表面的一侧的漏电极。在栅极电极和沟槽底部之间实现另外的电极，并与衬底电绝缘，并且附加电极和栅电极之间的电连接，其中电连接具有预定的欧姆电阻值。

22. 发明申请

US20100078716A1 Semiconductor component and method for producing a semiconductor component 审中-公开
标题翻译：半导体元件的制造方法及半导体元件的制造方法
公开(公告)号：US20100078716A1
公开(公告)日：2010-04-01
申请号：US12568915
申请日：2009-09-29
申请人： Erwin Bacher , Andreas Behrendt , Joerg Ortner , Walter Rieger , Rudolf Zelsacher , Markus Zundel
发明人： Erwin Bacher , Andreas Behrendt , Joerg Ortner , Walter Rieger , Rudolf Zelsacher , Markus Zundel
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： H01L21/76224 , H01L29/0657 , H01L29/0696 , H01L29/407 , H01L29/7803 , H01L29/7804 , H01L29/7811 , H01L29/7813 , H01L29/861
摘要： A semiconductor component comprises a semiconductor body with at least one protective trench in the semiconductor body. An insulation layer is situated at least at the bottom of the protective trench. An electrically conductive layer having a thickness D is formed on the insulation layer in the protective trench, wherein the electrically conductive layer only partly fills the protective trench.
摘要翻译：半导体部件包括在半导体本体中具有至少一个保护沟槽的半导体本体。绝缘层至少位于保护沟槽的底部。在保护沟槽中的绝缘层上形成具有厚度D的导电层，其中导电层仅部分地填充保护沟槽。

23. 发明授权

US09171950B2 Semiconductor component and method for producing a semiconductor component 有权
标题翻译：半导体元件的制造方法及半导体元件的制造方法
公开(公告)号：US09171950B2
公开(公告)日：2015-10-27
申请号：US13584968
申请日：2012-08-14
申请人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
发明人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
IPC分类号： H01L29/78 , H01L29/08 , H01L29/66 , H01L29/40 , H01L29/423
CPC分类号： H01L29/7813 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0882 , H01L29/0886 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66719 , H01L29/66734
摘要： A semiconductor component is produced by forming a trench in a semiconductor region. The trench has an upper trench region and a lower trench region. The upper trench region is wider than the lower trench region such that a step is formed in the semiconductor region. A dopant is introduced into the step to form a locally delimited dopant region in the semiconductor region.
摘要翻译：通过在半导体区域中形成沟槽来制造半导体元件。沟槽具有上沟槽区和下沟槽区。上沟槽区域比下沟槽区域宽，从而在半导体区域中形成台阶。将掺杂剂引入到该步骤中以在半导体区域中形成局部限定的掺杂剂区域。

24. 发明申请

US20120309147A1 Semiconductor Component and Method for Producing a Semiconductor Component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20120309147A1
公开(公告)日：2012-12-06
申请号：US13584968
申请日：2012-08-14
申请人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
发明人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
IPC分类号： H01L21/336
CPC分类号： H01L29/7813 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0882 , H01L29/0886 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66719 , H01L29/66734
摘要： A semiconductor component is produced by forming a trench in a semiconductor region. The trench has an upper trench region and a lower trench region. The upper trench region is wider than the lower trench region such that a step is formed in the semiconductor region. A dopant is introduced into the step to form a locally delimited dopant region in the semiconductor region.
摘要翻译：通过在半导体区域中形成沟槽来制造半导体元件。沟槽具有上沟槽区和下沟槽区。上沟槽区域比下沟槽区域宽，从而在半导体区域中形成台阶。将掺杂剂引入到该步骤中以在半导体区域中形成局部限定的掺杂剂区域。

25. 发明授权

US08269282B2 Semiconductor component and method for producing a semiconductor component 有权
标题翻译：半导体元件的制造方法及半导体元件的制造方法
公开(公告)号：US08269282B2
公开(公告)日：2012-09-18
申请号：US12968978
申请日：2010-12-15
申请人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
发明人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
IPC分类号： H01L29/76
CPC分类号： H01L29/7813 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0882 , H01L29/0886 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66719 , H01L29/66734
摘要： A semiconductor component includes at least one field effect transistor disposed along a trench in a semiconductor region and has at least one locally delimited dopant region in the semiconductor region. The at least one locally delimited dopant region extends from or over a pn junction between the source region and the body region of the transistor or between the drain region and the body region of the transistor into the body region as far as the gate electrode, such that a gap between the pn junction and the gate electrode in the body region is bridged by the locally delimited dopant region.
摘要翻译：半导体部件包括沿着半导体区域中的沟槽设置的至少一个场效应晶体管，并且在半导体区域中具有至少一个局部限定的掺杂区域。至少一个局部限定的掺杂剂区域从源极区域和晶体管的体区域之间的pn结或者晶体管的漏极区域和体区域之间的pn结延伸到体区域中，直到栅电极延伸，在体区域中的pn结和栅电极之间的间隙由局部限定的掺杂剂区域桥接。

26. 发明申请

US20110147843A1 Semiconductor Component and Method for Producing a Semiconductor Component 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：US20110147843A1
公开(公告)日：2011-06-23
申请号：US12968978
申请日：2010-12-15
申请人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
发明人： Andrew Wood , Rudolf Zelsacher , Markus Zundel
IPC分类号： H01L29/78 , H01L21/30
CPC分类号： H01L29/7813 , H01L29/0865 , H01L29/0869 , H01L29/0878 , H01L29/0882 , H01L29/0886 , H01L29/407 , H01L29/4236 , H01L29/42368 , H01L29/66719 , H01L29/66734
摘要： A semiconductor component includes at least one field effect transistor disposed along a trench in a semiconductor region and has at least one locally delimited dopant region in the semiconductor region. The at least one locally delimited dopant region extends from or over a pn junction between the source region and the body region of the transistor or between the drain region and the body region of the transistor into the body region as far as the gate electrode, such that a gap between the pn junction and the gate electrode in the body region is bridged by the locally delimited dopant region.
摘要翻译：半导体部件包括沿着半导体区域中的沟槽设置的至少一个场效应晶体管，并且在半导体区域中具有至少一个局部限定的掺杂区域。至少一个局部限定的掺杂剂区域从源极区域和晶体管的体区域之间的pn结或者晶体管的漏极区域和体区域之间的pn结延伸到体区域中，直到栅电极延伸，在体区域中的pn结和栅电极之间的间隙由局部限定的掺杂剂区域桥接。

27. 发明授权

US07612408B2 MOS transistor device 有权
标题翻译： MOS晶体管器件
公开(公告)号：US07612408B2
公开(公告)日：2009-11-03
申请号：US10996849
申请日：2004-11-24
申请人： Markus Zundel , Rudolf Zelsacher , Hermann Peri , Dietmar Kotz
发明人： Markus Zundel , Rudolf Zelsacher , Hermann Peri , Dietmar Kotz
IPC分类号： H01L29/94
CPC分类号： H01L29/7813 , H01L29/1095 , H01L29/407 , H01L29/42368
摘要： The invention relates to a MOS transistor device of the trench type, in which, in a semiconductor region of a first conductivity type, within a deep gate trench extending in the vertical direction of the semiconductor region, a vertical gate electrode and a gate oxide with a field plate step insulating the latter are formed and, in an adjoining mesa region outside and laterally with respect to the deep trench, at the upper section thereof, a source electrode region of the first conductivity type and a body region of a second conductivity type with one or a plurality of assigned body contact are formed, a drain electrode region of the first conductivity type lying opposite the deep trench in the vertical direction. The MOS transistor has a deep body reinforcement of the second conductivity type below the body region at the location of the body contact, said body reinforcement lying deeper than the field plate step.
摘要翻译：本发明涉及一种沟槽型的MOS晶体管器件，其中在第一导电类型的半导体区域内，沿着半导体区域的垂直方向延伸的深栅极沟槽内的垂直栅电极和栅极氧化物形成绝缘后的场板台阶，并且在其相对于深沟槽的外侧和横向相邻的台面区域的上部形成有第一导电类型的源电极区域和第二导电类型的体区域其中形成有一个或多个分配的身体接触，所述第一导电类型的漏电极区域在垂直方向上与所述深沟槽相对。 MOS晶体管在身体接触位置处具有在身体区域下方的第二导电类型的深体增强，所述主体加强物比现场板台阶更深。

28. 发明申请

US20050116267A1 MOS transistor device 有权
标题翻译： MOS晶体管器件
公开(公告)号：US20050116267A1
公开(公告)日：2005-06-02
申请号：US10996849
申请日：2004-11-24
申请人： Markus Zundel , Rudolf Zelsacher , Hermann Peri , Dietmar Kotz
发明人： Markus Zundel , Rudolf Zelsacher , Hermann Peri , Dietmar Kotz
IPC分类号： H01L29/10 , H01L29/40 , H01L29/423 , H01L29/76 , H01L29/78
CPC分类号： H01L29/7813 , H01L29/1095 , H01L29/407 , H01L29/42368
摘要： The invention relates to a MOS transistor device of the trench type, in which, in a semiconductor region of a first conductivity type, within a deep gate trench extending in the vertical direction of the semiconductor region, a vertical gate electrode and a gate oxide with a field plate step insulating the latter are formed and, in an adjoining mesa region outside and laterally with respect to the deep trench, at the upper section thereof, a source electrode region of the first conductivity type and a body region of a second conductivity type with one or a plurality of assigned body contact are formed, a drain electrode region of the first conductivity type lying opposite the deep trench in the vertical direction. The MOS transistor has a deep body reinforcement of the second conductivity type below the body region at the location of the body contact, said body reinforcement lying deeper than the field plate step.
摘要翻译：本发明涉及一种沟槽型的MOS晶体管器件，其中在第一导电类型的半导体区域内，沿着半导体区域的垂直方向延伸的深栅极沟槽内的垂直栅电极和栅极氧化物形成绝缘后的场板台阶，并且在其相对于深沟槽的外侧和横向相邻的台面区域的上部形成有第一导电类型的源电极区域和第二导电类型的体区域其中形成有一个或多个分配的身体接触，所述第一导电类型的漏电极区域在垂直方向上与所述深沟槽相对。 MOS晶体管在身体接触位置处具有在身体区域下方的第二导电类型的深体增强，所述主体加强物比现场板台阶更深。

29. 发明授权

US06661086B2 Three-dimensionally embodied circuit with electrically connected semiconductor chips 失效
公开(公告)号：US06661086B2
公开(公告)日：2003-12-09
申请号：US10146583
申请日：2002-05-15
申请人： Rudolf Zelsacher
发明人： Rudolf Zelsacher
IPC分类号： H01L2324
CPC分类号： H01L21/67144 , H01L23/481 , H01L25/0657 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The invention relates to a three-dimensional circuit configuration in which semiconductor chips are configured one above the other and in which the semiconductor chips are electrically connected together. In this arrangement, conductive channels are produced between mutually opposite surfaces of the semiconductor chips by thermomigrating a conductive material.

30. 发明授权

US06410391B1 Method for producing an EEPROM memory cell with a trench capacitor 失效
标题翻译：用于制造具有沟槽电容器的EEPROM存储单元的方法
公开(公告)号：US06410391B1
公开(公告)日：2002-06-25
申请号：US09607317
申请日：2000-06-30
申请人： Rudolf Zelsacher
发明人： Rudolf Zelsacher
IPC分类号： H01L21336
CPC分类号： H01L27/10867 , H01L27/105 , H01L27/1052
摘要： The present invention provides a method for fabricating an EEPROM memory cell having a trench capacitor, having the following steps: formation of a trench (108) in a substrate (101); formation of a buried plate (165) in the substrate region in the vicinity of the lower region of the trench (108); concerted fabrication of a floating gate surrounded by dielectric layers in order to define the EEPROM region; optional recessing of the dielectric layer in order to define DRAM regions.
摘要翻译：本发明提供一种制造具有沟槽电容器的EEPROM存储单元的方法，具有以下步骤：在衬底（101）中形成沟槽（108）; 在沟槽（108）的下部区域附近的衬底区域中形成掩埋板（165）; 为了限定EEPROM区域，由电介质层包围的浮动栅的协同制造; 为了限定DRAM区域，电介质层可选地凹陷。

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