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    • 23. 发明授权
    • Maintaining dynamic count of FIFO contents in multiple clock domains
    • 维护多个时钟域中FIFO内容的动态计数
    • US07646668B2
    • 2010-01-12
    • US12058964
    • 2008-03-31
    • John UdellRichard SolomonEugene SaghiJeffrey K. Whitt
    • John UdellRichard SolomonEugene SaghiJeffrey K. Whitt
    • G11C8/00
    • G06F5/06
    • Disclosed is a system that generates a write count value for indicating whether data can be read from a FIFO and a system that generates a read count value for indicating whether data can be written to a FIFO. Each of these systems operates in two separate clock domains. In the system that generates a write count value, write strobes are stored in parallel in a register in a first clock domain. The plurality of synchronizers trigger on a rising edge of the write strobe that is stored in the parallel register and generate an increment pulse in a second clock domain. An up/down counter reads the increment pulse in parallel and increments the up/down counter in parallel. A decrement signal from a read strobe decrements the up/down counter. The output of the counter is fed to a register that provides a write counter value to handshake logic that indicates whether data can be read from a FIFO without underflowing the FIFO.
    • 公开了一种生成用于指示是否能够从FIFO读取数据的写入计数值的系统以及生成用于指示数据是否可以写入FIFO的读取计数值的系统。 这些系统中的每一个都在两个独立的时钟域中运行。 在产生写入计数值的系统中,写选通存储在第一时钟域中的寄存器中。 多个同步器在存储在并行寄存器中的写选通脉冲的上升沿触发,并在第二时钟域产生增量脉冲。 上/下计数器并行读取增量脉冲并并行增/减计数器。 来自读取选通的递减信号递减上/下计数器。 计数器的输出被馈送到寄存器,该寄存器为握手逻辑提供写计数值,该指令指示是否可以从FIFO读取数据,而不会使FIFO下溢。
    • 24. 发明申请
    • MAINTAINING DYNAMIC COUNT OF FIFO CONTENTS IN MULTIPLE CLOCK DOMAINS
    • 维护多个时钟域内的FIFO内容的动态计数
    • US20090244993A1
    • 2009-10-01
    • US12058964
    • 2008-03-31
    • John UdellRichard SolomonEugene SaghiJeffrey K. Whitt
    • John UdellRichard SolomonEugene SaghiJeffrey K. Whitt
    • G11C7/00
    • G06F5/06
    • Disclosed is a system that generates a write count value for indicating whether data can be read from a FIFO and a system that generates a read count value for indicating whether data can be written to a FIFO. Each of these systems operates in two separate clock domains. In the system that generates a write count value, write strobes are stored in parallel in a register in a first clock domain. The plurality of synchronizers trigger on a rising edge of the write strobe that is stored in the parallel register and generate an increment pulse in a second clock domain. An up/down counter reads the increment pulse in parallel and increments the up/down counter in parallel. A decrement signal from a read strobe decrements the up/down counter. The output of the counter is fed to a register that provides a write counter value to handshake logic that indicates whether data can be read from a FIFO without underflowing the FIFO.
    • 公开了一种生成用于指示是否能够从FIFO读取数据的写入计数值的系统以及生成用于指示数据是否可以写入FIFO的读取计数值的系统。 这些系统中的每一个都在两个独立的时钟域中运行。 在产生写入计数值的系统中,写选通存储在第一时钟域中的寄存器中。 多个同步器在存储在并行寄存器中的写选通脉冲的上升沿触发,并在第二时钟域产生增量脉冲。 上/下计数器并行读取增量脉冲并并行增/减计数器。 来自读取选通的递减信号递减上/下计数器。 计数器的输出被馈送到寄存器,该寄存器为握手逻辑提供写计数值,该指令指示是否可以从FIFO读取数据,而不会使FIFO下溢。