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21. 发明授权

US07774172B1 Method for using a graphical debugging tool 有权
标题翻译：使用图形调试工具的方法
公开(公告)号：US07774172B1
公开(公告)日：2010-08-10
申请号：US10733788
申请日：2003-12-10
申请人： Mehmet Yunt , Murali Yeddanapudi , Sanjai Singh , John Ciolfi
发明人： Mehmet Yunt , Murali Yeddanapudi , Sanjai Singh , John Ciolfi
IPC分类号： G06F7/60 , G06F17/10 , G06F9/44
CPC分类号： G06F11/3664 , G06F8/34 , G06F8/35 , G06F17/5009 , Y10S715/967
摘要： A system and method of exposing debugging information in a graphical modeling and execution environment is disclosed. The present invention allows a user to view debugging information in the same window as the graphical view of the model being executed. Debugging data is associated with relevant components of the model displayed in the graphical view. A separate execution list view shows the methods called during the execution of the block diagram in the current time step up until the current point in execution. User-set breakpoints and conditional breakpoints may be set in both the model view and the execution list view. Values may be obtained for all of the displayed methods. The debugging tool may be implemented by using it in conjunction with a graphical modeling and execution environment, such as a block diagram environment or state diagram environment.
摘要翻译：公开了一种在图形建模和执行环境中暴露调试信息的系统和方法。本发明允许用户在与所执行的模型的图形视图相同的窗口中查看调试信息。调试数据与图形视图中显示的模型的相关组件相关联。单独的执行列表视图显示在执行当前时间步长期间调用的方法，直到当前执行点。可以在模型视图和执行列表视图中设置用户设置的断点和条件断点。可以为所有显示的方法获得值。调试工具可以通过结合图形建模和执行环境（例如框图环境或状态图环境）来实现。

22. 发明授权

US07464373B1 System and method for using a graphical debugging tool in a modeling and execution environment 有权
标题翻译：在建模和执行环境中使用图形调试工具的系统和方法
公开(公告)号：US07464373B1
公开(公告)日：2008-12-09
申请号：US10733789
申请日：2003-12-10
申请人： Mehmet Yunt , Murali Yeddanapudi , Sanjai Singh , John Ciolfi
发明人： Mehmet Yunt , Murali Yeddanapudi , Sanjai Singh , John Ciolfi
IPC分类号： G06F9/44
CPC分类号： G06F17/5009 , G06F8/10 , G06F11/3664
摘要： A system and method of exposing debugging information in a graphical modeling and execution environment is disclosed. The present invention allows a user to view debugging information in the same window as the graphical view of the model being executed. Debugging data is associated with relevant components of the model displayed in the graphical view. A separate execution list view shows the methods called during the execution of the block diagram in the current time step up until the current point in execution. User-set breakpoints and conditional breakpoints may be set in both the model view and the execution list view. Values may be obtained for all of the displayed methods. The debugging tool may be implemented by using it in conjunction with a graphical modeling and execution environment, such as a block diagram environment or state diagram environment.
摘要翻译：公开了一种在图形建模和执行环境中暴露调试信息的系统和方法。本发明允许用户在与所执行的模型的图形视图相同的窗口中查看调试信息。调试数据与图形视图中显示的模型的相关组件相关联。单独的执行列表视图显示在执行当前时间步长期间调用的方法，直到当前执行点。可以在模型视图和执行列表视图中设置用户设置的断点和条件断点。可以为所有显示的方法获得值。调试工具可以通过结合图形建模和执行环境（例如框图环境或状态图环境）来实现。

23. 发明授权

US08180608B1 Variable transport delay modeling mechanism 有权
标题翻译：可变传输延迟建模机制
公开(公告)号：US08180608B1
公开(公告)日：2012-05-15
申请号：US12907631
申请日：2010-10-19
申请人： Fu Zhang , Murali Yeddanapudi
发明人： Fu Zhang , Murali Yeddanapudi
IPC分类号： G06F17/10
CPC分类号： G06F17/10
摘要： A method, system and apparatus for generating a variable transport delay for use in modeling a dynamic system. The variable transport delay of the present invention may be calculated using a variety of means, including the use of a lookup table generated at a variety of time steps such that an accurate variable transport delay can be calculated by interpolation.
摘要翻译：一种用于生成用于建模动态系统的可变传输延迟的方法，系统和装置。可以使用各种手段来计算本发明的可变传输延迟，包括使用在各种时间步骤中生成的查找表，使得可以通过内插来计算准确的可变传输延迟。

24. 发明申请

US20070157138A1 Management of functions for block diagrams 失效
公开(公告)号：US20070157138A1
公开(公告)日：2007-07-05
申请号：US11703336
申请日：2007-02-06
申请人： John Ciolfi , Michael Tocci , Mojdeh Shakeri , Murali Yeddanapudi , Kai Tuschner , Ramamurthy Mani
发明人： John Ciolfi , Michael Tocci , Mojdeh Shakeri , Murali Yeddanapudi , Kai Tuschner , Ramamurthy Mani
IPC分类号： G06F17/50 , G06G7/48 , G06F9/44
CPC分类号： G06F17/504
摘要： A method is provided that includes pattern-matching portions of a block diagram model as being equivalent, and creation of a common set of instructions in place of the occurrences of the pattern-matched portions to enhance the efficiency of simulation or generated code for the block diagram model, such as by a reduced image size. Diagnostics are also available to provide information on the execution structure of the block diagram and guidance on how to modify block of the block diagram to obtain reduced image size by increasing the amount of matching patterns. Also, automatically generated hierarchical structures, a tool to control the function signature and the ability for a user to control file packaging which all provide flexible control over the generated code for block diagrams, are provided.

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