专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

21. 发明授权

US06732326B2 Structure and method for depuncturing punctured codes for radix-4 branch metric calculation in high-speed viterbi decoder 有权
标题翻译：用于在高速维特比解码器中进行基数4分支度量计算的去穿孔穿孔码的结构和方法
公开(公告)号：US06732326B2
公开(公告)日：2004-05-04
申请号：US09846477
申请日：2001-04-30
申请人： Eun-A Choi , Jin-Ho Kim , Nae-Soo Kim , Deock-Gil Oh
发明人： Eun-A Choi , Jin-Ho Kim , Nae-Soo Kim , Deock-Gil Oh
IPC分类号： H03M1341
CPC分类号： H03M13/6362 , H03M13/395 , H03M13/3961 , H03M13/41 , H03M13/4107
摘要： A structure and a method for depuncturing an input bit stream being input to a Viterbi decoder when the Viterbi decoder is designed by using a Radix-4 branch metric calculator in a method for designing the Viterbi decoder that decodes a punctured code at a high-speed, are disclosed. A depuncture structure for Radix-4 branch metric calculation in a high-speed Viterbi decoder includes four FIFOs, four multiplexers, and one Radix-4 branch metric calculator. Two input bit streams of I and Q are connected to two upper FIFOs and two lower FIFOs. An output terminal of FIFO is connected to upper and lower multiplexers of the next stage. One output terminal of each multiplexer is connected to Radix-4 branch metric calculator. As a result, Radix-4 branch metric calculation can be achieved by using the same clock as a clock speed of the input I and Q bit streams. This structure and this method can be applied to a depuncturing process for Radix-4 branch metric calculation of all punctured codes derived from ½ code.
摘要翻译：在维特比解码器被设计成通过在设计维特比解码器的方法中设计的维特比解码器的结构和方法被输入到维特比解码器，该维特比解码器以高速解码穿孔码，被披露。在高速维特比解码器中用于基数4分支度量计算的解穿孔结构包括四个FIFO，四个多路复用器和一个基数-4分支度量计算器。 I和Q的两个输入比特流连接到两个较高的FIFO和两个较低的FIFO。 FIFO的输出端子连接到下一级的上下复用器。每个多路复用器的一个输出端连接到基数-4分支度量计算器。因此，可以通过使用与输入I和Q位流的时钟速度相同的时钟来实现基数-4分支度量计算。该结构和该方法可以应用于从½码导出的所有穿孔码的基数-4分支度量计算的解穿孔过程。

22. 发明授权

US5981327A Method for forming wells of semiconductor device 失效
标题翻译：半导体器件阱形成方法
公开(公告)号：US5981327A
公开(公告)日：1999-11-09
申请号：US42726
申请日：1998-03-17
申请人： Jin-Ho Kim
发明人： Jin-Ho Kim
IPC分类号： H01L21/8238 , H01L21/265 , H01L21/266 , H01L21/74 , H01L21/761 , H01L27/092
CPC分类号： H01L21/74 , H01L21/266
摘要： A method for forming wells of a semiconductor device, comprising the steps of forming a plurality of field insulating layers on a field region of a semiconductor substrate; forming first impurity regions of a first conductive type at a first depth beneath a surface of the semiconductor substrate; forming first impurity regions of a second conductive type beneath the surface of the semiconductor substrate at a second depth between the field insulating layers; selectively forming second impurity regions of the second conductive type in the first impurity regions of the first conductive type between adjacent field insulating layers; forming second impurity regions of the first conductive type in the first impurity regions of the second conductive type at both sides of the second impurity regions of the second conductive type; and diffusing the first and second impurity regions of the first conductive type and the first and second impurity regions of the second conductive type by a drive-in process to form a first conductive type shield region, a first conductive type well, and first and second wells of a second conductive type.
摘要翻译：一种用于形成半导体器件的阱的方法，包括以下步骤：在半导体衬底的场区域上形成多个场绝缘层; 在所述半导体衬底的表面下方的第一深度处形成第一导电类型的第一杂质区; 在所述场绝缘层之间的第二深度处，在所述半导体衬底的表面下方形成第二导电类型的第一杂质区; 在相邻的场绝缘层之间的第一导电类型的第一杂质区中选择性地形成第二导电类型的第二杂质区; 在第二导电类型的第二杂质区的两侧在第二导电类型的第一杂质区中形成第一导电类型的第二杂质区; 并且通过驱动工艺扩散第一导电类型的第一和第二杂质区域和第二导电类型的第一和第二杂质区域，以形成第一导电类型屏蔽区域，第一导电类型阱以及第一和第二第二导电类型的阱。

23. 发明授权

US08929003B2 Projection lens unit for pico-projector 有权
标题翻译：微型投影机投影镜头单元
公开(公告)号：US08929003B2
公开(公告)日：2015-01-06
申请号：US14106084
申请日：2013-12-13
申请人： Hee-Joong Lee , Jin-Ho Kim , Sung-Hoon Hwang , Seung-Ki Hong
发明人： Hee-Joong Lee , Jin-Ho Kim , Sung-Hoon Hwang , Seung-Ki Hong
IPC分类号： G02B9/60 , G02B3/00 , G02B7/02 , G02B13/00
CPC分类号： G02B3/0006 , G02B7/028 , G02B13/0045
摘要： A projection lens unit for a pico-projector includes a plurality of plastic lenses and a single glass lens to minimize a change in focal length due to the heat generated inside the pico-projector. The lens array includes: a 1st lens with negative (−) refractive power, a 2nd lens with positive (+) refractive power, a 3rd lens with negative (−) refractive power, a 4th lens with negative (−) refractive power, and a 5th lens with positive (+) refractive power, wherein the 1st to 5th lenses are arranged in order from a screen upon which an image is projected, the 1st to 4th lenses are plastic lenses and the 5th lens is a glass lens.
摘要翻译：用于微型投影仪的投影透镜单元包括多个塑料透镜和单个玻璃透镜，以最小化由于微型投影仪内部产生的热量引起的焦距变化。透镜阵列包括：具有负（ - ）屈光力的第一透镜，具有正（+）屈光力的第二透镜，具有负（ - ）屈光力的第三透镜，具有负（ - ）屈光力的第四透镜，以及具有正（+）屈光力的第5透镜，其中第1至第5透镜从投影图像的屏幕顺序排列，第1至第4透镜为塑料透镜，第5透镜为玻璃透镜。

24. 发明授权

US08693112B2 Projection lens unit for pico-projector 有权
标题翻译：微型投影机投影镜头单元
公开(公告)号：US08693112B2
公开(公告)日：2014-04-08
申请号：US13110169
申请日：2011-05-18
申请人： Hee-Joong Lee , Jin-Ho Kim , Sung-Hoon Hwang , Seung-Ki Hong
发明人： Hee-Joong Lee , Jin-Ho Kim , Sung-Hoon Hwang , Seung-Ki Hong
IPC分类号： G02B9/34
CPC分类号： G02B3/0006 , G02B7/028 , G02B13/0045
摘要： A projection lens unit for a pica-projector includes a plurality of plastic lenses and a single glass lens to minimize a change in focal length due to the heat generated inside the pico-projector. The lens array includes: a 1st lens with negative (−) refractive power, a 2nd lens with positive (+) refractive power, a 3rd fens with negative (−) refractive power, a 4th lens with negative (−) refractive power, and a 5th lens with positive (+) refractive power, wherein the 1st to 5th lenses are arranged in order from a screen upon which an image is projected, the 1st to 4th lenses are plastic lenses and the 5th lens is a glass lens.
摘要翻译：用于微型投影仪的投影透镜单元包括多个塑料透镜和单个玻璃透镜，以最小化由于微型投影仪内部产生的热量引起的焦距变化。透镜阵列包括：具有负（ - ）屈光力的第一透镜，具有正（+）屈光力的第二透镜，具有负（ - ）屈光力的第三透镜，具有负（ - ）屈光力的第四透镜，以及具有正（+）屈光力的第5透镜，其中第1至第5透镜从投影图像的屏幕顺序排列，第1至第4透镜为塑料透镜，第5透镜为玻璃透镜。

25. 发明授权

US08664780B2 Semiconductor package having plural semiconductor chips and method of forming the same 有权
标题翻译：具有多个半导体芯片的半导体封装及其形成方法
公开(公告)号：US08664780B2
公开(公告)日：2014-03-04
申请号：US13534212
申请日：2012-06-27
申请人： Chang-Hoon Han , Jin-Ho Kim , Bo-Seong Kim , Yun-Jin Oh
发明人： Chang-Hoon Han , Jin-Ho Kim , Bo-Seong Kim , Yun-Jin Oh
IPC分类号： H01L23/29 , H01L29/40
CPC分类号： H01L23/3135 , H01L21/561 , H01L23/3128 , H01L24/73 , H01L24/97 , H01L25/03 , H01L25/50 , H01L2224/16145 , H01L2224/16225 , H01L2224/32145 , H01L2224/32225 , H01L2224/45124 , H01L2224/45144 , H01L2224/48145 , H01L2224/48227 , H01L2224/73204 , H01L2224/73253 , H01L2224/73265 , H01L2224/97 , H01L2225/06506 , H01L2225/0651 , H01L2225/06513 , H01L2225/06541 , H01L2225/06562 , H01L2924/15311 , H01L2924/181 , H01L2924/19105 , H01L2924/00 , H01L2924/00012
摘要： A semiconductor package includes a first semiconductor chip mounted to a substrate, a first encapsulant covering the first semiconductor chip and have first to fourth sidewall surfaces, and a chip stack mounted to the substrate and disposed on the first encapsulant. The chip stack includes a plurality of second semiconductor chips. A second encapsulant covers the chip stack. The second encapsulant may cover the first sidewall surface of the first encapsulant and expose the third sidewall surface of the first encapsulant.
摘要翻译：半导体封装包括安装到衬底的第一半导体芯片，覆盖第一半导体芯片并具有第一至第四侧壁表面的第一密封剂和安装到衬底并且设置在第一密封剂上的芯片堆叠。芯片堆叠包括多个第二半导体芯片。第二密封剂覆盖芯片堆叠。第二密封剂可以覆盖第一密封剂的第一侧壁表面并暴露第一密封剂的第三侧壁表面。

26. 发明授权

US08624819B2 Driving circuit of liquid crystal display 有权
标题翻译：液晶显示器的驱动电路
公开(公告)号：US08624819B2
公开(公告)日：2014-01-07
申请号：US13558025
申请日：2012-07-25
申请人： Jin-Ho Kim , Hong-Jae Shin
发明人： Jin-Ho Kim , Hong-Jae Shin
IPC分类号： G09G3/36
CPC分类号： G09G3/3677 , G09G2300/0417 , G09G2320/0223
摘要： A driving circuit of a liquid crystal display includes: a timing controller to output a gate control signal and a data control signal to control driving of a gate driving unit and a data driving unit and to output digital video data; a pair of gate driving units to be alternately driven by using at least one frame as a period to supply gate signals to gate lines of a liquid crystal panel in response to the gate control signal; and a data driving unit to supply pixel signals to data lines of the liquid crystal panel in response to the data control signal. Degradation of characteristics of transistors constituting each gate driver can be prevented.
摘要翻译：液晶显示器的驱动电路包括：时序控制器，用于输出栅极控制信号和数据控制信号，以控制栅极驱动单元和数据驱动单元的驱动并输出数字视频数据; 一对栅极驱动单元，通过使用至少一个帧作为周期交替地驱动，以响应于栅极控制信号向液晶面板的栅极线提供栅极信号; 以及数据驱动单元，用于响应于数据控制信号将像素信号提供给液晶面板的数据线。可以防止构成每个栅极驱动器的晶体管的特性的降低。

27. 发明授权

US08599635B2 Fuse circuit and semiconductor memory device including the same 有权
标题翻译：保险丝电路和包括其的半导体存储器件
公开(公告)号：US08599635B2
公开(公告)日：2013-12-03
申请号：US13205966
申请日：2011-08-09
申请人： Jin-Ho Kim , Jong-Pil Son , Seong-Jin Jang , Byung-Sik Moon , Seung-Hoon Oh , Ju-Seop Park
发明人： Jin-Ho Kim , Jong-Pil Son , Seong-Jin Jang , Byung-Sik Moon , Seung-Hoon Oh , Ju-Seop Park
IPC分类号： G11C17/18
CPC分类号： G11C29/027 , G11C17/16 , G11C29/04
摘要： A fuse circuit includes a program unit, a sensing unit and a control unit. The program unit is programmed in response to a program signal, and outputs a program output signal in response to a sensing enable signal. The sensing unit includes a variable resistor unit that has a resistance that varies based on a control signal, and generates a sensing output signal based on the resistance of the variable resistor unit and the program output signal. The control unit generates the control signal having a value changed depending on operation modes, and performs a verification operation with respect to the program unit based on the sensing output signal to generate a verification result. The program unit may be re-programmed based on the verification result.
摘要翻译：熔丝电路包括程序单元，感测单元和控制单元。程序单元响应于程序信号被编程，并且响应于感测使能信号而输出程序输出信号。感测单元包括具有基于控制信号而变化的电阻的可变电阻器单元，并且基于可变电阻器单元的电阻和程序输出信号产生感测输出信号。控制单元产生具有根据操作模式改变的值的控制信号，并且基于感测输出信号执行关于节目单元的验证操作以产生验证结果。程序单元可以基于验证结果重新编程。

28. 发明授权

US08241831B2 Acid generating agent for chemically amplified resist compositions 有权
标题翻译：用于化学放大抗蚀剂组合物的酸产生剂
公开(公告)号：US08241831B2
公开(公告)日：2012-08-14
申请号：US12231814
申请日：2008-09-05
申请人： Sung-Do Jung , Jin-Ho Kim , Jung-Hoon Oh , Hyun-Soon Lim
发明人： Sung-Do Jung , Jin-Ho Kim , Jung-Hoon Oh , Hyun-Soon Lim
IPC分类号： G03F7/004 , C07C309/65
CPC分类号： C07C309/68 , C07C329/06 , C07C381/12 , C07C2602/42 , G03F7/0045 , G03F7/0397 , G03F7/2041
摘要： An acid generating agent represented by the following formula (1) or (2) is provided, which is included in chemically amplified resist compositions: wherein in the formula (1) and (2), X represents an unsubstituted or substituted alkyl group having 1 to 20 carbon atoms and selected from alkyl, haloalkyl and alkylsulfonyl, which may have at least one hydrogen atom substituted by an ether group, an ester group, a carbonyl group, an acetal group, a nitrile group, a cyano group, a hydroxyl group, a carboxyl group or an aldehyde group, or represents a perfluoroalkyl group having 1 to 4 carbon atoms; R6 represents an alkyl group having 1 to 10 carbon atoms, an alkoxy group having 1 to 10 carbon atoms, or a heteroatom selected from nitrogen, sulfur, fluorine and oxygen; m is an integer from 0 to 2; and A+ is an organic counterion.
摘要翻译：提供了由下列通式（1）或（2）表示的酸产生剂，其包括在化学放大型抗蚀剂组合物中：其中在式（1）和（2）中，X表示未取代或取代的具有1 20个碳原子，选自烷基，卤代烷基和烷基磺酰基，其可以具有至少一个被醚基取代的氢原子，酯基，羰基，缩醛基，腈基，氰基，羟基，羧基或醛基，或者表示碳原子数1〜4的全氟烷基。 R 6表示碳原子数1〜10的烷基，碳原子数1〜10的烷氧基或氮，硫，氟和氧的杂原子。 m为0〜2的整数; 而A +是一种有机的抗衡离子。

29. 发明申请

US20120018833A1 Light-Guiding Structure, Image Sensor Including The Light-Guiding Structure, And Processor-Based System Including The Image Sensor 有权
标题翻译：光引导结构，包括导光结构的图像传感器和包括图像传感器的基于处理器的系统
公开(公告)号：US20120018833A1
公开(公告)日：2012-01-26
申请号：US13186667
申请日：2011-07-20
申请人： Kang-Hyun Baek , Sang-Il Jung , Jin-Ho Kim , Jeong-Ho Lee , Jeong-Bin Kim
发明人： Kang-Hyun Baek , Sang-Il Jung , Jin-Ho Kim , Jeong-Ho Lee , Jeong-Bin Kim
IPC分类号： H01L31/0232 , G02B6/12
CPC分类号： H01L27/14629
摘要： An example embodiment relates to a light-guiding structure. The light-guiding structure may include a bottom surface and a sidewall defined by a first, a second, and a third insulating layer disposed on a semiconductor substrate. The bottom surface may be parallel to a main surface of the semiconductor substrate and may be disposed in the first insulating layer. The sidewall may penetrate the second and third insulating layers to extend to the first insulating layer, and the sidewall may be tapered with respect to the main surface of semiconductor substrate. The light-guiding structure may be included in a image sensor. The image sensor may be included in a processor-based system.
摘要翻译：示例性实施例涉及导光结构。导光结构可以包括由设置在半导体衬底上的第一，第二和第三绝缘层限定的底表面和侧壁。底表面可以平行于半导体衬底的主表面并且可以设置在第一绝缘层中。侧壁可以穿透第二和第三绝缘层以延伸到第一绝缘层，并且侧壁可以相对于半导体衬底的主表面是锥形的。导光结构可以包括在图像传感器中。图像传感器可以包括在基于处理器的系统中。

30. 发明授权

US08084805B2 Three-dimensional microelectronic devices including repeating layer patterns of different thicknesses 有权
标题翻译：三维微电子器件包括不同厚度的重复层图案
公开(公告)号：US08084805B2
公开(公告)日：2011-12-27
申请号：US12420518
申请日：2009-04-08
申请人： Sun-Il Shim , Sung-Hoi Hur , Jin-Ho Kim , Su-Youn Yi
发明人： Sun-Il Shim , Sung-Hoi Hur , Jin-Ho Kim , Su-Youn Yi
IPC分类号： H01L29/76
CPC分类号： H01L27/1158 , H01L27/11521 , H01L27/11524 , H01L27/11551 , H01L27/11556 , H01L27/11568 , H01L27/11578 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792 , H01L29/7926
摘要： A vertical NAND flash memory device includes a substrate having a face and a string of serially connected flash memory cells on the substrate. A first flash memory cell is adjacent the face, and a last flash memory cell is remote from the face. The flash memory cells include repeating layer patterns that are stacked on the face, and a pillar that extends through the series of repeating layer patterns. The pillar includes at least one oblique wall. At least two of the series of repeating layer patterns in the string are of different thicknesses. Other vertical microelectronic devices and related fabrication methods are also described.
摘要翻译：垂直NAND闪速存储器件包括在衬底上具有面和串联的闪存单元串的衬底。第一闪存单元与面相邻，并且最后的闪存单元远离面。闪存单元包括堆叠在表面上的重复层图案和延伸穿过一系列重复层图案的柱。支柱包括至少一个斜壁。串中重复层图案的系列中的至少两个具有不同的厚度。还描述了其它垂直微电子器件和相关的制造方法。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式