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21. 发明授权

US06507362B1 Digital image generation device for transmitting digital images in platform-independent form via the internet 失效
标题翻译：用于通过互联网以平台无关形式发送数字图像的数字图像生成装置
公开(公告)号：US06507362B1
公开(公告)日：2003-01-14
申请号：US09003139
申请日：1998-01-06
申请人： Avidan Akerib
发明人： Avidan Akerib
IPC分类号： H04N5232
CPC分类号： G06F17/147 , G06T9/007
摘要： An Internet imaging device, such as camera, scanner and digital television display, is disclosed. The device combines the advantages of platform-independent page description languages, such as Adobe PostScript 3, with an imaging device that connects directly to remote locations via the Internet. The device outputs image data and image processing commands in a platform-independent page description language via cordless communication such as a cellular phone. The data are transferred directly to remote display units, such as printers and digital televisions, thereby eliminating two personal computers (PCs): one at the input end of the communication and one at the output end. The device taught by the present invention need not include a flash memory or other storage medium, as images are transferred directly when generated.
摘要翻译：公开了诸如照相机，扫描仪和数字电视显示器的因特网成像设备。该设备将平台无关页面描述语言（如Adobe PostScript 3）的优势与通过Internet直接连接到远程位置的成像设备相结合。该设备通过诸如蜂窝电话的无绳通信以平台无关的页面描述语言输出图像数据和图像处理命令。数据直接传输到远程显示单元，如打印机和数字电视机，从而消除了两台个人计算机（PC）：一台在通信输入端，另一台在输出端。本发明教导的装置不需要包括闪速存储器或其他存储介质，因为当生成图像时直接传送图像。

22. 发明授权

US06405281B1 Input/output methods for associative processor 失效
标题翻译：关联处理器的输入/输出方法
公开(公告)号：US06405281B1
公开(公告)日：2002-06-11
申请号：US09572583
申请日：2000-05-17
申请人： Avidan Akerib
发明人： Avidan Akerib
IPC分类号： G06F1200
CPC分类号： G06F15/8038
摘要： A data processing device includes an associative processor that in turn includes one or more arrays of content addressable memory (CAM) cells and two or more tags registers. The device also includes a memory for storing the data and a bus for exchanging the data with the associative processor. During input and output operations, data are exchanged in parallel, via one of the tags registers. Another tags register is used to select rows of CAM cells for input or output. By appropriately shifting the bits in the buffer tags register between write or compare operation cycles, entire words are exchanged between the selected CAM cell rows and the buffer tags register. During arithmetical operations, in an embodiment with multiple CAM cell arrays, different tags registers are associated with different CAM cell arrays at will. If, in the course of performing arithmetical operations using one of the CAM cell arrays, so many columns of intermediate data are produced that insufficient columns remain for subsequent arithmetical operations, the columns of intermediate data are written to the memory, via the buffer tags registers. These columns of intermediate data are retrieved subsequently from the memory as needed, also via the buffer tags register.
摘要翻译：数据处理设备包括关联处理器，其又包括内容可寻址存储器（CAM）单元和两个或多个标签寄存器的一个或多个阵列。该设备还包括用于存储数据的存储器和用于与关联处理器交换数据的总线。在输入和输出操作期间，通过标签寄存器之一并行交换数据。另一个标签寄存器用于选择输入或输出的CAM单元格行。通过在写入或比较操作周期之间适当地移位缓冲器标签寄存器中的位，在所选择的CAM单元行和缓冲器标签寄存器之间交换整个字。在算术运算中，在具有多个CAM单元阵列的实施例中，不同的标记寄存器随意地与不同的CAM单元阵列相关联。如果在使用其中一个CAM单元阵列执行算术运算的过程中，产生了许多中间数据列，因为剩余的列不足以用于后续的算术运算，中间数据列将通过缓冲区标记寄存器写入存储器。这些中间数据列也随后通过缓冲器标签寄存器从存储器中被检索。

23. 发明授权

US5974521A Apparatus and method for signal processing 失效
标题翻译：用于信号处理的装置和方法
公开(公告)号：US5974521A
公开(公告)日：1999-10-26
申请号：US52164
申请日：1998-03-31
申请人： Avidan Akerib
发明人： Avidan Akerib
IPC分类号： G06F15/16 , G06F7/20 , G06F9/44 , G06F12/06 , G06F13/12 , G06F13/40 , G06F15/80 , G06F15/82 , G06F17/15 , G06T7/00 , G11C15/04
CPC分类号： G06T7/00 , G06F15/8023 , G06F15/8038 , G06K9/00986 , G06K9/4609
摘要： An associative signal processing apparatus for processing a plurality of samples of an incoming signal in parallel, the apparatus comprising: (a) an array of processors, each processor including a multiplicity of associative memory cells, the memory cells being operative to perform: (i) compare operations, in parallel, on the plurality of samples of the incoming signal; and (ii) write operations, in parallel, on the plurality of samples of the incoming signal; and (b) an I/O buffer register including a multiplicity of associative memory cells, the register being operative to: (i) input the plurality of samples of the incoming signal to the array of processors in parallel by having the I/O buffer register memory cells perform at least one associative compare operation and the array memory cells perform at least one associative write operation; and (ii) receive, in parallel, a plurality of processed samples from the array of processors by having the array memory cells perform at least one associative compare operation and the I/O buffer register memory cells perform at least one write operation.
摘要翻译：一种用于并行处理输入信号的多个采样的关联信号处理装置，所述装置包括：（a）处理器阵列，每个处理器包括多个关联存储器单元，所述存储器单元可操作以执行：（i 并行地对输入信号的多个样本进行比较操作; 和（ii）并行地对输入信号的多个样本进行写入操作; 和（b）包括多个相关存储器单元的I / O缓冲器寄存器，该寄存器用于：（i）通过使I / O缓冲器并行地将输入信号的多个采样并行地输入到处理器阵列寄存器存储器单元执行至少一个关联比较操作，并且所述阵列存储器单元执行至少一个关联写入操作; 以及（ii）通过使所述阵列存储器单元执行至少一个关联比较操作并且所述I / O缓冲寄存器存储器单元执行至少一个写入操作，并行地从所述处理器阵列接收多个经处理的采样。

24. 发明授权

US07268788B2 Associative processing for three-dimensional graphics 失效
标题翻译：三维图形的关联处理
公开(公告)号：US07268788B2
公开(公告)日：2007-09-11
申请号：US10932087
申请日：2004-09-02
申请人： Joseph Shain , Avidan Akerib , Michael Mordison , Adi Bar-Lev , Nitin Gupta , Nitish Arya
发明人： Joseph Shain , Avidan Akerib , Michael Mordison , Adi Bar-Lev , Nitin Gupta , Nitish Arya
IPC分类号： G09G5/00
CPC分类号： G06T15/00 , G09G5/36 , G09G2340/10
摘要： Associative processing methods and apparatus are described for processing graphics data for three-dimensional graphic displays, e.g., in three-dimensional games. A texture, which comprises a bitmap image used to apply a design onto the surface of a 3D computer model for 3D graphics display, may be converted to APA (associative processor apparatus) instructions.
摘要翻译：描述了用于处理例如三维游戏中的三维图形显示的图形数据的关联处理方法和装置。包括用于将设计应用到用于3D图形显示的3D计算机模型的表面上的位图图像的纹理可以被转换为APA（关联处理器装置）指令。

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