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21. 发明申请

US20120139638A1 Methods and Circuits for Controlling Amplifier Gain Over Process, Voltage, and Temperature 审中-公开
标题翻译：控制放大器过程，电压和温度增益的方法和电路
公开(公告)号：US20120139638A1
公开(公告)日：2012-06-07
申请号：US13310609
申请日：2011-12-02
申请人： Kambiz Kaviani , Amir Amirkhany , Aliazam Abbasfar
发明人： Kambiz Kaviani , Amir Amirkhany , Aliazam Abbasfar
IPC分类号： H03F3/04
CPC分类号： H03F3/45183 , H03F3/45197 , H03F3/45632 , H03F2200/447 , H03F2203/45008 , H03F2203/45048 , H03F2203/45078 , H03F2203/45306 , H03F2203/45488 , H03F2203/45686 , H03G1/0029 , H03G1/007
摘要： A receiver includes an amplifier and a transconductance bias circuit. The amplifier gain is largely determined by transconductance and load impedance. The transconductance bias circuit varies the transconductance in inverse proportion to the load impedance to maintain the gain over process, voltage, and temperature. Differential amplifiers can use separate transconductance bias circuits for each amplifier leg, and the bias circuits can be independently controlled to minimize common-mode gain and voltage offsets.
摘要翻译：接收器包括放大器和跨导偏置电路。放大器增益主要取决于跨导和负载阻抗。跨导偏置电路会将跨导与负载阻抗成反比变化，以保持增益超过过程，电压和温度。差分放大器可以为每个放大器支路使用单独的跨导偏置电路，并且可以独立控制偏置电路以最小化共模增益和电压偏移。

22. 发明申请

US20110019722A1 Per-Tone Delay Adjustment for Multi-Tone Systems 审中-公开
标题翻译：多音调系统的逐音延迟调整
公开(公告)号：US20110019722A1
公开(公告)日：2011-01-27
申请号：US12837656
申请日：2010-07-16
申请人： Amir Amirkhany
发明人： Amir Amirkhany
IPC分类号： H04L5/16 , H04L27/00
CPC分类号： H04L25/14 , H04L5/0007
摘要： A data transmission circuit has an interface for receiving a data stream for transmission, a data stream splitter, a plurality of parallel data preparation circuits, and a combiner. The data stream splitter splits the data stream to produce multiple substreams, the plurality of parallel data preparation circuits prepare a respective substream for transmission and generate a respective sub-channel signal, and the combiner combines the respective sub-channel signals to generate a data transmission signal. At least two of the plurality of data preparation circuits each include a programmable element for delaying the corresponding substream.
摘要翻译：数据传输电路具有用于接收用于传输的数据流的接口，数据流分离器，多个并行数据准备电路和组合器。数据流分离器分割数据流以产生多个子流，多个并行数据准备电路准备用于传输的相应子流并生成相应的子信道信号，并且组合器组合各个子信道信号以产生数据传输信号。多个数据准备电路中的至少两个包括用于延迟相应子流的可编程元件。

23. 发明申请

US20100128813A1 Multi-channel Signaling with Equalization 失效
标题翻译：均衡化的多信道信令
公开(公告)号：US20100128813A1
公开(公告)日：2010-05-27
申请号：US12515390
申请日：2007-11-09
申请人： Aliazam Abbasfar , Amir Amirkhany
发明人： Aliazam Abbasfar , Amir Amirkhany
IPC分类号： H04L27/00 , H04B1/10 , H04B15/00
CPC分类号： H04L25/03343 , H04L5/0007 , H04L5/06 , H04L25/03057 , H04L27/2637 , H04L27/2644 , H04L2025/03414 , H04L2025/03426 , H04L2025/0349
摘要： A data transmission circuit comprises a plurality of data preparation circuits and a combiner. Each data preparation circuit receives a respective data stream and generates a respective sub-channel signal. Each respective data stream has a respective symbol rate and a respective Nyquist bandwidth. The combiner combines the respective sub-channel signals to generate a data transmission signal having an associated bandwidth. The bandwidth associated with the data transmission signal is greater than or equal to the sum of the Nyquist bandwidths for the respective data streams. Each data preparation circuit comprises a programmable linear equalizer that equalizes the respective sub-channel signal across the bandwidth of the data transmission signal.
摘要翻译：数据传输电路包括多个数据准备电路和组合器。每个数据准备电路接收相应的数据流并产生相应的子信道信号。每个相应的数据流具有相应的符号率和相应的奈奎斯特带宽。组合器组合各个子信道信号以产生具有相关带宽的数据传输信号。与数据传输信号相关联的带宽大于或等于相应数据流的奈奎斯特带宽的总和。每个数据准备电路包括一个可编程线性均衡器，用于跨数据传输信号的带宽均衡相应的子信道信号。

24. 发明申请

US20090067537A1 Adjustable Dual-Band Link 失效
标题翻译：可调双频链路
公开(公告)号：US20090067537A1
公开(公告)日：2009-03-12
申请号：US12268986
申请日：2008-11-11
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/30
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号率的数据流的第二子集传送给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

25. 发明申请

US20080137783A1 Adjustable Dual-Band Link 失效
标题翻译：可调双频链路
公开(公告)号：US20080137783A1
公开(公告)日：2008-06-12
申请号：US12030700
申请日：2008-02-13
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/22
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号速率的数据流的第二子集给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

26. 发明申请

US20140226707A1 OFFSET AND DECISION FEEDBACK EQUALIZATION CALIBRATION 有权
标题翻译：偏差和决策反馈均衡校准
公开(公告)号：US20140226707A1
公开(公告)日：2014-08-14
申请号：US14342367
申请日：2012-08-10
申请人： Kambiz Kaviani , Amir Amirkhany , Jason Chia-Jen Wei , Aliazam Abbasfar
发明人： Kambiz Kaviani , Amir Amirkhany , Jason Chia-Jen Wei , Aliazam Abbasfar
IPC分类号： H04L25/03 , H04B1/12
CPC分类号： H04L25/03057 , H04B1/123 , H04L25/03063 , H04L25/03885
摘要： A decision feedback equalizer is calibrated to compensate for estimated inter-symbol interference in a received signal and offsets of sampling devices. The decision feedback equalizer is configured so that an output signal of a sampling circuit represents a comparison between an input signal and a reference of the sampling circuit under calibration. An input signal is received over a communication channel that includes a predetermined pattern. The predetermined pattern is compared to the output signal to determine an adjusted reference for configuring the sampling circuit that accounts for both offset and inter-symbol interference effects.
摘要翻译：校准反馈均衡器以补偿接收信号中的估计符号间干扰和采样设备的偏移。判定反馈均衡器被配置为使得采样电路的输出信号表示在校准下的输入信号和采样电路的基准之间的比较。在包括预定图案的通信信道上接收输入信号。将预定模式与输出信号进行比较，以确定用于配置考虑到偏移和符号间干扰效应两者的采样电路的调整参考。

27. 发明授权

US08275027B2 Multi-mode transmitter 失效
标题翻译：多模发射机
公开(公告)号：US08275027B2
公开(公告)日：2012-09-25
申请号：US12117680
申请日：2008-05-08
申请人： Aliazam Abbasfar , Amir Amirkhany
发明人： Aliazam Abbasfar , Amir Amirkhany
IPC分类号： H04L27/01
CPC分类号： H04L27/0008
摘要： A multi-mode transmitter within an integrated circuit device. The multi-mode transmitter transmits a first data sequence in a baseband signal when a first transmission mode is enabled, and transmits the first data sequence in a multi-band signal when a second transmission mode is enabled.
摘要翻译：集成电路设备内的多模发射机。当第一传输模式被使能时，多模式发射机发送基带信号中的第一数据序列，并且当启用第二传输模式时，将多个第一数据序列发送到多频带信号。

28. 发明申请

US20120189045A1 Signaling with Superimposed Clock and Data Signals 审中-公开
标题翻译：信号与叠加的时钟和数据信号
公开(公告)号：US20120189045A1
公开(公告)日：2012-07-26
申请号：US13438801
申请日：2012-04-03
申请人： Aliazam Abbasfar , Amir Amirkhany , Bruno W. Garlepp
发明人： Aliazam Abbasfar , Amir Amirkhany , Bruno W. Garlepp
IPC分类号： H04B1/04 , H04L27/01
CPC分类号： H03L7/085 , H03L7/07 , H03L7/087 , H04L7/0008 , H04L7/0025 , H04L7/033
摘要： A data receiver circuit includes an interface to receive an input signal that includes a data signal and a clock signal superimposed on the data signal. The data signal has an associated symbol rate and an associated symbol period equal to the reciprocal of the associated symbol rate. The clock signal has a frequency N times the associated symbol rate, where N is an integer. A phase-locked loop (PLL) coupled to the interface extracts the clock signal from the input signal to provide an extracted clock signal. A phase interpolator adjusts the phase of the extracted clock signal to provide a phase-adjusted extracted clock signal. A sampling circuit samples the data signal at a sampling point. The sampling circuit is synchronized to the phase-adjusted extracted clock signal.
摘要翻译：数据接收器电路包括接收包括数据信号和叠加在数据信号上的时钟信号的输入信号的接口。数据信号具有相关联的符号率和相关联的符号周期等于相关联符号率的倒数。时钟信号具有相关符号率N倍的频率，其中N是整数。耦合到接口的锁相环（PLL）从输入信号提取时钟信号以提供提取的时钟信号。相位内插器调整提取的时钟信号的相位以提供相位调整的提取的时钟信号。采样电路在采样点采样数据信号。采样电路与相位调整的提取时钟信号同步。

29. 发明申请

US20120147944A1 HIGH RESOLUTION OUTPUT DRIVER 有权
标题翻译：高分辨率输出驱动器
公开(公告)号：US20120147944A1
公开(公告)日：2012-06-14
申请号：US13391383
申请日：2010-09-14
申请人： Amir Amirkhany , Chaofeng Huang , Kambiz Kaviani , Wayne D. Dettloof , Kun-Yung Chang
发明人： Amir Amirkhany , Chaofeng Huang , Kambiz Kaviani , Wayne D. Dettloof , Kun-Yung Chang
IPC分类号： H04L27/01
CPC分类号： H03K19/0005 , H03K19/017581 , H03M1/1061 , H03M1/745 , H04L25/0278 , H04L25/0288 , H04L25/03343
摘要： High resolution output drivers having a relatively small number of sub-driver branches or slices each having nominal impedances substantially larger than a quantization step and that incrementally differ from one another by an impedance step substantially smaller than a quantization step. In one implementation, such “differential” or “non-uniform” sub-driver slices implement respective elements of an n choose k equalizer, with each such differential sub-driver slice being implemented by a uniform-element impedance calibration DAC. In another implementation, each component of a uniform-slice equalizer is implemented by a differential-slice impedance calibration DAC, and in yet another implementation, each component of a differential-slice equalizer is implemented by a differential-slice impedance calibration DAC. In an additional set of implementations, equalization and impedance calibration functions are implemented bilaterally in respective parallel sets of driver branches, rather than in the nested “DAC within a DAC” arrangement of the hierarchical implementations. Through such bilateral arrangement, multiplication of the equalizer and calibrator quantizations is avoided, thereby lowering the total number of sub-driver slices required to meet the specified ranges and resolutions.
摘要翻译：具有相对较少数量的子驱动器分支或切片的高分辨率输出驱动器，每个子驱动器分支或切片具有显着大于量化步长的标称阻抗，并且通过显着小于量化步长的阻抗步长递增地彼此不同。在一个实现中，这种“差分”或“不均匀”子驱动器切片实现n选择k均衡器的相应元件，每个这样的差分子驱动器切片由均匀元件阻抗校准DAC实现。在另一实施方式中，均匀分片均衡器的每个分量由差分片阻抗校准DAC实现，并且在又一实现中，差分片均衡器的每个分量由差分片阻抗校准DAC实现。在一组额外的实施方案中，均衡和阻抗校准功能在各个并行的驱动器分支组中实现，而不是分层实现中嵌套的“DAC内的DAC”布置。通过这种双边安排，避免了均衡器和校准器量化的乘法，从而降低了满足指定范围和分辨率所需的副驱动器片的总数。

30. 发明授权

US07907676B2 Adjustable dual-band link 失效
标题翻译：可调节双频链路
公开(公告)号：US07907676B2
公开(公告)日：2011-03-15
申请号：US12574629
申请日：2009-10-06
申请人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
发明人： Vladimir M. Stojanovic , Amir Amirkhany , Jared L. Zerbe
IPC分类号： H04L27/28
CPC分类号： H04L27/2637 , H04L5/06 , H04L27/2653
摘要： A communication system utilizing an adjustable link has at least a first data transmission circuit including at least a first communication link circuit. The first communication link circuit has a baseband circuit and at least a passband circuit. The baseband circuit corresponds to a baseband sub-channel and the passband circuit corresponds to a passband sub-channel. The first communication link circuit also includes a circuit that distributes a first subset of a data stream having a first symbol rate to the baseband circuit and a second subset of the data stream having a second symbol rate to the passband circuit. The baseband sub-channel and the passband sub-channel are separated by an adjacent guardband of frequencies. The passband carrier frequency is adjusted to define the guardband and the guardband corresponds to a first notch in a channel response of a first communications channel.
摘要翻译：利用可调节链路的通信系统具有至少包括至少第一通信链路电路的第一数据传输电路。第一通信链路电路具有基带电路和至少一个通带电路。基带电路对应于基带子信道，通带电路对应于通带子信道。第一通信链路电路还包括将具有第一符号率的数据流的第一子集分配给基带电路的电路和具有第二符号速率的数据流的第二子集给通带电路。基带子信道和通带子信道被相邻的频带保护带隔开。调整通带载波频率以定义保护带，并且保护频带对应于第一通信信道的信道响应中的第一个陷波。

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