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21. 发明授权

US07885030B2 Methods and systems for delay compensation in global PLL-based timing recovery loops 有权
标题翻译：全球基于PLL的定时恢复循环中延迟补偿的方法和系统
公开(公告)号：US07885030B2
公开(公告)日：2011-02-08
申请号：US12168723
申请日：2008-07-07
申请人： Evangelos S. Eleftheriou , Robert Allen Hutchins , Sedat Oelcer
发明人： Evangelos S. Eleftheriou , Robert Allen Hutchins , Sedat Oelcer
IPC分类号： G11B5/035
CPC分类号： H03L7/07 , G11B20/10009 , G11B20/10222 , G11B20/10425 , G11B20/1403 , G11B2220/90 , H03L7/085 , H03L7/22
摘要： A system in one embodiment includes a global PLL circuit comprising multiple inputs, each input being for receiving an error signal associated with an individual channel; and a delay compensation circuit coupled to the global PLL circuit. A method in one embodiment includes receiving multiple error signals, each error signal being associated with an individual channel; applying one or more delay compensation signals to the error signals; and outputting phase error output signals for each of the channels.
摘要翻译：一个实施例中的系统包括包括多个输入的全局PLL电路，每个输入用于接收与单个信道相关联的错误信号; 以及耦合到全局PLL电路的延迟补偿电路。一个实施例中的方法包括接收多个误差信号，每个误差信号与单个信道相关联; 对误差信号施加一个或多个延迟补偿信号; 并输出每个通道的相位误差输出信号。

22. 发明授权

US07813077B2 Apparatus, system, and method for detecting a periodic sequence of servo signals 有权
标题翻译：用于检测伺服信号的周期性序列的装置，系统和方法
公开(公告)号：US07813077B2
公开(公告)日：2010-10-12
申请号：US11469133
申请日：2006-08-31
申请人： Nhan Xuan Bui , Roy Daron Cideciyan , Robert Allen Hutchins , Thomas Mittelholzer , Kazuhiro Tsuruta
发明人： Nhan Xuan Bui , Roy Daron Cideciyan , Robert Allen Hutchins , Thomas Mittelholzer , Kazuhiro Tsuruta
IPC分类号： G11B5/596
CPC分类号： G11B20/1407 , G11B5/584 , G11B20/1492 , G11B2020/1284 , G11B2020/1484 , G11B2220/90
摘要： An apparatus, system, and method are disclosed for detecting a periodic sequence. A value detector module detects a plurality of values of a periodic sequence. In one embodiment, a transformation module transforms the plurality of values into transformed values. A confinement module confines the values to a limited set of confined values. A correlation module correlates the confined values with a plurality of instances of the periodic sequence. In addition, a selection module selects an instance of the periodic sequence with the highest correlation to the confined values as an observed periodic sequence.
摘要翻译：公开了用于检测周期性序列的装置，系统和方法。值检测器模块检测周期性序列的多个值。在一个实施例中，变换模块将多个值转换为变换值。限制模块将值限制为有限的一组限制值。相关模块将约束值与周期性序列的多个实例相关联。此外，选择模块选择具有与限定值的最高相关性的周期性序列的实例作为观察到的周期性序列。

23. 发明授权

US07777980B2 Multi-channel data detection phase locked loop error combination logic 失效
标题翻译：多通道数据检测锁相环路错误组合逻辑
公开(公告)号：US07777980B2
公开(公告)日：2010-08-17
申请号：US11870853
申请日：2007-10-11
申请人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
发明人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10425
摘要： Phase-error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving phase error information with respect to each channel; combination logic configured to combine the received phase error information and generate a combined phase error; and a phase-error output configured to apply the combined phase error to at least one channel phase locked loop. Additionally, error signal combination comprises receiving error information of a signal relevant to a phase locked loop with respect to each channel; combination logic configured to combine the received error signal information and generate a combined error signal, weighting the received error signal information from each channel, for example with reliability information. An error compensation output is configured to apply the combined, weighted error signal to at least one channel phase locked loop.
摘要翻译：具有用于每个通道的锁相环的多通道数据检测系统的相位误差组合包括接收关于每个通道的相位误差信息; 组合逻辑，被配置为组合所接收的相位误差信息并产生组合的相位误差; 以及被配置为将组合的相位误差应用于至少一个通道锁相环的相位误差输出。另外，误差信号组合包括相对于每个信道接收与锁相环相关的信号的误差信息; 组合逻辑，其被配置为组合所接收的误差信号信息并产生组合误差信号，例如对可靠性信息加权来自每个信道的接收到的误差信号信息。误差补偿输出被配置为将组合的加权误差信号应用于至少一个通道锁相环。

24. 发明申请

US20100177427A1 SYSTEM AND METHOD FOR GENERATING AN AMPLITUDE ERROR SIGNAL IN A MAGNETIC TAPE RECORDING CHANNEL 有权
标题翻译：在磁带记录通道中产生振幅误差信号的系统和方法
公开(公告)号：US20100177427A1
公开(公告)日：2010-07-15
申请号：US12351432
申请日：2009-01-09
申请人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
发明人： Jacob Lee Dahle , Robert Allen Hutchins , Sedat Oelcer , Larry LeeRoy Tretter
IPC分类号： G11B5/035 , H04L27/01
CPC分类号： G11B5/035 , G11B20/10009 , G11B20/10027 , G11B2220/90 , H04L25/03248
摘要： A method according to one embodiment includes generating a first gain error, comprising: receiving an output of an equalizer; and comparing a magnitude of the output to a saturation threshold level; if the output is higher than the saturation threshold level, generating a first gain error. The method further including generating at least one of a second and a third gain error, wherein generating the second gain error comprises: using either a slicer or a trellis for generating the second gain error, wherein the slicer generates a gain error based on an output of an interpolator, wherein the trellis generates a gain error based on an output of a maximum likelihood detector; wherein generating the third gain error comprises: receiving an output of an equalizer; generating a threshold qualified peak from the equalizer output and a tracking threshold level; comparing the threshold qualified peak to a second threshold; and generating a third gain error based on the comparison.
摘要翻译：根据一个实施例的方法包括产生第一增益误差，包括：接收均衡器的输出; 以及将所述输出的幅度与饱和阈值电平进行比较; 如果输出高于饱和阈值电平，则产生第一增益误差。该方法还包括产生第二和第三增益误差中的至少一个，其中产生第二增益误差包括：使用限幅器或网格来产生第二增益误差，其中限幅器基于输出产生增益误差其中所述网格基于最大似然检测器的输出产生增益误差; 其中产生所述第三增益误差包括：接收均衡器的输出; 从均衡器输出产生阈值合格峰值和跟踪阈值电平; 将阈值合格峰值与第二阈值进行比较; 以及基于所述比较产生第三增益误差。

25. 发明申请

US20090097606A1 METHODS FOR MULTI-CHANNEL DATA DETECTION PHASE LOCKED LOOP FREQUENCY ERROR COMBINATION 失效
标题翻译：多通道数据检测方法相位锁定环路频率误差组合
公开(公告)号：US20090097606A1
公开(公告)日：2009-04-16
申请号：US11870934
申请日：2007-10-11
申请人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
发明人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
IPC分类号： H03D3/24
CPC分类号： H04L7/0029 , H03L7/07 , H03L7/087 , H03L7/091 , H04L7/0025 , H04L7/0062 , H04L7/0083
摘要： Frequency error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving frequency error information of a signal relevant to a phase locked loop with respect to each channel; combining the received error signal information and generating a combined error signal, weighting the received error signal information from each channel, for example with reliability information. The combined frequency error signal is applied to at least one channel phase locked loop.
摘要翻译：针对每个通道具有锁相环的多通道数据检测系统的频率误差组合包括相对于每个通道接收与锁相环相关的信号的频率误差信息; 组合接收到的误差信号信息并产生组合误差信号，例如用可靠性信息对来自每个信道的接收到的误差信号进行加权。组合的频率误差信号被施加到至少一个通道锁相环。

26. 发明申请

US20090097536A1 MULTI-CHANNEL DATA DETECTION PHASE LOCKED LOOP FREQUENCY ERROR COMBINATION LOGIC 失效
标题翻译：多通道数据检测相位锁定频率错误组合逻辑
公开(公告)号：US20090097536A1
公开(公告)日：2009-04-16
申请号：US11870921
申请日：2007-10-11
申请人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
发明人： Robert Allen Hutchins , Jens Jelitto , Sedat Oelcer
IPC分类号： H04Q1/20
CPC分类号： G11B20/10009 , G11B20/10037 , G11B20/10425
摘要： Frequency error combination for a multi-channel data detection system with a phase locked loop for each channel, comprises receiving frequency error information with respect to each channel; combination logic configured to combine the received frequency error information and generate a combined phase error, weighting the received frequency error information from each channel; and a frequency error output configured to apply the combined frequency error to at least one channel phase locked loop.
摘要翻译：针对每个通道的具有锁相环的多通道数据检测系统的频率误差组合包括接收关于每个通道的频率误差信息; 组合逻辑，其被配置为组合所接收的频率误差信息并产生组合的相位误差，从每个信道对所接收的频率误差信息进行加权; 以及频率误差输出，被配置为将组合的频率误差应用于至少一个通道锁相环。

27. 发明授权

US07436609B2 Apparatus method and system for concurrent gain control in a magnetic read channel 失效
标题翻译：磁读取通道中并发增益控制的装置方法和系统
公开(公告)号：US07436609B2
公开(公告)日：2008-10-14
申请号：US11014475
申请日：2004-12-15
申请人： Robert Allen Hutchins
发明人： Robert Allen Hutchins
IPC分类号： G11B5/09
CPC分类号： G11B20/10009 , G11B2020/1275 , G11B2020/1292
摘要： An apparatus, system, and method are disclosed for controlling gain in a magnetic media read channel. In one embodiment, a sampling module provides an asynchronous digital stream corresponding to encoded signals on a streaming magnetic medium, a stream synchronization module converts the asynchronous digital stream to a synchronous digital stream, and a gain control module processes the asynchronous digital stream and provides a gain control signal concurrent to synchronization of the asynchronous digital stream. The described apparatus, method, and system enables calibration of a read channel using a calibration signal (such as a VFO waveform) of shorter duration than attainable with currently available calibration means and methods.
摘要翻译：公开了一种用于控制磁介质读取通道中的增益的装置，系统和方法。在一个实施例中，采样模块提供与流式磁介质上的编码信号相对应的异步数字流，流同步模块将异步数字流转换为同步数字流，增益控制模块处理异步数字流并提供增益控制信号与异步数字流的同步并发。所描述的装置，方法和系统使得能够使用比当前可用的校准装置和方法可获得的持续时间更短的校准信号（例如VFO波形）来校准读取通道。

28. 发明申请

US20080151416A1 SYNCHRONOUS SERVO CHANNEL FOR TAPE DRIVE SYSTEMS 有权
公开(公告)号：US20080151416A1
公开(公告)日：2008-06-26
申请号：US12044950
申请日：2008-03-08
申请人： Giovanni Cherubini , Evangelos S. Eleftheriou , Robert Allen Hutchins , Jens Jelitto
发明人： Giovanni Cherubini , Evangelos S. Eleftheriou , Robert Allen Hutchins , Jens Jelitto
IPC分类号： G11B5/584
CPC分类号： G11B5/59688
摘要： A fully synchronous servo channel for a data tape drive is provided which includes the initial acquisition of synchronous servo channel parameters, generation of a timing basis for signal interpolation, generation of a tape velocity estimate and a y-position estimate and an optimum detection of longitudinal position (LPOS) symbols embedded in servo bursts.

29. 发明授权

US06525898B1 Detection of indexed servo positions displaced from servo track edges 失效
标题翻译：检测从伺服磁道边缘移位的索引伺服位置
公开(公告)号：US06525898B1
公开(公告)日：2003-02-25
申请号：US09413327
申请日：1999-10-07
申请人： Alex Chliwnyj , John James Gniewek , Robert Allen Hutchins , Steven Carter Wills
发明人： Alex Chliwnyj , John James Gniewek , Robert Allen Hutchins , Steven Carter Wills
IPC分类号： G11B5584
CPC分类号： G11B5/584 , G11B20/10
摘要： A servo position detector and a method for detecting and following an index position displaced at an offset with respect to an edge of a servo track, an edge comprising an interface between two dissimilar recorded servo signals. The servo track has two edges on opposite lateral sides of a middle recorded servo signal, the edges separated by a predetermined distance. A servo read element has an active sensing region which is no more than and is substantially the entire predetermined distance separating the edges, thereby.sensing no more than two of the dissimilar recorded servo signals at one of the edges. An independent position sensor senses the coarse position of the servo read element, indicating which edge or which index position is aligned with the servo read element. Logic compares the two sensed servo signals to determine the ratio therebetween, and determines an error between the compared ratio and a predetermined ratio. The predetermined ratio is an offset from a centered on-edge ratio, and identifies the index position. The logic provides the servo position error with respect to the index position. A servo positioner moves the servo read element to reduce the servo position error.
摘要翻译：一种伺服位置检测器和一种用于检测和跟随相对于伺服轨道的边缘偏移的指示位置的边缘，边缘包括两个不同的记录的伺服信号之间的接口。伺服轨道在中间记录的伺服信号的相对侧面具有两个边缘，边缘分开预定距离。伺服读取元件具有不超过并且基本上分开边缘的整个预定距离的有源感测区域，从而在一个边缘处不超过两个不同的记录伺服信号。独立的位置传感器感测伺服读取元件的粗略位置，指示哪个边缘或哪个索引位置与伺服读取元件对准。逻辑比较两个检测到的伺服信号以确定它们之间的比例，并且确定比较率和预定比率之间的误差。预定比率是与中心边缘比率的偏移，并且识别索引位置。该逻辑提供了相对于索引位置的伺服位置误差。伺服定位器移动伺服读取元件以减少伺服位置误差。

30. 发明授权

US06181499B2 Method and apparatus for testing the digital read channel circuit of a data storage device 失效
标题翻译：用于测试数据存储设备的数字读通道电路的方法和装置
公开(公告)号：US06181499B2
公开(公告)日：2001-01-30
申请号：US09056381
申请日：1998-04-07
申请人： Robert Allen Hutchins , Scott Jeffrey Schaffer
发明人： Robert Allen Hutchins , Scott Jeffrey Schaffer
IPC分类号： G11B509
CPC分类号： G11B5/09 , G11B20/10009 , G11B27/36 , G11B2220/90
摘要： A method and apparatus for testing digital read channel circuits within a data storage device includes a digital read channel circuit coupled to a simulated impulse response module are disclosed. The data storage device includes a digital read channel circuit coupled to a simulated impulse response module. A pseudo analog-to-digital waveform is generated by the simulated impulse response module is input into the digital read channel circuit. The digital read channel circuit then decodes the pseudo analog-to-digital waveform to form a set of binary data. After receiving the set of binary data, a formatter/deformatter verifies the correctness of the binary data, such that the integrity of the digital read channel circuit and the formatter/deformatter can be determined.
摘要翻译：一种用于测试数据存储设备内的数字读通道电路的方法和装置包括耦合到模拟脉冲响应模块的数字读通道电路。数据存储设备包括耦合到模拟脉冲响应模块的数字读通道电路。模拟脉冲响应模块被输入到数字读通道电路中产生伪模拟数字波形。然后，数字读通道电路对伪模拟数字波形进行解码以形成一组二进制数据。在接收到二进制数据集之后，格式化器/去格式化器验证二进制数据的正确性，从而可以确定数字读通道电路和格式器/解格式器的完整性。

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