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21. 发明授权

US06990418B2 Method and systems for optimizing high-speed signal transmission 失效
公开(公告)号：US06990418B2
公开(公告)日：2006-01-24
申请号：US10697832
申请日：2003-10-30
申请人： Alain Blanc , Patrick Jeanniot
发明人： Alain Blanc , Patrick Jeanniot
IPC分类号： G01R13/00 , H04B17/00
CPC分类号： H04L25/03343 , H04L1/0001 , H04L1/20 , H04L7/0337 , H04L2025/03375
摘要： A method and systems for automatically adjusting the parameters of signal emitter in a synchronous high-speed transmission system, is disclosed. According to the method of the invention, the quality of a high-speed received signal is analyzed for a plurality of sets of parameter values and the one producing the best signal quality is selected. In a first embodiment, the quality of the high-speed received signal is determined by analyzing a digital eye characterizing the signal behavior, obtained by over-sampling the high-speed received signal. In a second embodiment, the quality of the high-speed received signal is determined by analyzing the behavior of the phase rotator used for data sampling. Finally, in a third embodiment, the quality of the high-speed received signal is determined by analyzing a digital eye, obtained by moving the position of a phase rotator from one end to the other and sampling data at each position.

22. 发明授权

US06606300B1 Flow control process for a switching system and system for performing the same 失效
公开(公告)号：US06606300B1
公开(公告)日：2003-08-12
申请号：US09219081
申请日：1998-12-22
申请人： Alain Blanc , Pierre Debord , Alain Saurel , Bernard Brezzo
发明人： Alain Blanc , Pierre Debord , Alain Saurel , Bernard Brezzo
IPC分类号： H04L1256
CPC分类号： H04L49/3081 , H04L49/1507 , H04L49/201 , H04L49/25 , H04L49/50 , H04L49/506 , H04L2012/563 , H04L2012/5672 , H04Q11/0478
摘要： A flow control process for a switching system having at least one switch core connected through serial communication links to remote and distributed Protocol Adapters or Protocol Engines through Switch Core Access Layer (SCAL) elements. For each input port i, the SCAL element contains a receive Protocol Interface corresponding to the adapter assigned to the input port i and a first serializer for providing attachment to the switch core by means of a first serial communication link. When the cells are received in the switch core, they are deserialized by means of a first deserializer. At each output port, the cells are serialized again by means of a second serializer and then transmitted via a second serial communication link, to the appropriate SCAL. The SCAL contains a second deserializer and a transmit Protocol Interface circuit for permitting attachment of the Protocol Adapter. The flow control process permits two flow control signals, a flow control receive (FCR) from the core to the SCAL, and a flow control transmit (FCX) from the SCAL back to the core. For transmission of the FCR signal in response to the detection of local saturation in the switch core, the process causes transfer of an internal FCR signal to the serializer located within the saturated core. The FCR is introduced in the normal data flow to be conveyed through the second serial link to the remote SCAL corresponding to the saturated input port of the core. An internal control signal can be transmitted to the Protocol Interface that is originating too many cells which results in the overloaded input port of the core. For the transmission of the FCX signal in response to the detection of a saturated Protocol Interface element at one output port, the process generates an internal control signal to the serializer located in the SCAL element. The serializer can introduce a FCX signal in the normal data flow which is conveyed to the core and then decoded by the deserializer in the core. Thus, the core can be informed of the saturation condition that has occurred in the considered output port. Particular adaptations are provided in which the switching system is arranged in a set of individual switching structures mounted in a port expansion mode.

23. 发明授权

US5359709A Apparatus and method for providing multiple operating configurations in data circuit terminating equipment 失效
标题翻译：在数据电路终端设备中提供多种操作配置的装置和方法
公开(公告)号：US5359709A
公开(公告)日：1994-10-25
申请号：US826504
申请日：1992-01-27
申请人： Alain Blanc , Sylvie Gohl-Roux , Gottfried Ungerboeck
发明人： Alain Blanc , Sylvie Gohl-Roux , Gottfried Ungerboeck
IPC分类号： H04L5/00 , H04L27/00 , H04L29/06 , H04L29/10 , G06F13/42
CPC分类号： H04L29/06 , H04L27/00
摘要： Multiple operating configurations in data circuit terminating equipment (DCE) are enabled through multiple queues stored in a random access memory and which are loaded with bits and characters coming either from data terminating equipment (DTE) or the telecommunications line. The DSP processor stores bits provided by a transmit circuit in a first queue, determines characters from the bits stored in the first queue based on a first transmission protocol and stores the characters in a second queue. A third queue is used by a control processor to store characters to be transmitted to a remote DCE. The DSP processor determines bits to be transmitted from the characters stored in a third queue based on a second transmission protocol, and stores those bits in a fourth queue. When the DCE is operating in a synchronous mode, the DSP processor determines PCM words for transmission based on the contents of the second queue and stores them in a fifth queue for transmission. Similarly, when the DCE switches to an asynchronous mode, the DSP processor determines PCM words based on the contents of the fourth queue and stores them in the fifth queue for transmission. A similar queue arrangement is provided for the receive circuitry of the DCE.
摘要翻译：数据电路终端设备（DCE）中的多种操作配置通过存储在随机存取存储器中的多个队列启用，并且装载有来自数据终端设备（DTE）或电信线路的位和字符。 DSP处理器将由发送电路提供的位在第一队列中存储，基于第一传输协议从存储在第一队列中的比特确定字符，并将该字符存储在第二队列中。控制处理器使用第三个队列来存储要发送到远程DCE的字符。 DSP处理器基于第二传输协议确定从存储在第三队列中的字符发送的比特，并将这些比特存储在第四队列中。当DCE工作在同步模式时，DSP处理器根据第二个队列的内容来确定用于传输的PCM字，并将其存储在第五个队列中进行传输。类似地，当DCE切换到异步模式时，DSP处理器基于第四队列的内容来确定PCM字，并将它们存储在第五队列中以进行传输。为DCE的接收电路提供了类似的队列布置。

24. 发明授权

US4918139A Aqueous dispersions of thermally cross-linkable polymers based on alkyl (meth)acrylate, the process for their preparation and their use in particular as binders and/or impregnation agents 失效
标题翻译：基于（甲基）丙烯酸烷基酯的可热交联聚合物的水分散体，其制备方法及其特别用作粘合剂和/或浸渍剂
公开(公告)号：US4918139A
公开(公告)日：1990-04-17
申请号：US332136
申请日：1989-04-03
申请人： Fernand Cuirassier , Didier Wilheim , Alain Blanc
发明人： Fernand Cuirassier , Didier Wilheim , Alain Blanc
IPC分类号： C08L33/06 , C08F2/22 , C08F8/28 , C08F20/52 , C08F220/06 , C08F220/10 , C08F220/12 , C08F220/18 , C08F220/58 , C08L33/04 , D06M15/263 , D06M15/285 , D21H19/44
CPC分类号： C08F220/12 , C08F8/28 , C08F2800/20 , C08F2810/20
摘要： These aqueous dispersions contain a copolymerizate containing 90 to 99% by weight of repeating units resulting from the polymerization of a mixture of monomers (a) based on 0.1 to 10% by weight of alpha,beta-ethylenic mono- and/or di-carboxylic C.sub.3 -C.sub.5 acid and/or their amides, 0 to 10% by weight of styrene and/or acrylonitrile, the remainder of the esters of (meth)acrylic acid with C.sub.1 -C.sub.12 alkanols; and 10 to 1% by weight of repeating units of general formula (I) ##STR1## where R=H or --CH.sub.3, R.sub.1 =H or C.sub.1 -C.sub.4 alkyl and R.sub.2 and R.sub.3 =C.sub.1 -C.sub.8 alkyl or a --CH.sub.2 --CR.sub.4 R.sub.5 --(CH.sub.2).sub.n --group in which n=0 or 1 and R.sub.4 and R.sub.5 =H or --CH.sub.3.
摘要翻译：这些水性分散体含有共聚合物，其含有90至99重量％的由单体混合物（a）聚合得到的重复单元，基于0.1至10重量％的α，β-烯属单 - 和/或二 - 羧酸 C3-C5酸和/或它们的酰胺，0至10重量％的苯乙烯和/或丙烯腈，其余的（甲基）丙烯酸与C 1 -C 12链烷醇的酯; 和10至1重量％的通式（I）的重复单元其中R = H或-CH 3，R 1 = H或C 1 -C 4烷基，R 2和R 3 = C 1 -C 8烷基或 - CH2-CR4R5-（CH2）n-基，其中n = 0或1，R4和R5 = H或-CH3。

25. 发明申请

US20080013548A1 Data Packet Switch and Method of Operating Same 失效
标题翻译：数据包交换机和操作方法相同
公开(公告)号：US20080013548A1
公开(公告)日：2008-01-17
申请号：US11852661
申请日：2007-09-10
申请人： Rene Glaise , Alain Blanc , Francois Maut , Michel Poret
发明人： Rene Glaise , Alain Blanc , Francois Maut , Michel Poret
IPC分类号： H04L12/56
CPC分类号： H04L49/15 , H04L49/103 , H04L49/1523 , H04L49/201 , H04L49/253 , H04L49/90
摘要： A high speed data packet switch comprising input and output ports and a switch fabric to link each input port to each output port wherein each connection between input and output ports comprises a dynamic buffer memory for storing at least one data packet for a minimum specified storing time is disclosed. When a data packet is received through an input port, it is written in all individual dynamic memory buffers connected to this input port so as to have a copy of the incoming data packet ready to go through any output port to support unicast, multicast and broadcast traffic. Given the architecture of the data packet switch and its control algorithm, dynamic memory buffers neither need to be refreshed nor their contents have to be restored after reading.
摘要翻译：包括输入和输出端口的高速数据分组交换机以及将每个输入端口链接到每个输出端口的交换结构，其中输入和输出端口之间的每个连接包括动态缓冲存储器，用于存储至少一个数据分组用于最小指定的存储时间被披露。当通过输入端口接收到数据包时，它被写入连接到该输入端口的所有单独的动态存储器缓冲器中，以便具有输入数据包的副本准备通过任何输出端口来支持单播，多播和广播交通。给定数据包交换机的架构及其控制算法，动态内存缓冲区既不需要刷新，也不需要在读取后恢复其内容。

26. 发明申请

US20070271050A1 METHOD AND SYSTEMS FOR OPTIMIZING HIGH-SPEED SIGNAL TRANSMISSION 失效
标题翻译：用于优化高速信号传输的方法和系统
公开(公告)号：US20070271050A1
公开(公告)日：2007-11-22
申请号：US11764453
申请日：2007-06-18
申请人： Alain Blanc , Patrick Jeanniot
发明人： Alain Blanc , Patrick Jeanniot
IPC分类号： G06F19/00
CPC分类号： H04L25/03343 , H04L1/0001 , H04L1/20 , H04L7/0337 , H04L2025/03375
摘要： A method and systems for automatically adjusting the parameters of signal emitter in a synchronous high-speed transmission system, is disclosed. According to the method of the invention, the quality of a high-speed received signal is analyzed for a plurality of sets of parameter values and the one producing the best signal quality is selected. In a first embodiment, the quality of the high-speed received signal is determined by analyzing a digital eye characterizing the signal behavior, obtained by over-sampling the high-speed received signal. In a second embodiment, the quality of the high-speed received signal is determined by analyzing the behavior of the phase rotator used for data sampling. Finally, in a third embodiment, the quality of the high-speed received signal is determined by analyzing a digital eye, obtained by moving the position of a phase rotator from one end to the other and sampling data at each position.
摘要翻译：公开了一种在同步高速传输系统中自动调整信号发射器参数的方法和系统。根据本发明的方法，对多组参数值分析高速接收信号的质量，并选择产生最佳信号质量的参数值。在第一实施例中，通过分析表征由高速接收信号过采样得到的信号行为的数字眼来确定高速接收信号的质量。在第二实施例中，通过分析用于数据采样的相位旋转器的行为来确定高速接收信号的质量。最后，在第三实施例中，通过分析通过将相位旋转器的位置从一端移动到另一端而获得的数字眼，并且在每个位置处采样数据来确定高速接收信号的质量。

27. 发明授权

US06728251B1 Switching apparatus comprising a centralized switch core and at least one SCAL element(s) for the attachment of various protocol adapters 失效
标题翻译：交换设备包括集中式交换机核心和至少一个用于附接各种协议适配器的SCAL元件
公开(公告)号：US06728251B1
公开(公告)日：2004-04-27
申请号：US09315906
申请日：1999-05-20
申请人： Alain Blanc , Gerard Orengo , Michel Poret
发明人： Alain Blanc , Gerard Orengo , Michel Poret
IPC分类号： H04L1228
CPC分类号： H04L49/1538 , H04L49/30 , H04L49/3081 , H04L2012/5652 , H04L2012/5681 , H04Q11/0478
摘要： By appropriate arrangement of two sets of tables chosen to be complementary, cells which are conveyed through a first multiplexor, n RAM storages and the second are subject to a cell rearrange-ment enabling introduction of at least one bitmap field, thereby producing the n Logical Units. When two bytes which are processed in parallel have to be loaded at the same time in the same RAM storage, one particular byte is stored into one RAM available for a Write operation by use of the first set of tables, thereby causing an alteration to the normal association between the n RAMs and the n Logical Units which is then re-established by the second set of tables.
摘要翻译：通过适当布置选择为互补的两组表，通过第一多路复用器传送的单元，n个RAM存储器和第二个存储单元进行单元重新布置，使得能够引入至少一个位图字段，从而产生n逻辑单位。当并行处理的两个字节必须同时被加载到同一个RAM存储器中时，通过使用第一组表，一个特定的字节被存储到可用于写入操作的一个RAM中，从而导致对 n个RAM和n个逻辑单元之间的正常关联，然后由第二组表重新建立。

28. 发明授权

US06597656B1 Switch system comprising two switch fabrics 失效
标题翻译：交换机系统包括两个交换结构
公开(公告)号：US06597656B1
公开(公告)日：2003-07-22
申请号：US09317006
申请日：1999-05-24
申请人： Alain Blanc , Sylvie Gohl , Alain Saurel , Bernard Brezzo , Jean-Claude Robbe
发明人： Alain Blanc , Sylvie Gohl , Alain Saurel , Bernard Brezzo , Jean-Claude Robbe
IPC分类号： H04L122
CPC分类号： H04L12/5601 , H04L49/108 , H04L49/309 , H04L49/455 , H04L2012/5627 , H04L2012/5647
摘要： A switching system having at least two switch fabrics. Each fabric has a switch core and a set of SCAL (Switch Core Access Layer) receive and transmit elements. The switch cores are preferably located in the same physical area but the SCALs may be distributed in different physical areas. Port Adapters distributed at different physical areas are connected to the switch fabrics via a particular SCAL element so that each switch core can receive cells from any port adapter and conversely any port adapter may receive data from either switch core. Control logic assigns a particular switch core to one port adapter for normal operations while reserving the other switch core for use when the first core is out of service. Each switch core has a mask mechanism which uses the value in a mask register to alter a bitmap value which controls the routing process. The mask registers in the two switch cores are loaded with complementary values.
摘要翻译：一种具有至少两个交换结构的交换系统。每个结构具有交换机核心和一组SCAL（交换机核心接入层）接收和发送元素。交换机核心优选地位于相同的物理区域中，但是SCAL可以分布在不同的物理区域中。分布在不同物理区域的端口适配器通过特定的SCAL元件连接到交换结构，使得每个交换机核心可以从任何端口适配器接收单元，相反，任何端口适配器可以从交换机核心接收数据。控制逻辑将特定的交换机核心分配给一个端口适配器进行正常操作，同时在第一个核心停止工作时保留另一个交换机内核以供使用。每个交换机核心都有一个掩码机制，使用掩码寄存器中的值来更改控制路由进程的位图值。两个交换机核心中的掩码寄存器加载互补值。

29. 发明授权

US6108334A Switching system comprising distributed elements allowing attachment to line adapters 失效
标题翻译：交换系统包括允许连接到线路适配器的分布式元件
公开(公告)号：US6108334A
公开(公告)日：2000-08-22
申请号：US992871
申请日：1997-12-17
申请人： Alain Blanc , Bernard Brezzo , Michel Poret , Alain Saurel
发明人： Alain Blanc , Bernard Brezzo , Michel Poret , Alain Saurel
IPC分类号： H04L12/70 , H04L12/933 , H04L12/935 , H04Q11/04 , H04L12/56
CPC分类号： H04L49/3081 , H04L49/1553 , H04Q11/0478 , H04L2012/5642
摘要： A switching system comprising a switching structure for routing cells from a set of M input ports towards a set of M output ports. The system includes a set of distributed individual Switch Core Access layer elements which communicate with one input and output port of the switching structure by means of a set of serial communication links. Each SCAL element provides attachment to at least one Protocol Adapter and comprises a set of circuits. The receive part of each circuit, which includes at least one first FIFO storage for storing the cells being received, receives the data cells from the attached Protocol Adapter and introduces at least one extra byte to every cell. Each transmit part of the destination circuit, which includes at least one second FIFO storage having a greater capacity than the first FIFO storage, receives all the cells that are generated at the corresponding output port and uses the at least one extra byte for cell buffering. Additionally, each distrubuted SCAL element comprises control means for performing Time Division Multiplexing access of the FIFOs.
摘要翻译：一种交换系统，包括用于将一组M个输入端口的单元路由到一组M个输出端口的交换结构。该系统包括一组分布式的交换机核心接入层元件，它们通过一组串行通信链路与交换结构的一个输入和输出端口通信。每个SCAL元件提供至少一个协议适配器的附件，并且包括一组电路。每个电路的接收部分包括至少一个用于存储接收的单元的第一FIFO存储器，从附加的协议适配器接收数据单元，并向每个单元引入至少一个额外的字节。目的地电路的每个发送部分包括具有比第一FIFO存储器更大的容量的至少一个第二FIFO存储器，接收在相应输出端口处生成的所有单元，并使用该至少一个额外字节用于单元缓冲。另外，每个分散的SCAL元件包括用于执行FIFO的时分多路复用访问的控制装置。

30. 发明授权

US5382667A Substituted succinimides as corrosion inhibitors 失效
标题翻译：取代的琥珀酰亚胺作为腐蚀抑制剂
公开(公告)号：US5382667A
公开(公告)日：1995-01-17
申请号：US178532
申请日：1994-01-05
申请人： Didier Wilhelm , Michel Soreau , Alain Blanc
发明人： Didier Wilhelm , Michel Soreau , Alain Blanc
IPC分类号： C07D207/40 , C07D207/412 , C07D413/06 , C23F11/14 , C23F11/00
CPC分类号： C07D207/412 , C07D413/06 , C23F11/145
摘要： Substituted succinimides of formula (I) ##STR1## in which R represents an alkyl radical containing 5 to 15 carbon atoms and R.sub.1 represents an oxo-2 morpholino radical or a (carboxymethyl)(hydroxy-2 ethyl) amino radical and their salts, and use for obtaining concentrates intended for metal-working, particularly for combatting corrosion.
摘要翻译：取代的式（I）的琥珀酰亚胺，其中R表示含有5至15个碳原子的烷基，R 1表示氧代-2-吗啉基或（羧甲基）（羟基-2-乙基）氨基及其盐，以及用于获得旨在金属加工的浓缩物，特别是用于抵抗腐蚀。

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