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    • 22. 发明授权
    • Power converter
    • 电源转换器
    • US5608614A
    • 1997-03-04
    • US280552
    • 1994-07-26
    • Masahito OhnishiShozo KataokaTakashi KandaTakashi YamasakiKazuo Yoshida
    • Masahito OhnishiShozo KataokaTakashi KandaTakashi YamasakiKazuo Yoshida
    • H02J1/00H02M1/42H02M3/00H02M3/07H02M7/06H02M3/18
    • H02M1/4208H02M3/07Y02B70/126
    • A power converter has two switched capacitor circuits each including at least a plurality of sets of capacitors and switching elements, first of which circuits is provided for supplying a DC power to a load while second of which accumulates a power in a period receiving a higher input voltage, and the first switched capacitor circuit being made to receive, in a period receiving a lower input voltage, a power supplied from a DC power source and also the power supplied from the second switched capacitor circuit for supplying to the load the DC power of a constant voltage, in which an input current collectively taken up by the two switched capacitor circuits is made similar in the waveform to the input voltage to eliminate any harmonics distortion of the current drawn from the source, for attaining the supply of the DC power of the constant voltage to the load, whereby the power converter is rendered not to require any large inductor to be capable of being minimized in size and restraining any noise radiation from occurring.
    • 功率转换器具有两个开关电容器电路,每个开关电容器电路至少包括多组电容器和开关元件,其中首先提供用于向负载提供DC电力的电路,其中第二个电容器在接收较高输入的时段内积累功率 电压,并且第一开关电容器电路在接收较低输入电压的时间段内接收从直流电源提供的电力,以及从第二开关电容器电路提供的电力,以向负载提供直流电力 恒定电压,其中由两个开关电容器电路共同占据的输入电流在波形中与输入电压相似,以消除从源极吸取的电流的任何谐波失真,以获得 对负载的恒定电压,从而使得功率转换器不需要任何大的电感器能够在尺寸上最小化并限制 g发生任何噪音辐射。
    • 27. 发明授权
    • Clock selection circuit for selecting between an external clock and a clock generated by comparing a count value with a setting value
    • 时钟选择电路,用于通过将计数值与设定值进行比较而产生的外部时钟与时钟之间进行选择
    • US06920577B2
    • 2005-07-19
    • US09881712
    • 2001-06-18
    • Takashi YamasakiHideo Matsui
    • Takashi YamasakiHideo Matsui
    • G06F15/78G06F1/025G06F1/04G06F1/12G06F13/38G06F13/42H03K5/00H03K19/0175G06F12/00
    • G06F1/025G06F1/04
    • A setting value is initially stored in a comparison and coincidence register. Thereafter, a value of a count signal is incremented in a base timer while resetting the value of the count signal to zero each time the value of the count signal reaches a prescribed value. A coincidence signal set to “1” is output from the comparison and coincidence register each time the setting value agrees with the value of the count signal, and a clock signal is produced in an RS flip-flop according to the coincidence signal. A data transmission is performed each time the coincidence signal is received in a transmission shift register. On a reception side, the clock signal is received, and the data is received according to the clock signal. Therefore, in cases where a desired setting value is stored in the comparison and coincidence register, the repetition period of the data transmission and reception can be freely changed. Also, the timer function of the base circuit is, as it is, used to transmit or receive data, the number of elements required in the data input and output device can be reduced in hardware.
    • 设定值最初存储在比较和重合寄存器中。 此后,每当计数信号的值达到规定值时,在基本定时器中递增计数信号的值,同时将计数信号的值复位为零。 每当设定值与计数信号的值一致时,从比较和重合寄存器输出设定为“1”的一致信号,根据该重合信号在RS触发器中产生时钟信号。 每当在发送移位寄存器中接收到符合信号时,执行数据传输。 在接收侧,接收时钟信号,并根据时钟信号接收数据。 因此,在比较一致寄存器中存储期望的设定值的情况下,可以自由地改变数据发送和接收的重复周期。 此外,基本电路的定时器功能原样用于发送或接收数据,可以在硬件中减少数据输入和输出设备中所需的元件数量。
    • 28. 发明授权
    • Electroacoustic transducer
    • 电声换能器
    • US06804363B2
    • 2004-10-12
    • US10297141
    • 2002-12-03
    • Takashi YamasakiKenichi Kidokoro
    • Takashi YamasakiKenichi Kidokoro
    • H04R2500
    • H04R19/01H04R19/016H04R25/00
    • An electroacoustic transducer comprises a carrier portion, a diaphragm supported by the carrier portion, an electrode portion opposed to the diaphragm at a predetermined interval, and a housing accommodating the diaphragm and the electrode portion, wherein the carrier portion has a saucer-like shape, at the bottom surface of which a plurality of upstanding posts are provided, and wherein the upper surface of the periphery of the carrier portion and the upper end surfaces of the posts are in the same plane, the diaphragm is bonded to the surface of the periphery of the carrier portion and the end surfaces of the posts, and the electrode portion is fixed to the end surfaces of the posts which are covered by the diaphragm with spacers interposed therebetween.
    • 电声换能器包括载体部分,由载体部分支撑的隔膜,以预定间隔与隔膜相对的电极部分,以及容纳隔膜和电极部分的壳体,其中载体部分具有碟形形状, 在其底面设有多个直立柱,并且其中承载部分的周边的上表面和柱的上端表面在同一平面中,隔膜结合到周边的表面 的载体部分和柱的端面,并且电极部分被固定到由膜片覆盖的柱的端面,间隔件插入其间。
    • 30. 发明授权
    • DMA control device controlling sequential storage of data
    • DMA控制设备控制数据的顺序存储
    • US5499383A
    • 1996-03-12
    • US301222
    • 1994-09-06
    • Takashi Yamasaki
    • Takashi Yamasaki
    • G06F13/28G06F13/20
    • G06F13/28
    • A DMA transfer of 8-bit units and 16-bit units can be performed regardless of the proceeding direction of the address and whether the first address to be accessed is even or odd. In a conventional DMA transfer, the DMA control device required a function for selecting 8-bit configuration or 16-bit configuration of transfer data when the proceeding directions of addresses at the transfer source and transfer destination were different. The present invention reverses a determined result and indicates whether the first address to be transferred is even or odd, when the proceeding direction of the address is "reverse" and the data has a 16-bit configuration.
    • 可以执行8位单位和16位单位的DMA传输,而不管地址的进行方向以及要访问的第一个地址是偶数还是奇数。 在传统的DMA传输中,当传输源和传输目的地的进行方向不同时,DMA控制设备需要选择8位配置或传输数据的16位配置的功能。 本发明反转确定结果,并且当地址的前进方向为“反向”并且数据具有16位配置时,反转要传送的第一地址是偶数还是奇数。