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21. 发明授权

US07286979B2 Communication terminal and communication system 失效
标题翻译：通信终端和通信系统
公开(公告)号：US07286979B2
公开(公告)日：2007-10-23
申请号：US10614117
申请日：2003-07-08
申请人： Kazuhiro Maeda , Shoichirou Funato , Toshio Kamimura
发明人： Kazuhiro Maeda , Shoichirou Funato , Toshio Kamimura
IPC分类号： G10L21/00 , G10L15/00 , H04L29/08
CPC分类号： G10L19/0018
摘要： The communication terminal is comprised of: a voice input unit for inputting voice; a voice converting unit for converting the voice inputted into a voice signal; a character converting unit for converting the voice signal into a character signal; a transmitting unit capable of transmitting both the voice signal and the character signal via a communication line; and a control unit for controlling the transmitting unit in such a manner that the transmitting unit transmits the voice signal, or the character signal in response to a condition of the communication line. Also, the communication terminal is comprised of: a receiving unit capable of receiving both a voice signal and a character signal; an output unit for outputting the voice signal received by the receiving unit; and a display unit for displaying thereon the character signal received by the receiving unit.
摘要翻译：通信终端包括：用于输入语音的语音输入单元; 语音转换单元，用于将输入的语音转换成语音信号; 字符转换单元，用于将语音信号转换成字符信号; 发送单元，能够经由通信线路发送语音信号和字符信号; 以及控制单元，用于以发送单元响应于通信线路的状况发送语音信号或字符信号的方式控制发送单元。此外，通信终端包括：能够接收语音信号和字符信号的接收单元; 输出单元，用于输出由接收单元接收的语音信号; 以及显示单元，用于在其上显示由接收单元接收的字符信号。

22. 发明授权

US07196699B1 Latch circuit, shift register circuit, logical circuit and image display device operated with a low consumption of power 有权
标题翻译：锁存电路，移位寄存器电路，逻辑电路和图像显示设备以低功耗运行
公开(公告)号：US07196699B1
公开(公告)日：2007-03-27
申请号：US09506033
申请日：2000-02-16
申请人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
发明人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
IPC分类号： G09G5/00 , G09G3/26 , H03K19/0175 , H03K19/00 , H03K5/153
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0417 , G09G2310/021 , G09G2310/0289 , G09G2330/021 , G11C19/00 , G11C19/28
摘要： A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts. According to the construction, the amplitude of an input signal can be made smaller than a supply voltage of the logical circuit.
摘要翻译： CMOS逻辑电路包括两个电流路径，每个电路具有由n型和p型晶体管组成的电路。在由n型或p型晶体管组成的电路中，一个电流路径设置有与具有CMOS逻辑电路的n型晶体管的电路相同结构的电路，该逻辑电路输出类似于该逻辑电路的另一个电流路径具有与具有CMOS逻辑电路的p型晶体管的电路相同结构的电路，该电路输出类似于该逻辑电路的逻辑运算结果。在由另一沟道型构成的另一电路中，设置在一个电流路径上的晶体管的栅电极和设置在另一电流路径上的晶体管的栅电极连接到对应物的漏电极。根据该结构，可以使输入信号的幅度小于逻辑电路的电源电压。

23. 发明授权

US07079096B2 Image display device and display driving method 失效
公开(公告)号：US07079096B2
公开(公告)日：2006-07-18
申请号：US10253570
申请日：2002-09-24
申请人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
发明人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3614 , G09G3/3688 , G09G2310/0248
摘要： Before a potential of counter electrode is changed, a potential holding circuit fixedly holds potentials of data signal lines S during a non-selective period of scanning signal lines G. This prevents the potentials of the data signal lines S from being an undesirably large potential, which is caused by coupling capacitors between the counter electrode and each data signal line S, whereby it is possible to supply to the pixel capacitor an electric charge corresponding to a gradation to be displayed, by using the relatively low potentials of the data signal lines S. This lowers a power supply voltage of a data signal driving circuit SD, thus reducing the electric power consumption. In short, with this arrangement, a liquid crystal display device can perform an opposed AC drive for line-inversion drive, frame-inversion drive and the like, by low power supply voltage of the data signal line driving circuit SD, thereby reducing the electric power consumption.

24. 发明授权

US06940500B2 Image display device and display driving method 有权
标题翻译：图像显示装置和显示驱动方法
公开(公告)号：US06940500B2
公开(公告)日：2005-09-06
申请号：US10252497
申请日：2002-09-23
申请人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
发明人： Hajime Washio , Yasuyoshi Kaise , Kazuhiro Maeda , Yasushi Kubota
IPC分类号： G02F1/133 , G09G3/20 , G09G3/36 , G09G5/00
CPC分类号： G09G3/3648 , G09G3/3688 , G09G2310/0248 , G09G2330/021
摘要： A potential of a data signal line S during a scanning period is charged to a substantially intermediate potential of a data signal at a corresponding frame. Thus, extremely large dispersion does not occur in a potential of each pixel capacitor with respect to a potential of the data signal line S, so that it is possible to restrict dispersion of a leak current flowing via an active element of each pixel. Thus, potential variation of a pixel PIX is reduced, so that it is possible to improve display quality during a non-scanning period. That is, in an active-matrix-type liquid crystal display, when a frame frequency is reduced by setting the non-scanning period to be sufficiently larger than a scanning period while a standby image is being displayed so as to realize low power consumption, the display quality is improved.
摘要翻译：扫描周期期间的数据信号线S的电位被充电到相应帧的数据信号的大致中间电位。因此，相对于数据信号线S的电位，每个像素电容器的电位不会发生极大的色散，从而可以限制流过每个像素的有源元件的漏电流的色散。因此，像素PIX的电位变化减小，使得可以在非扫描期间提高显示质量。也就是说，在有源矩阵型液晶显示器中，当通过在显示待机图像的同时将非扫描周期设置为比扫描周期充分大来降低帧频，从而实现低功耗，显示质量得到提高。

25. 发明申请

US20050129010A1 Communications terminal 审中-公开
标题翻译：通讯终端
公开(公告)号：US20050129010A1
公开(公告)日：2005-06-16
申请号：US10823696
申请日：2004-04-14
申请人： Kazuhiro Maeda , Koichi Terui
发明人： Kazuhiro Maeda , Koichi Terui
IPC分类号： G06F11/00 , G06F1/00 , G06F9/44 , G06F21/22 , H04L12/28 , H04L29/08 , H04W8/24
CPC分类号： H04L67/34 , H04W8/245
摘要： Conventionally, no provision has been made to perform an update during a period of time during which the user does not use a communications terminal. Frequently used programs and data need be updated frequently, and infrequently used programs and data need not be frequently updated. Therefore, it is preferred that an update be performed depending on the frequency of use. No provision has been made heretofore to perform an update in accordance with frequency of use. To solve these problems, the communications terminal has a communication section for communicating with a server via a communication network, a storage section for storing a program, a control section for controlling the communication section and storage section, and a usage storage section for storing the usage status of the communications terminal, and a program stored in the storage section is updated in accordance with the usage status stored in the usage storage section.
摘要翻译：通常，在用户不使用通信终端的时间段期间，没有进行更新来进行更新。经常使用的程序和数据需要频繁更新，不经常使用的程序和数据不需要频繁更新。因此，优选根据使用频率进行更新。迄今为止，根据使用频率不进行更新。为了解决这些问题，通信终端具有用于经由通信网络与服务器通信的通信部，用于存储程序的存储部，用于控制通信部和存储部的控制部，以及用于存储通信终端的使用状态和存储在存储部中的程序根据存储在使用存储部中的使用状态来更新。

26. 发明申请

US20050057556A1 Latch circuit, shift register circuit, logical circuit and image display device operated with a low consumption of power 有权
标题翻译：锁存电路，移位寄存器电路，逻辑电路和图像显示设备以低功耗运行
公开(公告)号：US20050057556A1
公开(公告)日：2005-03-17
申请号：US10949990
申请日：2004-09-23
申请人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
发明人： Yasushi Kubota , Hajime Washio , Ichiro Shiraki , Kazuhiro Maeda , Yasuyoshi Kaise
IPC分类号： G09G5/00
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2300/0408 , G09G2300/0417 , G09G2310/021 , G09G2310/0289 , G09G2330/021 , G11C19/00 , G11C19/28
摘要： A CMOS logical circuit comprises two electric current paths each of which has circuits consisting of n-type and p-type transistors. In a circuit consisting of n-type or p-type transistors, one electric current path is provided with a circuit having the same construction as that of a circuit having an n-type transistor of a CMOS logical circuit outputting a logical operation result similar to that of this logical circuit, and the other electric current path is provided with a circuit having the same construction as that of a circuit having a p-type transistor of the CMOS logical circuit outputting a logical operation result similar to that of this logical circuit. In another circuit consisting of the other channel type, a gate electrode of the transistor provided on the one electric current path and that of the transistor provided on the other electric current path are connected to drain electrodes of the counterparts. According to the construction, the amplitude of an input signal can be made smaller than a supply voltage of the logical circuit.
摘要翻译： CMOS逻辑电路包括两个电流路径，每个电路具有由n型和p型晶体管组成的电路。在由n型或p型晶体管组成的电路中，一个电流路径设置有与具有CMOS逻辑电路的n型晶体管的电路相同结构的电路，该逻辑电路输出类似于该逻辑电路的另一个电流路径具有与具有CMOS逻辑电路的p型晶体管的电路相同结构的电路，该电路输出类似于该逻辑电路的逻辑运算结果。在由另一沟道型构成的另一电路中，设置在一个电流路径上的晶体管的栅电极和设置在另一电流路径上的晶体管的栅电极连接到对应物的漏电极。根据该结构，可以使输入信号的幅度小于逻辑电路的电源电压。

27. 发明授权

US06724361B1 Shift register and image display device 有权
标题翻译：移位寄存器和图像显示设备
公开(公告)号：US06724361B1
公开(公告)日：2004-04-20
申请号：US09703918
申请日：2000-11-01
申请人： Hajime Washio , Yasushi Kubota , Kazuhiro Maeda , Yasuyoshi Kaise , Michael James Brownlow , Graham Andrew Cairns
发明人： Hajime Washio , Yasushi Kubota , Kazuhiro Maeda , Yasuyoshi Kaise , Michael James Brownlow , Graham Andrew Cairns
IPC分类号： G09G336
CPC分类号： G09G3/3677 , G09G3/3688 , G09G2310/0289
摘要： In a shift register provided with flip-flops that operate in synchronism with a clock signal, and a switching means, which is opened and closed in response to an output of the preceding stage of each of the flip-flops, is installed. The clock signal is selectively inputted by the switching means, and the selected clock signal is inverted and used as a shift register output from each of the stages. An output pulse having the same width as the pulse of the clock signal is generated.
摘要翻译：在设置有与时钟信号同步工作的触发器的移位寄存器中，并且响应于每个触发器的前级的输出而被打开和关闭的开关装置被安装。时钟信号由切换装置选择性地输入，所选择的时钟信号被反相并用作从每个级输出的移位寄存器。产生具有与时钟信号的脉冲相同宽度的输出脉冲。

28. 发明授权

US06485580B1 Composition and process for treating surfaces or light metals and their alloys 失效
标题翻译：用于处理表面或轻金属及其合金的组合物和方法
公开(公告)号：US06485580B1
公开(公告)日：2002-11-26
申请号：US09700733
申请日：2000-11-20
申请人： Kazuya Nakada , Motoki Kawaguchi , Kazuhiro Maeda
发明人： Kazuya Nakada , Motoki Kawaguchi , Kazuhiro Maeda
IPC分类号： C23C2248
CPC分类号： C23C22/57 , C23C22/34 , C23C22/56
摘要： An aqueous bath for treating the surfaces of light metals and light metal alloys that does not contain hexavalent chromium or produce any other highly polluting effluent and that forms a highly corrosion-resistant and highly paint-adherent conversion coating has a pH from 1.0 to 7.0 and contains from 0.01 to 50 g/L of permanganic acid and/or salt(s) thereof and 0.01 to 20 g/L of at least one water soluble compound of titanium or zirconium.
摘要翻译：用于处理不含六价铬的轻金属和轻金属合金的表面的水浴，或产生任何其它高度污染的流出物并且形成高度耐腐蚀和高涂料粘附的转化膜的水浴的pH为1.0至7.0，含有0.01〜50g / L的高锰酸和/或其盐和0.01〜20g / L的至少一种水溶性的钛或锆化合物。

29. 外观设计

USD422552S Front carrier for off-road vehicle 失效
公开(公告)号：USD422552S
公开(公告)日：2000-04-11
申请号：US95696
申请日：1998-10-28
申请人： Hideyoshi Kosuge , Takeshi Usui , Kazuhiro Maeda , Jiro Kitao , Kazumasa Hisada , Teruhito Momoi , Naoki Hashimoto
设计人： Hideyoshi Kosuge , Takeshi Usui , Kazuhiro Maeda , Jiro Kitao , Kazumasa Hisada , Teruhito Momoi , Naoki Hashimoto

30. 发明授权

US5753670A Carboxylic acid compound having condensed ring, salt thereof and pharmaceutical use thereof 失效
标题翻译：具有稠环的羧酸化合物及其盐及其药物用途
公开(公告)号：US5753670A
公开(公告)日：1998-05-19
申请号：US824541
申请日：1997-03-26
申请人： Shinichiro Ono , Tomohiro Yoshida , Atsuyuki Ashimori , Keigo Kosaka , Takehiro Okada , Kazuhiro Maeda , Masahiro Eda , Fumio Mori , Yoshihisa Inoue , Hajime Ebisu , Teruaki Imada , Ruriko Ikegawa , Feng Wang , Norifumi Nakamura
发明人： Shinichiro Ono , Tomohiro Yoshida , Atsuyuki Ashimori , Keigo Kosaka , Takehiro Okada , Kazuhiro Maeda , Masahiro Eda , Fumio Mori , Yoshihisa Inoue , Hajime Ebisu , Teruaki Imada , Ruriko Ikegawa , Feng Wang , Norifumi Nakamura
IPC分类号： C07D209/42 , C07D307/84 , C07D307/85 , C07D333/62 , C07D333/68 , C07D491/04 , C07D491/048 , A61K31/55 , A61K31/44 , C07D471/02 , C07D498/02
CPC分类号： C07D491/04 , C07D209/42 , C07D307/84 , C07D307/85 , C07D333/62 , C07D333/68
摘要： A novel carboxylic acid compound having a condensed ring; which is represented by the formula (I) ##STR1## wherein each symbol is as defined in the specification, a pharmacologically acceptable salt thereof, a pharmaceutical composition thereof and pharmaceutical use thereof. The novel carboxylic acid compound having a condensed ring and pharmacologically acceptable salt thereof of the present invention have superior GPIIb/IIIa antagonism in mammals inclusive of human; can be administered orally; have long life in blood and low toxicity; and show less side-effects. Accordingly, they are extremely useful for the prophylaxis and treatment of thrombotic diseases and other diseases.
摘要翻译：具有稠环的新型羧酸化合物; 其由说明书中的式（I）表示，其药理学可接受的盐，其药物组合物和药物用途。本发明的具有稠环的新型羧酸化合物及其药理学上可接受的盐在包括人的哺乳动物中具有优异的GPIIb / IIIa拮抗作用; 可口服给药; 血液寿命长，毒性低; 并且显示较少的副作用。因此，它们对预防和治疗血栓性疾病等疾病非常有用。

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