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21. 发明授权

US06980824B2 Method and system for optimizing transmission and reception power levels in a communication system 有权
标题翻译：用于优化通信系统中的发射和接收功率电平的方法和系统
公开(公告)号：US06980824B2
公开(公告)日：2005-12-27
申请号：US10249546
申请日：2003-04-17
申请人： Louis L. Hsu , Brian L. Ji , Karl D. Selander , Michael A. Sorna
发明人： Louis L. Hsu , Brian L. Ji , Karl D. Selander , Michael A. Sorna
IPC分类号： H04B7/005 , H04B7/00
CPC分类号： H04W52/20
摘要： A method and system are disclosed herein for determining optimum power level settings for a transmitter and receiver pair of a communication system having a plurality of transmitter and receiver pairs, as determined with respect to bit error rate. In the method disclosed herein, the power levels of a transmitter and a receiver pair coupled to communicate over a duplex communication link are set to initial values. The bit error rate is then determined over the link. Then, the power level of the transmitter, the receiver, or both, is altered, incrementally, and the effect upon the bit error rate is determined. When an improvement appears in the bit error rate at an altered power level, the power level of the transmitter, the receiver or both, are set to the altered power level at which the improvement is found. The steps of incrementally altering power levels, determining the bit error rate, and establishing new power level settings when there is an improvement are repeated until power levels are determined at which the bit error rate is optimized.
摘要翻译：本文公开了一种用于确定具有多个发射机和接收机对的通信系统的发射机和接收机对的最佳功率电平设置的方法和系统，如针对误码率确定的。在本文公开的方法中，耦合到通过双工通信链路进行通信的发射机和接收机对的功率电平被设置为初始值。然后通过链路确定误码率。然后，发送器，接收器或两者的功率电平被改变，递增地，并且确定对误码率的影响。当在改变的功率电平上出现比特错误率的改进时，发射机，接收机或两者的功率电平被设置为发现改进的改变的功率电平。重复改变功率级别，确定误码率和建立新的功率电平设置的步骤，直到确定位误码率被优化的功率电平为止。

22. 发明授权

US06937054B2 Programmable peaking receiver and method 有权
标题翻译：可编程峰值接收机和方法
公开(公告)号：US06937054B2
公开(公告)日：2005-08-30
申请号：US10250043
申请日：2003-05-30
申请人： Louis L. Hsu , Karl D. Selander , Michael A. Sorna , William F. Washburn , Huihao H. Xu , Steven J. Zier
发明人： Louis L. Hsu , Karl D. Selander , Michael A. Sorna , William F. Washburn , Huihao H. Xu , Steven J. Zier
IPC分类号： H04L25/02 , H03K19/003
CPC分类号： H04L25/0272 , H04L25/0278 , H04L25/0294 , H04L25/03885
摘要： Methods and structures are disclosed herein for programmably adjusting a peaking function of a differential signal receiver. The disclosed method includes inputting a pair of differential signals to a pair of input transistors coupled to conduct currents differentially between a pair of load impedances and a pair of tail transistors. The impedance of an adjustable shunt impedance element between the tail transistors of the receiver is varied by programming signal input, such that higher current is conducted over a peaking range of frequencies. In a disclosed structural embodiment, an integrated circuit is provided having a programmable peaking receiver. The programmable peaking receiver includes a pair of input transistors coupled to conduct differentially according to a pair of differential inputs applied to the pair of input transistors. Each of the input transistors produces an output in accordance with the differential input applied thereto. The programmable peaking receiver also includes a pair of tail transistors, coupled to draw current from the input transistors, and a programmably adjustable impedance element coupled between current-conducting nodes of the tail transistors. The impedance of the programmably adjustable impedance element is thereby adjustable in response to programming signal input to adjust a peaking function of the programmable peaking receiver.
摘要翻译：本文公开了可编程地调节差分信号接收器的峰值功能的方法和结构。所公开的方法包括将一对差分信号输入到耦合以在一对负载阻抗和一对尾部晶体管之间差分地传导电流的一对输入晶体管。接收器的尾部晶体管之间的可调节分流阻抗元件的阻抗由编程信号输入变化，使得在峰值范围的频率上进行更高的电流。在公开的结构实施例中，提供了具有可编程峰值接收器的集成电路。可编程峰值接收器包括一对输入晶体管，其被耦合以根据施加到该对输入晶体管的一对差分输入进行差分导通。每个输入晶体管根据施加到其上的差分输入产生输出。可编程峰值接收器还包括耦合以从输入晶体管抽取电流的一对尾部晶体管，以及耦合在尾部晶体管的导电节点之间的可编程可调阻抗元件。可编程可调阻抗元件的阻抗因此可响应于编程信号输入而调节，以调节可编程峰值接收器的峰值功能。

23. 发明授权

US06891357B2 Reference current generation system and method 有权
标题翻译：参考电流发电系统及方法
公开(公告)号：US06891357B2
公开(公告)日：2005-05-10
申请号：US10249545
申请日：2003-04-17
申请人： Hibourahima Camara , Louis Lu-Chen Hsu , Karl D. Selander , Michael A. Sorna
发明人： Hibourahima Camara , Louis Lu-Chen Hsu , Karl D. Selander , Michael A. Sorna
IPC分类号： G05F1/565 , G05F3/16 , G05F1/10
CPC分类号： G05F1/565
摘要： As disclosed herein, systems and methods are provided for generating and distributing a plurality of reference currents on an integrated circuit. In a particular embodiment, an integrated circuit is disclosed which includes a reference current generator adapted to generate a plurality of reference currents. Such circuit includes an operational amplifier coupled to receive, at a first polarity input, a reference voltage, and a first transistor Q1 having a biasing input coupled to an output of the operational amplifier. The first transistor also has an output coupled to a fixed potential through a first resistor R1, and the output of the first transistor Q1 is further coupled as feedback to a second polarity input of the operational amplifier. One or more second transistors Qi are provided in the circuit, each of which has a biasing input coupled to the output of the operational amplifier, and an output coupled to the fixed potential through a respective second resistor Ri. In order to conserve chip area and power, the outputs of the second transistors Qi are not coupled as feedback to the operational amplifier. By the action of the operational amplifier, bias is maintained on the first transistor Q1 and each of the second transistors Qi for each to conduct a reference current Isi.
摘要翻译：如本文所公开的，提供了用于在集成电路上产生和分配多个参考电流的系统和方法。在特定实施例中，公开了一种集成电路，其包括适于产生多个参考电流的参考电流发生器。这种电路包括运算放大器，耦合以在第一极性输入处接收参考电压，以及具有耦合到运算放大器的输出的偏置输入的第一晶体管Q1。第一晶体管还具有通过第一电阻器R 1耦合到固定电位的输出，并且第一晶体管Q1的输出进一步耦合到反馈到运算放大器的第二极性输入端。一个或多个第二晶体管Qi被提供在电路中，每个具有耦合到运算放大器的输出的偏置输入，以及通过相应的第二电阻器R1耦合到固定电位的输出。为了节省芯片面积和功率，第二晶体管Qi的输出不作为反馈耦合到运算放大器。通过运算放大器的作用，第一晶体管Q 1和第二晶体管Q i中的每一个都保持偏置来导通参考电流Isi。

24. 发明授权

US06680681B1 High speed FIR transmitter 有权
标题翻译：高速FIR发射机
公开(公告)号：US06680681B1
公开(公告)日：2004-01-20
申请号：US10249795
申请日：2003-05-08
申请人： Louis L. Hsu , William R. Kelly , Joseph Natonio , Karl D. Selander , Michael A. Sorna
发明人： Louis L. Hsu , William R. Kelly , Joseph Natonio , Karl D. Selander , Michael A. Sorna
IPC分类号： H03M110
CPC分类号： H04L25/0288 , H03M1/661 , H03M1/742
摘要： A transmitter for driving a transmission medium employs pre-distortion to predistort the signals leaving the driver so that they will have an acceptable shape when they reach their destination and have been distorted by imperfections in the transmission medium. The change to pulse height is accomplished by means of a current steering unit that directs a controllable amount of current into the line for each pulse while maintaining the total sum of current that is generated constant in order to reduce noise. Control coefficients for the current steering unit are manipulated in an nxm register that automatically maintains the total number of bits constant while bits are moved from a location that controls a first current driver to a location that controls a second current driver with different properties.
摘要翻译：用于驱动传输介质的发射机使用预失真来预先离开驾驶员的信号，使得当它们到达其目的地并且由于传输介质中的缺陷而变形时，它们将具有可接受的形状。脉冲高度的改变是通过一个电流转向单元实现的，该电流转向单元将可控量的电流引导到每个脉冲的线中，同时保持恒定的电流的总和以减少噪声。用于当前转向单元的控制系数在nxm寄存器中进行操作，该nxm寄存器自动维持总位数恒定，而位从控制第一当前驱动器的位置移动到控制具有不同属性的第二当前驱动器的位置。

25. 发明授权

US5825169A Dynamically biased current gain voltage regulator with low quiescent power consumption 失效
标题翻译：动态偏置电流增益稳压器，静态功耗低
公开(公告)号：US5825169A
公开(公告)日：1998-10-20
申请号：US17719
申请日：1998-02-04
申请人： Karl D. Selander , Michael A. Sorna
发明人： Karl D. Selander , Michael A. Sorna
IPC分类号： G05F3/24 , G05F3/26 , G05F3/16
CPC分类号： G05F3/24 , G05F3/262
摘要： A voltage regulator circuit that minimizes the bias current flowing between a first voltage terminal and a second voltage terminal. The circuit receives input signals via a first and a second input terminal, and provides an output signal via an output terminal. The circuit includes a differential input stage, an output stage, a first sub-circuit for reducing the current flowing through the output stage between the first voltage terminal and the output terminal, and a second sub-circuit for reducing the current flowing through the output stage between the output terminal and the second input terminal. An alternative embodiment combines the power reduction circuitry with additional circuitry decoupling the input and output stages to provide enhanced design flexibility.
摘要翻译：一种电压调节器电路，其使在第一电压端子和第二电压端子之间流动的偏置电流最小化。电路通过第一和第二输入端接收输入信号，并通过输出端提供输出信号。该电路包括差分输入级，输出级，用于减少流过第一电压端和输出端之间的输出级的电流的第一子电路和用于减少流经输出的电流的第二子电路在输出端子和第二输入端子之间。另一实施例将功率降低电路与附加电路组合，使输入和输出级分离，以提供增强的设计灵活性。

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