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21. 发明授权

US09335972B2 True random number generator 有权
标题翻译：真随机数发生器
公开(公告)号：US09335972B2
公开(公告)日：2016-05-10
申请号：US14093040
申请日：2013-11-29
申请人： Kaiyuan Yang , Dennis Michael Sylvester , David Theodore Blaauw , David Alan Fick , Michael B. Henry , Yoonmyung Lee
发明人： Kaiyuan Yang , Dennis Michael Sylvester , David Theodore Blaauw , David Alan Fick , Michael B. Henry , Yoonmyung Lee
IPC分类号： G06F7/58 , H03K3/84 , H03K3/03
CPC分类号： G06F7/588 , H03K3/0315 , H03K3/84
摘要： A true random number generator comprises a ring oscillator which is triggered to start oscillating in a first mode of oscillation at an oscillation start time. The first mode of oscillation will eventually collapse to a second mode of oscillation dependent on thermal noise. A collapse time from the oscillation start time to the time at which the oscillator collapses to the second mode is measured, and this can be used to determine a random number. The TRNG can be synthesized entirely using standard digital techniques and is able to provide high randomness, good throughput and energy efficiency.
摘要翻译：真正的随机数发生器包括环形振荡器，其在振荡开始时刻被触发以在第一振荡模式下开始振荡。第一种振荡模式最终会依赖于热噪声而崩溃到第二种振荡模式。测量从振荡开始时间到振荡器塌陷到第二模式的时间的崩溃时间，并且这可以用于确定随机数。 TRNG可以使用标准数字技术完全合成，能够提供高随机性，良好的吞吐量和能量效率。

22. 发明授权

US09036405B1 Memory sense amplifier with multiple modes of operation 有权
标题翻译：具有多种操作模式的存储读出放大器
公开(公告)号：US09036405B1
公开(公告)日：2015-05-19
申请号：US14092395
申请日：2013-11-27
申请人： Bharan Giridhar , David Theodore Blaauw , Dennis Michael Sylvester
发明人： Bharan Giridhar , David Theodore Blaauw , Dennis Michael Sylvester
IPC分类号： G11C11/419 , G11C7/06
CPC分类号： G11C7/065 , G11C7/06 , G11C7/062 , G11C7/08 , G11C11/419
摘要： Memory circuitry comprising an array of 6T bit cells 6 in which columns of bit cells are coupled together via bit line pairs 8 connected to respective sense amplifier circuitry 10 is provided. The sense amplifier circuitry includes an inverter pair 12, 14 and control circuitry which is configured to control the sense amplifier circuitry to operate in a plurality of modes including an offset compensation mode, an amplification mode and a latching mode.
摘要翻译：存储器电路包括一个6位元单元6的阵列，其中位单元的列通过连接到相应读出放大器电路10的位线对8耦合在一起。读出放大器电路包括反相器对12,14和控制电路，其被配置为控制读出放大器电路以包括偏移补偿模式，放大模式和锁存模式的多种模式操作。

23. 发明授权

US08713232B2 Apparatus and method for transferring a data signal propagated along a bidirectional communication path within a data processing apparatus 有权
标题翻译：用于传送在数据处理装置内沿着双向通信路径传播的数据信号的装置和方法
公开(公告)号：US08713232B2
公开(公告)日：2014-04-29
申请号：US13368385
申请日：2012-02-08
申请人： Sudhir Kumar Satpathy , David Theodore Blaauw , Dennis Michael Sylvester
发明人： Sudhir Kumar Satpathy , David Theodore Blaauw , Dennis Michael Sylvester
IPC分类号： G06K13/00 , H03K17/00
CPC分类号： G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： An apparatus including a first circuit and a second circuit connected in parallel to the bidirectional communication path, and one of the first and second circuits being an active circuit monitoring a value of the data signal on the bidirectional communication path while the other of the first and second circuits being a passive circuit that is not monitoring the value of the data signal. The active circuit initially starts in a low gain state, but on detection of a transition by transition detection circuitry, it enters a high gain state where the switch circuitry disconnects the transition detection circuitry from the bidirectional communication path, and the drive circuitry is activated in order to drive the data signal on the bidirectional communication path to the opposite value. Once the data signal has been driven to the opposite value, the active circuit and the passive circuits switch states.
摘要翻译：一种装置，包括与双向通信路径并联连接的第一电路和第二电路，第一和第二电路中的一个电路是监视双向通信路径上的数据信号的值的有源电路，而第一和第二电路中的另一个第二电路是不监视数据信号的值的无源电路。有源电路最初以低增益状态开始，但是在通过转换检测电路检测到转换时，它进入高增益状态，其中开关电路将转换检测电路与双向通信路径断开，驱动电路在以将双向通信路径上的数据信号驱动为相反的值。一旦数据信号被驱动到相反的值，有源电路和无源电路就会切换状态。

24. 发明授权

US08526261B2 Integrated circuit memory power supply 有权
标题翻译：集成电路内存电源
公开(公告)号：US08526261B2
公开(公告)日：2013-09-03
申请号：US12379821
申请日：2009-03-02
申请人： Gregory Kengho Chen , Dennis Michael Sylvester , David Theodore Blaauw
发明人： Gregory Kengho Chen , Dennis Michael Sylvester , David Theodore Blaauw
IPC分类号： G11C5/14
CPC分类号： G11C5/147 , G11C8/08 , G11C11/41 , G11C11/417 , G11C29/02 , G11C29/021 , G11C29/028 , G11C2029/1202 , G11C2029/1204
摘要： An integrated circuit memory 2 is provided with an array of memory cells 4 and power supply circuitry 10, 12. Detected operating errors in malfunctioning memory cells 14 are identified using a built-in-self-test controller 34. The power supply circuitry 10, 12 is then configured to alter the voltage supply to the malfunctioning memory cells 14 in an attempt to correct their operation. The voltage supply of the row containing the malfunctioning memory cell and the column containing the malfunctioning memory cell may both be altered. The voltage alteration may be an increase or a decrease in voltage supply depending upon the nature of the malfunction detected.
摘要翻译：集成电路存储器2设置有存储器单元4和电源电路10,12的阵列。使用内置自测试控制器34来识别故障存储器单元14中检测到的操作错误。电源电路10， 12被配置为改变对故障存储器单元14的电压供应，以试图校正其操作。包含故障存储单元的行和包含故障存储单元的列的电压可以都被改变。根据检测到的故障的性质，电压变化可能是电压供应的增加或减少。

25. 发明申请

US20130205056A1 APPARATUS AND METHOD FOR TRANSFERRING A DATA SIGNAL PROPAGATED ALONG A BIDIRECTIONAL COMMUNICATION PATH WITHIN A DATA PROCESSING APPARATUS 有权
标题翻译：用于传输数据处理设备中双向通信路径传播的数据信号的装置和方法
公开(公告)号：US20130205056A1
公开(公告)日：2013-08-08
申请号：US13368385
申请日：2012-02-08
申请人： Sudhir Kumar SATPATHY , David Theodore Blaauw , Dennis Michael Sylvester
发明人： Sudhir Kumar SATPATHY , David Theodore Blaauw , Dennis Michael Sylvester
IPC分类号： G06F13/00
CPC分类号： G06F13/4072 , Y02D10/14 , Y02D10/151
摘要： An apparatus including a first circuit and a second circuit connected in parallel to the bidirectional communication path, and one of the first and second circuits being an active circuit monitoring a value of the data signal on the bidirectional communication path whilst the other of the first and second circuits being a passive circuit that is not monitoring the value of the data signal. The active circuit initially starts in a low gain state, but on detection of a transition by transition detection circuitry, it enters a high gain state where the switch circuitry disconnects the transition detection circuitry from the bidirectional communication path, and the drive circuitry is activated in order to drive the data signal on the bidirectional communication path to the opposite value. Once the data signal has been driven to the opposite value, the active circuit and the passive circuits switch states.
摘要翻译：一种装置，包括与双向通信路径并联连接的第一电路和第二电路，第一和第二电路中的一个电路是监视双向通信路径上的数据信号的值的有源电路，而第一和第二电路的第一和第二电路第二电路是不监视数据信号的值的无源电路。有源电路最初以低增益状态开始，但是在通过转换检测电路检测到转换时，它进入高增益状态，其中开关电路将转换检测电路与双向通信路径断开，驱动电路在以将双向通信路径上的数据信号驱动为相反的值。一旦数据信号被驱动到相反的值，有源电路和无源电路就会切换状态。

26. 发明授权

US08407025B2 Operating parameter control of an apparatus for processing data 有权
标题翻译：用于处理数据的设备的操作参数控制
公开(公告)号：US08407025B2
公开(公告)日：2013-03-26
申请号：US12379617
申请日：2009-02-25
申请人： David Theodore Blaauw , Dennis Michael Sylvester , David Alan Fick , Stuart David Biles , Michael John Wieckowski , Scott McLean Hanson , Gregory Kengho Chen
发明人： David Theodore Blaauw , Dennis Michael Sylvester , David Alan Fick , Stuart David Biles , Michael John Wieckowski , Scott McLean Hanson , Gregory Kengho Chen
IPC分类号： G06F17/18 , G06F17/50 , G01R31/30
CPC分类号： G05B21/02 , G06F1/3203 , G06F1/324 , G06F1/3296 , Y02D10/126 , Y02D10/172
摘要： An apparatus for processing data 2 is provided with a time-to-digital converter 18 which serves to measure signal processing delay through one or more signal paths through a processing stage. This measured delay generates a delay value representing a plurality of instances of the signal processing delay which have been measured. Analysis is performed under software control to estimate a worst case signal processing delay through the processing stage based upon the delay values which have been generated. An adjustment of the operating parameters, such as supply voltage and clock frequency, of the apparatus is made to provide a timing margin through the processing stage sufficient to satisfy the worst case signal processing delay which has been estimated without an excessive margin.
摘要翻译：一种用于处理数据2的装置设置有时间 - 数字转换器18，其用于通过一个或多个通过处理级的信号路径来测量信号处理延迟。该测量的延迟产生表示已经测量的信号处理延迟的多个实例的延迟值。在软件控制下执行分析以基于已经产生的延迟值来估计通过处理阶段的最差情况信号处理延迟。进行装置的工作参数（例如电源电压和时钟频率）的调整，以通过处理阶段提供足够的时间余量，以满足在没有过多余量的情况下估计的最差情况信号处理延迟。

27. 发明授权

US08108585B2 Crossbar circuitry and method of operation of such crossbar circuitry 有权
标题翻译：交叉开关电路和这种交叉电路的操作方法
公开(公告)号：US08108585B2
公开(公告)日：2012-01-31
申请号：US12379191
申请日：2009-02-13
申请人： Sudhir Kumar Satpathy , David Theodore Blaauw , Trevor Nigel Mudge , Dennis Michael Sylvester , Ronald George Dreslinski, Jr.
发明人： Sudhir Kumar Satpathy , David Theodore Blaauw , Trevor Nigel Mudge , Dennis Michael Sylvester , Ronald George Dreslinski, Jr.
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： Crossbar circuitry, and a method of operation of such crossbar circuitry, are provided. The crossbar circuitry has an array of data input paths and data output paths where the data output paths are transverse to the data input paths. At each intersection between a data input path and a data output path, a crossbar cell is provided that comprises a storage circuit programmable to store a routing value, and a transmission circuit. In a transmission mode of operation the transmission circuit is responsive to the routing value indicating that the data input path should be coupled to the data output path to detect the data input along the data input path, and to output an indication of that data on the data output path at the associated intersection. Control circuitry is used to issue control signals to the crossbar cells, and during a configuration mode of operation the control circuitry re-utilizes at least one of the data output paths to program the storage circuitry of one or more of the crossbar cells. Such a construction of crossbar circuitry provides a very regular design, with uniform delay across all paths, and which requires significantly less control lines than typical prior art crossbar designs. Such crossbar circuitry is readily scalable to form large crossbars.
摘要翻译：交叉开关电路以及这种交叉电路的操作方法。交叉开关电路具有数据输入路径和数据输出路径的阵列，其中数据输出路径横向于数据输入路径。在数据输入路径和数据输出路径之间的每个交叉点处，提供包括可编程以存储路由值的存储电路的交叉开关单元和发送电路。在传输操作模式中，传输电路响应于路由值，该路由值指示数据输入路径应该被耦合到数据输出路径以检测沿着数据输入路径的数据输入，并且输出该数据的指示相关联的交叉路口的数据输出路径。控制电路用于向交叉开关单元发出控制信号，并且在配置操作模式期间，控制电路重新利用至少一个数据输出路径来编程一个或多个交叉开关单元的存储电路。交叉电路电路的这种结构提供非常规则的设计，在所有路径上具有均匀的延迟，并且其需要比典型的现有技术的横杆设计明显更少的控制线。这种交叉开关电路容易缩放以形成大的横杆。

28. 发明申请

US20100211719A1 Crossbar circuitry and method of operation of such crossbar circuitry 有权
标题翻译：交叉开关电路和这种交叉电路的操作方法
公开(公告)号：US20100211719A1
公开(公告)日：2010-08-19
申请号：US12379191
申请日：2009-02-13
申请人： Sudhir Kumar SATPATHY , David Theodore BLAAUW , Trevor Nigel MUDGE , Dennis Michael SYLVESTER , Ronald George DRESLINKSKI, JR.
发明人： Sudhir Kumar SATPATHY , David Theodore BLAAUW , Trevor Nigel MUDGE , Dennis Michael SYLVESTER , Ronald George DRESLINKSKI, JR.
IPC分类号： G06F13/00
CPC分类号： G06F13/4022
摘要： Crossbar circuitry, and a method of operation of such crossbar circuitry, are provided. The crossbar circuitry has an array of data input paths and data output paths where the data output paths are transverse to the data input paths. At each intersection between a data input path and a data output path, a crossbar cell is provided that comprises a storage circuit programmable to store a routing value, and a transmission circuit. In a transmission mode of operation the transmission circuit is responsive to the routing value indicating that the data input path should be coupled to the data output path to detect the data input along the data input path, and to output an indication of that data on the data output path at the associated intersection. Control circuitry is used to issue control signals to the crossbar cells, and during a configuration mode of operation the control circuitry re-utilises at least one of the data output paths to program the storage circuitry of one or more of the crossbar cells. Such a construction of crossbar circuitry provides a very regular design, with uniform delay across all paths, and which requires significantly less control lines than typical prior art crossbar designs. Such crossbar circuitry is readily scalable to form large crossbars.
摘要翻译：交叉开关电路以及这种交叉电路的操作方法。交叉开关电路具有数据输入路径和数据输出路径的阵列，其中数据输出路径横向于数据输入路径。在数据输入路径和数据输出路径之间的每个交叉点处，提供包括可编程以存储路由值的存储电路的交叉开关单元和发送电路。在传输操作模式中，传输电路响应于路由值，该路由值指示数据输入路径应该被耦合到数据输出路径以检测沿着数据输入路径的数据输入，并且输出该数据的指示相关联的交叉路口的数据输出路径。控制电路用于向交叉开关单元发出控制信号，并且在配置操作模式期间，控制电路重新利用至少一个数据输出路径来编程一个或多个交叉开关单元的存储电路。交叉电路电路的这种结构提供非常规则的设计，在所有路径上具有均匀的延迟，并且其需要比典型的现有技术的横杆设计明显更少的控制线。这种交叉开关电路容易缩放以形成大的横杆。

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