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21. 发明授权

US07682991B2 Method of manufacturing silicon carbide semiconductor device 有权
标题翻译：制造碳化硅半导体器件的方法
公开(公告)号：US07682991B2
公开(公告)日：2010-03-23
申请号：US11960405
申请日：2007-12-19
申请人： Yasuyuki Kawada , Takeshi Tawara , Tae Tawara
发明人： Yasuyuki Kawada , Takeshi Tawara , Tae Tawara
IPC分类号： H01L21/336 , H01L29/78 , H01L29/12
CPC分类号： H01L29/7813 , H01L21/0475 , H01L21/049 , H01L21/3247 , H01L29/0623 , H01L29/1608 , H01L29/66068
摘要： A method of manufacturing a silicon carbide semiconductor device includes forming a trench for a MOS gate in an SiC substrate by dry etching. Thereafter, the substrate with the trench is heat treated. The heat treatment includes heating the substrate in an Ar gas atmosphere or in a mixed gas atmosphere containing SiH4 and Ar at a temperature between 1600° C. and 1800° C., and thereafter in a hydrogen gas atmosphere at a temperature between 1400° C. and 1500° C. The present manufacturing method smoothens the trench inner surface and rounds the corners in the trench to prevent the electric field from localizing thereto.
摘要翻译：制造碳化硅半导体器件的方法包括通过干蚀刻在SiC衬底中形成用于MOS栅极的沟槽。此后，对具有沟槽的衬底进行热处理。热处理包括在Ar气氛中或在含有SiH 4和Ar的混合气体气氛中在1600℃和1800℃之间的温度下加热基底，然后在氢气气氛中在1400℃ 并且1500℃。本制造方法使沟槽内表面平滑并使沟槽中的角落圆弧，以防止电场对其进行定位。

22. 发明申请

US20100067152A1 ABNORMAL CURRENT PREVENTIVE CIRCUIT OF DC-DC CONVERTER 有权
标题翻译： DC-DC转换器的异常电流预防电路
公开(公告)号：US20100067152A1
公开(公告)日：2010-03-18
申请号：US12538640
申请日：2009-08-10
申请人： Yasunori Nakahashi , Masayuki Yamadaya , Satoshi Yamane
发明人： Yasunori Nakahashi , Masayuki Yamadaya , Satoshi Yamane
IPC分类号： H02H7/00 , H03K5/153
CPC分类号： H02M1/32 , H02M3/1588 , Y02B70/1466
摘要： The voltage of a detection resistor connected to the drain of a low-side switching device is normally a negative voltage, but a positive voltage appears when a countercurrent occurs in an abnormal state. A current comparator monitors the voltage of the detection resistor, transmits high output to an AND circuit whole the voltage of the detection resistor is a negative voltage to maintain the output voltage of the current comparator in a low state when an output signal of a driver can be transmitted to the low-side switching device, and allows the output voltage of the current comparator in a low state when the voltage of the detection resistor becomes a positive voltage, thereby forcibly turning off the low-side switching device.
摘要翻译：连接到低侧开关装置的漏极的检测电阻的电压通常为负电压，但是在异常状态下发生逆流时，会出现正电压。电流比较器监视检测电阻的电压，将高输出全部传输到AND电路，检测电阻的电压为负电压，以便当驱动器的输出信号可以使电流比较器的输出电压保持在低电平状态时传输到低侧开关器件，并且当检测电阻器的电压变为正电压时，允许电流比较器的输出电压处于低状态，从而强制关断低侧开关器件。

23. 发明申请

US20100040772A1 Method of manufacturing a magnetic recording medium 有权
标题翻译：制造磁记录介质的方法
公开(公告)号：US20100040772A1
公开(公告)日：2010-02-18
申请号：US12461516
申请日：2009-08-13
申请人： Yoshihito Osawa
发明人： Yoshihito Osawa
IPC分类号： B05D5/12
CPC分类号： G11B5/8408
摘要： A method of manufacturing a magnetic recording medium that includes a nonmagnetic underlayer, a magnetic layer, a protective layer, and a lubricant layer sequentially laminated on a nonmagnetic substrate. The method includes applying a lubricant onto the protective layer to form the lubricant layer, which includes ejecting shots of a heated lubricant liquid onto the protective layer from a nozzle. The heated lubricant liquid contains a perfluoropolyether lubricant, and each shot is of a quantity in a range of 0.1 to 10 pico liters.
摘要翻译：一种制造磁记录介质的方法，该磁记录介质包括顺序层压在非磁性基底上的非磁性底层，磁性层，保护层和润滑剂层。该方法包括在保护层上涂抹润滑剂以形成润滑剂层，其包括从喷嘴将加热的润滑剂液体喷射到保护层上。加热的润滑剂液体含有全氟聚醚润滑剂，每次喷射的量为0.1-10微升。

24. 发明申请

US20100038675A1 POWER SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME 失效
标题翻译：功率半导体器件及其制造方法
公开(公告)号：US20100038675A1
公开(公告)日：2010-02-18
申请号：US12539295
申请日：2009-08-11
申请人： Koh Yoshikawa
发明人： Koh Yoshikawa
IPC分类号： H01L29/739 , H01L21/04 , H01L29/868 , H01L29/78
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/0878 , H01L29/66348 , H01L29/66712 , H01L29/7397 , H01L29/868
摘要： A power semiconductor device that realizes high-speed turnoff and soft switching at the same time has an n-type main semiconductor layer that includes lightly doped n-type semiconductor layers and extremely lightly doped n-type semiconductor layers arranged alternately and repeatedly between a p-type channel layer and an n+-type field stop layer, in a direction parallel to the first major surface of the n-type main semiconductor layer. A substrate used for manufacturing the semiconductor device is fabricated by forming trenches in an n-type main semiconductor layer 1 and performing ion implantation and subsequent heat treatment to form an n+-type field stop layer in the bottom of the trenches. The trenches are then filled with a semiconductor doped more lightly than the n-type main semiconductor layer for forming extremely lightly doped n-type semiconductor layers. The manufacturing method is applicable with variations to various power semiconductor devices such as IGBT's, MOSFET's and PIN diodes.
摘要翻译：同时实现高速关断和软开关的功率半导体器件具有n型主半导体层，其包括轻掺杂的n型半导体层和在p处交替重复布置的极轻掺杂的n型半导体层型沟道层和n +型场阻挡层，在平行于n型主半导体层的第一主表面的方向上。用于制造半导体器件的衬底通过在n型主半导体层1中形成沟槽并进行离子注入和随后的热处理在沟槽的底部形成n +型场阻挡层来制造。然后用比用于形成非常轻掺杂的n型半导体层的n型主半导体层更轻掺杂的半导体填充沟槽。该制造方法适用于诸如IGBT，MOSFET和PIN二极管的各种功率半导体器件的变化。

25. 发明申请

US20100029070A1 METHOD FOR PRODUCING SEMICONDUCTOR DEVICE 有权
标题翻译：生产半导体器件的方法
公开(公告)号：US20100029070A1
公开(公告)日：2010-02-04
申请号：US12534502
申请日：2009-08-03
申请人： Kazuya Yamaguchi
发明人： Kazuya Yamaguchi
IPC分类号： H01L21/20 , H01L21/306
CPC分类号： H01L29/7802 , H01L29/0634 , H01L29/1095 , H01L29/66333 , H01L29/66712 , H01L29/7395
摘要： A method for producing a device includes embedding trenches with an epitaxial layer having high crystallinity while a mask oxide film remains unremoved. An n-type semiconductor is formed on the surface of a silicon substrate, and a mask oxide film and a mask nitride film are formed on the surface of the n-type semiconductor. The mask laminated film is opened by photolithography and etching, and trenches are formed in the silicon substrate. The width of the remaining mask laminated film is narrowed, whereby portions of the n-type semiconductor close to the opening ends of the trenches are exposed. The trenches are embedded with a p-type semiconductor, whereby the surface of the mask laminated film is prevented from being covered with the p-type semiconductor. The p-type semiconductor is grown from the second exposed portions of the n-type semiconductor. V-shaped grooves are prevented from forming on the surface of the p-type semiconductor.
摘要翻译：制造器件的方法包括：在具有高结晶度的外延层的情况下嵌入沟槽，同时掩模氧化膜保持不被去除。在硅衬底的表面上形成n型半导体，并且在n型半导体的表面上形成掩模氧化膜和掩模氮化物膜。通过光刻和蚀刻打开掩模层压膜，并在硅衬底中形成沟槽。剩下的掩模层叠膜的宽度变窄，从而暴露出靠近沟槽的开口端的n型半导体的部分。沟槽嵌入有p型半导体，由此防止了掩模层叠膜的表面被p型半导体覆盖。 p型半导体从n型半导体的第二露出部分生长。防止在p型半导体的表面上形成V形槽。

26. 发明授权

US07652861B2 Overcurrent detecting circuit and reference voltage generating circuit 有权
标题翻译：过电流检测电路和参考电压发生电路
公开(公告)号：US07652861B2
公开(公告)日：2010-01-26
申请号：US11516581
申请日：2006-09-07
申请人： Kouhei Yamada
发明人： Kouhei Yamada
IPC分类号： H02H3/00
CPC分类号： G05F1/573
摘要： An overcurrent detecting circuit and reference voltage circuit may reduce the current consumed by an electronic circuit. The circuit may includes a reference load through which a reference current flows, generating a reference voltage. A differential amplifier section is included to amplify the difference in the potentials of two inputs. At least part of a bias current supplied by a constant current source to the differential amplifier section flows to the reference load. A detection voltage, corresponding to a current subject to overcurrent detection, is inputted to one of the two inputs of the differential amplifier section.
摘要翻译：过电流检测电路和参考电压电路可以减少电子电路消耗的电流。电路可以包括参考电流流过的参考负载，产生参考电压。包含差分放大器部分来放大两个输入端的电位差。由恒定电流源向差分放大器部分提供的偏置电流的至少一部分流向参考负载。对应于过电流检测的电流的检测电压被输入到差分放大器部分的两个输入端之一。

27. 发明申请

US20090323376A1 SEMICONDUCTOR DEVICE, INTEGRATED CIRCUIT INCLUDING THE SEMICONDUCTOR DEVICE, CONTROL IC FOR SWITCHING POWER SUPPLY AND THE SWITCHING POWER SUPPLY 有权
标题翻译：半导体器件，包含半导体器件的集成电路，用于切换电源的控制IC和开关电源
公开(公告)号：US20090323376A1
公开(公告)日：2009-12-31
申请号：US12535334
申请日：2009-08-04
申请人： Masaru SAITO
发明人： Masaru SAITO
IPC分类号： H02M1/36 , H01L27/06
CPC分类号： H01L29/405 , H01L29/42368 , H01L29/7835 , H01L29/808 , H02M3/33523
摘要： A semiconductor device incorporates a resistor on a structure that uses diffusion layers for sustaining the breakdown voltage thereof to realizes a very resistive element that exhibits a high breakdown voltage and high electrical resistance, includes a spiral very resistive element buried in an interlayer insulator film. A first end of the very resistive element is connected to a drain electrode wiring and the second end of the very resistive element is grounded. An intermediate point of the very resistive element is connected to ae voltage comparator of a control IC. The semiconductor device according to the invention facilitates reducing the components parts costs, assembly costs and size of a switching power supply that includes a very resistive element.
摘要翻译：半导体器件在使用扩散层以维持其击穿电压的结构上并入电阻器以实现表现出高击穿电压和高电阻的非常大的电阻元件，包括埋在层间绝缘膜中的螺旋非常强的元件。非常电阻元件的第一端连接到漏电极布线，并且非常电阻元件的第二端接地。电阻元件的中间点与控制IC的电压比较器连接。根据本发明的半导体器件有助于减少包括非常电阻元件的开关电源的组件部件成本，组装成本和尺寸。

28. 发明申请

US20090303765A1 Switching power source system 有权
标题翻译：开关电源系统
公开(公告)号：US20090303765A1
公开(公告)日：2009-12-10
申请号：US12457344
申请日：2009-06-08
申请人： Hideo Shimizu , Isao Amano
发明人： Hideo Shimizu , Isao Amano
IPC分类号： H02M7/04
CPC分类号： H02M1/4225 , H02M1/44 , Y02B70/126
摘要： An error voltage Verr, being a difference between DC output voltage Vout and output reference voltage Vref, and an input voltage Vin are multiplied to produce first threshold voltage signal Vth1 in phase with and similar to input voltage Vin and proportional to Verr. Second threshold voltage signal Vth2 is produced from first threshold voltage signal Vth1. The input current is detected as a current detection signal Vi across a resistor 12, whether it is between the threshold value signals is detected by a current range detecting circuit, and accordingly, the timing of turning on or off switching device is controlled so that at least one of an duration on and an off duration of the switching device is limited to enhance a power factor. Unfixed off duration disperses a noise spectrum to prevent an increase in switching frequency, to reduce noise.
摘要翻译：将作为直流输出电压Vout和输出基准电压Vref之间的差的误差电压Verr和输入电压Vin相乘，以与输入电压Vin相同且相似于Verr成比例地产生第一阈值电压信号Vth1。从第一阈值电压信号Vth1产生第二阈值电压信号Vth2。输入电流被检测为跨过电阻器12的电流检测信号Vi，无论其是否在电流范围检测电路之间检测到阈值信号之间，因此控制开启或关闭开关装置的定时，使得在切换装置的持续时间和持续时间中的至少一个被限制以提高功率因数。未固定的关闭持续时间分散噪声频谱以防止开关频率的增加，以减少噪声。

29. 发明申请

US20090283776A1 WIDE BAND GAP SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME 有权
标题翻译：宽带隙半导体器件及其制造方法
公开(公告)号：US20090283776A1
公开(公告)日：2009-11-19
申请号：US12426169
申请日：2009-04-17
申请人： Noriyuki Iwamuro
发明人： Noriyuki Iwamuro
IPC分类号： H01L29/20 , H01L29/24 , H01L21/28
CPC分类号： H01L29/7827 , H01L29/0623 , H01L29/0653 , H01L29/0657 , H01L29/0661 , H01L29/0696 , H01L29/1608 , H01L29/2003 , H01L29/401 , H01L29/41766 , H01L29/45 , H01L29/452 , H01L29/47 , H01L29/475 , H01L29/66068 , H01L29/66734 , H01L29/7806 , H01L29/7811 , H01L29/7813 , H01L29/7839
摘要： A wide band gap semiconductor device is disclosed. A first trench in a gate electrode part and a second trench in a source electrode part (Schottky diode part) are disposed so that the first and second trenches are close to each other while and the second trench is deeper than the first trench. A metal electrode is formed in the second trench to form a Schottky junction on a surface of an n-type drift layer in the bottom of the second trench. Further, a p+-type region is provided in part of the built-in Schottky diode part being in contact with the surface of the n-type drift layer, preferably in the bottom of the second trench. The result is a wide band gap semiconductor device which is small in size and low in on-resistance and loss, and in which electric field concentration applied on a gate insulating film is relaxed to suppress lowering of withstand voltage to thereby increase avalanche breakdown tolerance at turning-off time.
摘要翻译：公开了一种宽带隙半导体器件。栅电极部分中的第一沟槽和源电极部分（肖特基二极管部分）中的第二沟槽被设置为使得第一沟槽和第二沟槽彼此靠近而第二沟槽比第一沟槽更深。金属电极形成在第二沟槽中，以在第二沟槽的底部的n型漂移层的表面上形成肖特基结。此外，在内置肖特基二极管部分的一部分中，优选在第二沟槽的底部与n型漂移层的表面接触，提供p +型区域。结果是尺寸小，导通电阻和损耗低的宽带隙半导体器件，并且其中施加在栅极绝缘膜上的电场浓度被放宽以抑制耐受电压的降低，从而增加雪崩击穿耐受性关闭时间。

30. 发明授权

US07615984B2 DC-DC converter and method of controlling thereof 失效
标题翻译： DC-DC转换器及其控制方法
公开(公告)号：US07615984B2
公开(公告)日：2009-11-10
申请号：US11470325
申请日：2006-09-06
申请人： Kesanobu Kuwabara
发明人： Kesanobu Kuwabara
IPC分类号： G05F1/00 , H02M3/335
CPC分类号： H02M3/335 , H02M2001/0032 , Y02B70/16
摘要： A DC-DC converter can prevent intermittent failure of a PWM or driving signal (VM) when a load becomes light and prevent generation of unusual noise from a transformer. The converter includes a transformer (2) having a primary winding (2a) and a secondary winding (2b), a semiconductor switching element (17) connected to the primary winding (2a), and a control unit controlling turning-ON and OFF periods of the switching element (17) so that an output voltage (VO) matches a reference value (VREF). By controlling the turning ON and OFF operation of the switching element (17), a DC voltage exactly equal to the reference value (VREF) can be supplied to a load (5). The control unit includes an output voltage detecting and adjusting circuit (6) that outputs a command value (VC) adjusted for the output voltage (VO) and the reference value (VREF), a triangular wave generating unit (7), and a comparator (15) that compares the command value (VC) and the triangular wave (VT) to generate the PWM signal (VM) for driving the switching element (17) according to the result of the comparison. The triangular wave generating unit (7) varies the inclination of the triangular wave (VT) in response to increase and decrease of the command value (VC).
摘要翻译： DC-DC转换器可以防止当负载变亮时PWM或驱动信号（VM）的间歇性故障，并防止变压器产生异常噪声。转换器包括具有初级绕组（2a）和次级绕组（2b）的变压器（2），连接到初级绕组（2a）的半导体开关元件（17），以及控制单元控制导通和关断周期的开关元件（17），使得输出电压（VO）与参考值（VREF）匹配。通过控制开关元件（17）的接通和断开操作，能够将与基准值（VREF）完全相同的直流电压提供给负载（5）。控制单元包括输出电压检测和调整电路（6），其输出针对输出电压（VO）和参考值（VREF）调整的指令值（VC），三角波产生单元（7）和比较器（15），其根据比较结果比较指令值（VC）和三角波（VT）以产生用于驱动开关元件（17）的PWM信号（VM）。三角波产生单元（7）响应于指令值（VC）的增加和减小而改变三角波（VT）的倾斜度。

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