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11. 发明授权

US08750036B2 Unipolar spin-transfer switching memory unit 失效
标题翻译：单极自旋转移开关存储单元
公开(公告)号：US08750036B2
公开(公告)日：2014-06-10
申请号：US14017392
申请日：2013-09-04
申请人： Seagate Technology LLC
发明人： Xiaohua Lou , Haiwen Xi
IPC分类号： G11C11/14
CPC分类号： G11C11/161 , G11C11/1659 , G11C11/1675 , G11C11/1693 , Y10S977/933 , Y10S977/935
摘要： A memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a word line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a unipolar voltage across the magnetic tunnel junction data cell. A diode is electrically coupled between the magnetic tunnel junction data cell and the word line or bit line. A voltage source provides the unipolar voltage across the magnetic tunnel junction data cell that writes the high resistance state and the low resistance state.
摘要翻译：存储单元包括电耦合到位线和字线的磁性隧道结数据单元。磁隧道结数据单元被配置为通过使单极电压跨过磁隧道结数据单元而在高电阻状态和低电阻状态之间切换。二极管电耦合在磁性隧道结数据单元和字线或位线之间。电压源提供写入高电阻状态和低电阻状态的磁性隧道结数据单元两端的单极电压。

12. 发明申请

US20140021567A1 MAGNENTIC RESISTANCE MEMORY APPARATUS HAVING MULTI LEVELS AND METHOD OF DRIVING THE SAME 有权
公开(公告)号：US20140021567A1
公开(公告)日：2014-01-23
申请号：US14035517
申请日：2013-09-24
申请人： SK hynix Inc.
发明人： Won Joon CHOI
IPC分类号： H01L43/02
CPC分类号： H01L43/02 , G11C11/16 , G11C11/1675 , G11C11/5607 , H01L43/08 , Y10S977/935
摘要： A magnetic resistance memory apparatus capable of implementing various levels and a method of driving the same are provided. The magnetic resistance memory apparatus includes a first magnetic device that includes a fixed layer having a fixed magnetization direction, a tunnel layer disposed on the fixed layer, and a first free layer disposed on the tunnel layer having a variable magnetization direction, and a second magnetic device disposed on the first magnetic device including a plurality of free layers insulated with a spacer layer interposed.

13. 发明授权

US08630112B2 Multilevel magnetic element 有权
标题翻译：多级磁性元件
公开(公告)号：US08630112B2
公开(公告)日：2014-01-14
申请号：US13281507
申请日：2011-10-26
申请人： Bertrand Cambou
发明人： Bertrand Cambou
IPC分类号： G11C11/00
CPC分类号： G11C11/1675 , G11C11/16 , G11C11/5607 , Y10S977/933 , Y10S977/935
摘要： The present disclosure concerns a multilevel magnetic element comprising a first tunnel barrier layer between a soft ferromagnetic layer having a magnetization that can be freely aligned and a first hard ferromagnetic layer having a magnetization that is fixed at a first high temperature threshold and freely alignable at a first low temperature threshold. The magnetic element further comprises a second tunnel barrier layer and a second hard ferromagnetic layer having a magnetization that is fixed at a second high temperature threshold and freely alignable at a first low temperature threshold; the soft ferromagnetic layer being comprised between the first and second tunnel barrier layers. The magnetic element disclosed herein allows for writing four distinct levels using only a single current line.
摘要翻译：本公开涉及一种多电平磁性元件，其包括在具有可自由对准的磁化的软铁磁层之间的第一隧道势垒层和具有固定在第一高温阈值的磁化的第一硬铁磁层，并且可在第一低温阈值。磁性元件还包括第二隧道势垒层和具有固定在第二高温阈值并且可在第一低温阈值自由对准的磁化的第二硬铁磁层; 软铁磁层包括在第一和第二隧道势垒层之间。这里公开的磁性元件允许仅使用单个电流线来写入四个不同的电平。

14. 发明授权

US08559215B2 Perpendicular magnetic random access memory (MRAM) device with a stable reference cell 有权
标题翻译：具有稳定参考单元的垂直磁随机存取存储器（MRAM）器件
公开(公告)号：US08559215B2
公开(公告)日：2013-10-15
申请号：US13360524
申请日：2012-01-27
申请人： Yuchen Zhou , Yiming Huai
发明人： Yuchen Zhou , Yiming Huai
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/161 , G11C11/5607 , Y10S977/933 , Y10S977/935
摘要： A magnetic random access memory (MRAM) element is configured to store a state when electric current flows and includes a first magnetic tunnel junction (MTJ) for storing a data bit and a second MTJ for storing a reference bit. The direction of magnetization of the FL is determinative of the data bit stored in the at least one MTJ. Further, the MTJ includes a magnetic reference layer (RL) having a magnetization with a direction that is perpendicular to the film plane, and a magnetic pinned layer (PL) having a magnetization with a direction that is perpendicular to the film plane. The direction of magnetization of the RL and the PL are anti-parallel relative to each other in the first MTJ. The direction of magnetization of the FL, the RL and the PL are parallel relative to each other in the second MTJ.
摘要翻译：磁性随机存取存储器（MRAM）元件被配置为存储电流流动时的状态，并且包括用于存储数据位的第一磁性隧道结（MTJ）和用于存储参考位的第二MTJ。 FL的磁化方向决定了存储在至少一个MTJ中的数据位。此外，MTJ包括具有与膜平面垂直的方向的磁化的磁性参考层（RL）和具有与膜平面垂直的方向具有磁化的磁性固定层（PL）。在第一MTJ中，RL和PL的磁化方向相对于彼此是反平行的。在第二MTJ中，FL，RL和PL的磁化方向相对于彼此平行。

15. 发明授权

US08531876B2 Unipolar spin-transfer switching memory unit 有权
标题翻译：单极自旋转移开关存储单元
公开(公告)号：US08531876B2
公开(公告)日：2013-09-10
申请号：US13527839
申请日：2012-06-20
申请人： Xiaohua Lou , Haiwen Xi
发明人： Xiaohua Lou , Haiwen Xi
IPC分类号： G11C11/14
CPC分类号： G11C11/161 , G11C11/1659 , G11C11/1675 , G11C11/1693 , Y10S977/933 , Y10S977/935
摘要： A memory unit includes a magnetic tunnel junction data cell electrically coupled to a bit line and a word line. The magnetic tunnel junction data cell is configured to switch between a high resistance state and a low resistance state by passing a unipolar voltage across the magnetic tunnel junction data cell. A diode is electrically coupled between the magnetic tunnel junction data cell and the word line or bit line. A voltage source provides the unipolar voltage across the magnetic tunnel junction data cell that writes the high resistance state and the low resistance state.
摘要翻译：存储单元包括电耦合到位线和字线的磁性隧道结数据单元。磁隧道结数据单元被配置为通过使单极电压跨过磁隧道结数据单元而在高电阻状态和低电阻状态之间切换。二极管电耦合在磁性隧道结数据单元和字线或位线之间。电压源提供写入高电阻状态和低电阻状态的磁性隧道结数据单元两端的单极电压。

16. 发明申请

US20130194863A1 INITIALIZATION METHOD OF A PERPENDICULAR MAGNETIC RANDOM ACCESS MEMORY (MRAM) DEVICE 有权
公开(公告)号：US20130194863A1
公开(公告)日：2013-08-01
申请号：US13546169
申请日：2012-07-11
申请人： Yuchen Zhou , Yiming Huai
发明人： Yuchen Zhou , Yiming Huai
IPC分类号： G11C11/16
CPC分类号： G11C11/16 , G11C11/161 , G11C11/5607 , G11C2013/0083 , Y10S977/933 , Y10S977/935
摘要： Methods using a sequence of externally generated magnetic fields to initialize the magnetization directions of each of the layers in perpendicular MTJ MRAM elements for data and reference bits when the required magnetization directions are anti-parallel are described. The coercivity of the fixed pinned and reference layers can be made unequal so that one of them can be switched by a magnetic field that will reliably leave the other one unswitched. Embodiments of the invention utilize the different effective coercivity fields of the pinned, reference and free layers to selectively switch the magnetization directions using a sequence of magnetic fields of decreasing strength. Optionally the chip or wafer can be heated to reduce the required field magnitude. It is possible that the first magnetic field in the sequence can be applied during an annealing step in the MRAM manufacture process.

17. 发明授权

US08446757B2 Spin-torque transfer magneto-resistive memory architecture 有权
标题翻译：自旋扭矩传递磁阻存储器架构
公开(公告)号：US08446757B2
公开(公告)日：2013-05-21
申请号：US12858879
申请日：2010-08-18
申请人： John K. DeBrosse , Yutaka Nakamura
发明人： John K. DeBrosse , Yutaka Nakamura
IPC分类号： G11C11/00
CPC分类号： G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , Y10S977/935
摘要： A memory array device comprising a first memory cell comprising a first magnetic tunnel junction device having a first terminal connected to a first bit line (BLTE) and a second terminal, and a first field effect transistor (FET) having a source terminal connected to a second bit line (BLC), a gate terminal connected to a word line (WL), and a drain terminal connected to the second terminal of the first magnetic tunnel junction device, and a second memory cell comprising, a second magnetic tunnel junction device having a first terminal connected to a third bit line (BLT0) and a second terminal, and a second field effect transistor (FET) having a source terminal connected to the second bit line (BLC), a gate terminal connected to the word line (WL), and a drain terminal connected to the second terminal of the second magnetic tunnel junction device.
摘要翻译：一种存储器阵列器件，包括第一存储器单元，该第一存储器单元包括具有连接到第一位线（BLTE）的第一端子和第二端子的第一磁性隧道结器件，以及具有与源极端子连接的第一场效应晶体管第二位线（BLC），连接到字线（WL）的栅极端子和连接到第一磁性隧道结装置的第二端子的漏极端子，以及第二存储单元，其包括：第二磁性隧道结装置，连接到第三位线（BLT0）和第二端子的第一端子和具有连接到第二位线（BLC）的源极端子的第二场效应晶体管（FET），连接到字线（WL）的栅极端子）和连接到第二磁性隧道结装置的第二端子的漏极端子。

18. 发明申请

US20130099339A1 Spintronic Electronic Device and Circuits 有权
标题翻译： Spintronic电子设备和电路
公开(公告)号：US20130099339A1
公开(公告)日：2013-04-25
申请号：US13278020
申请日：2011-10-20
申请人： Thomas J. Meitzler , Elena N. Bankowski , Michael Nranian , Ilya N. Krivorotov , Andrei N. Slavin , Vasyl S. Tyberkevych
发明人： Thomas J. Meitzler , Elena N. Bankowski , Michael Nranian , Ilya N. Krivorotov , Andrei N. Slavin , Vasyl S. Tyberkevych
IPC分类号： H01L29/82
CPC分类号： G01R33/098 , G01R33/09 , H01F10/3254 , H01F10/3268 , H01F10/329 , H01L43/08 , Y10S977/933 , Y10S977/934 , Y10S977/935 , Y10T428/24942 , Y10T428/24975
摘要： A spintronic electronic apparatus having a multilayer structure. The apparatus includes a substrate, having disposed in succession upon the substrate; a bottom interface layer; a pinned layer; a tunneling barrier; a free layer; and a top interface layer, wherein the apparatus operates as a non-resonant magnetic tunnel junction in a large amplitude, out-of-plane magnetization precession regime having weakly current dependent, large diode volt-watt sensitivity when external microwave signals that exceed a predetermined threshold current and have a frequency that is lower than a predetermined level excite the magnetization precession.
摘要翻译：具有多层结构的自旋电子设备。该装置包括一个基片，它已经连接在基片上; 底部界面层; 钉扎层; 隧道屏障; 自由层和顶部界面层，其中当超过预定的外部微波信号时，该装置以大幅度的面外磁化进动方式作为非谐振磁性隧道结工作，具有弱电流依赖的大二极管伏特灵敏度并且具有低于预定电平的频率激励磁化进动。

19. 发明申请

US20130077396A1 MAGNETIC MEMORY ELEMENT AND MAGNETIC MEMORY APPARATUS 有权
标题翻译：磁记忆元件和磁记忆装置
公开(公告)号：US20130077396A1
公开(公告)日：2013-03-28
申请号：US13526961
申请日：2012-06-19
申请人： Tsuyoshi Kondo , Hirofumi Morise , Shiho Nakamura , Junichi Akiyama
发明人： Tsuyoshi Kondo , Hirofumi Morise , Shiho Nakamura , Junichi Akiyama
IPC分类号： G11C11/15
CPC分类号： G11C11/1673 , G11C11/161 , Y10S977/933 , Y10S977/935
摘要： A magnetic memory element includes a first magnetic layer, a second magnetic layer, a first intermediate layer, a first magnetic wire, a first input unit, and a first detection unit. The first magnetic layer has magnetization fixed. The second magnetic layer has magnetization which is variable. The first intermediate layer is between the first magnetic layer and the second magnetic layer. The first magnetic wire extends in a first direction perpendicular to a direction connecting from the first magnetic layer to the second magnetic layer and is adjacent to the second magnetic layer. In addition, write-in is performed by propagating a first spin wave through the first magnetic wire and by passing a first current from the first magnetic layer toward the second magnetic layer. Read-out is performed by passing a second current from the first magnetic layer toward the second magnetic layer.
摘要翻译：磁存储元件包括第一磁性层，第二磁性层，第一中间层，第一磁性线，第一输入单元和第一检测单元。第一磁性层具有固定的磁化。第二磁性层具有可变的磁化。第一中间层位于第一磁性层和第二磁性层之间。第一磁性线沿垂直于从第一磁性层连接到第二磁性层的方向的第一方向延伸并与第二磁性层相邻。另外，通过将第一自旋波传播通过第一磁线并且通过使第一电流从第一磁性层向第二磁性层传递来执行写入。通过将第二电流从第一磁性层传递到第二磁性层来执行读出。

20. 发明申请

US20120294071A1 Spin-Torque Transfer Magneto-Resistive Memory Architecture 失效
标题翻译：自旋转移磁阻存储器架构
公开(公告)号：US20120294071A1
公开(公告)日：2012-11-22
申请号：US13559672
申请日：2012-07-27
申请人： John K. DeBrosse , Yutaka Nakamura
发明人： John K. DeBrosse , Yutaka Nakamura
IPC分类号： G11C11/16
CPC分类号： G11C11/16 , G11C11/1655 , G11C11/1659 , G11C11/1673 , G11C11/1675 , G11C11/1693 , Y10S977/935
摘要： A system includes a processor and a memory array connected to the processor comprising a first memory cell comprising a first magnetic tunnel junction device having a first terminal connected to a first bit line and a second terminal, and a first field effect transistor having a source terminal connected to a second bit line, a gate terminal connected to a word line, and a drain terminal connected to the second terminal of the first magnetic tunnel junction device, and a second memory cell comprising a second magnetic tunnel junction device having a first terminal connected to a third bit line and a second terminal, and a second field effect transistor having a source terminal connected to the second bit line, a gate terminal connected to the word line, and a drain terminal connected to the second terminal of the second magnetic tunnel junction device.
摘要翻译：一种系统包括处理器和连接到处理器的存储器阵列，该存储器阵列包括第一存储器单元，该第一存储器单元包括具有连接到第一位线的第一端子和第二端子的第一磁性隧道结器件，以及具有源极端子的第一场效应晶体管连接到第二位线，连接到字线的栅极端子和连接到第一磁性隧道结装置的第二端子的漏极端子，以及包括第二磁性隧道结装置的第二存储单元，第二磁性隧道结装置具有第一端子连接至第三位线和第二端子，以及第二场效应晶体管，其源极端子连接到第二位线，连接到字线的栅极端子和连接到第二磁通道的第二端子的漏极端子连接装置。

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