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11. 发明申请

US20170195002A1 PHASE ROTATOR FOR COMPENSATING TRANSCEIVER IMPAIRMENTS 审中-公开
公开(公告)号：US20170195002A1
公开(公告)日：2017-07-06
申请号：US15466418
申请日：2017-03-22
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Charles Kasimer Sestok, IV , Hunsoo Choo , Nikolaus Klemmer , Xiaoxi Zhang
IPC分类号： H04B1/403 , H04L7/033
CPC分类号： H04B1/406 , H04B1/1027 , H04B1/403 , H04L7/0331
摘要： A phase rotator corrects the IQ imbalance in a wireless transceiver. The phase rotator is a part of a compensation system that detects and separates reception impairment images from transmission impairment images. The disclosed phase rotator introduces a phase shift between the transmission channel and the reception channel without perturbing the phase mismatch and the gain mismatch in the reception path. The phase rotator includes a first local oscillation (LO) circuit that generates a first LO signal at a first carrier frequency and a second LO circuit that generates a second LO signal at a second carrier frequency that deviates from the first carrier frequency for a phase rotation period. The phase rotation period is sufficiently long such that the frequency deviation can introduce a prescribed phase shift between the first LO signal and the second LO signal.

12. 发明授权

US09692428B2 Self-calibrating shared-component dual synthesizer 有权
公开(公告)号：US09692428B2
公开(公告)日：2017-06-27
申请号：US14137366
申请日：2013-12-20
申请人： Texas Instruments Incorporated , Texas Instruments Deutschland GmbH
发明人： Sudipto Chakraborty , Jens Graul
IPC分类号： H03L7/08 , H03L7/18 , H03L7/099 , H03L7/089 , H03L7/23 , H03L7/10 , H04B1/403 , H04B1/408 , H04B1/50
CPC分类号： H03L7/0802 , H03L7/0891 , H03L7/099 , H03L7/104 , H03L7/18 , H03L7/235 , H04B1/403 , H04B1/408 , H04B1/50
摘要： A self-calibrating shared-component dual synthesizer includes, for example, two frequency synthesizers that are adapted to operate (respectively) in transmit (TX) and receive (RX) modes. Each synthesizer can be selectively arranged to vary and optimize the phase noise in accordance with the TX and RX requirements associated with each mode as well as independently optimized for flexible low area floorplan to achieve low power, spectral fidelity and reduced test time, low cost built in self-calibration. The two frequency synthesizers are also adapted to provide a built-in self-test signals used for intermodulation testing and calibration.

13. 发明申请

US20170171791A1 RECONFIGURABLE MULTI-MODE AND MULTI-BANDS RADIO ARCHITECTURE AND TRANSCEIVER 有权
公开(公告)号：US20170171791A1
公开(公告)日：2017-06-15
申请号：US14967652
申请日：2015-12-14
申请人： HUAWEI TECHNOLOGIES CO., LTD.
发明人： Lin LI , Jaber MOGHADDASI , Kuangda WANG , Ke WU
IPC分类号： H04W36/30 , H04B1/403 , H04W24/08 , H04L5/14 , H04B1/04 , H04B1/30
CPC分类号： H04W36/30 , H04B1/04 , H04B1/30 , H04B1/403 , H04B2001/307 , H04L5/14 , H04W24/08 , H04W88/06
摘要： A transceiver with a spectrum sensing unit configured to detect, within a plurality of millimeter wave bands, one or more channels with tolerably low interference for selection. The transceiver has a transmitter configured to modulate a transmit signal to an output transmit signal using a transmit carrier frequency compatible with a transmit channel selected from the one or more channels, and using a transmit duplexing operating mode compatible with a transmit millimeter wave of the plurality of millimeter wave bands that correspond to the transmit channel. The transceiver has a receiver configured to demodulate a receive signal from an input receive signal using a receive carrier frequency compatible with a receive channel selected from the one or more channels, and using a receive duplexing operating mode compatible with a receive millimeter wave of the plurality of millimeter wave bands that correspond to the receive channel. The transceiver has a duplexer configured to route the output transmit signal from the transmitter based on the transmit duplexing operating mode and the transmit millimeter wave band, and the input receive signal to the receiver based on the receive duplexing operating mode and the receive millimeter wave band.

14. 发明申请

US20170141780A1 WIRELESS RADIO-FREQUENCY TRANSMISSION APPARATUS 有权
公开(公告)号：US20170141780A1
公开(公告)日：2017-05-18
申请号：US15321991
申请日：2014-06-26
申请人： INSTITUTE OF SEMICONDUCTORS, CHINESE ACADEMY OF SCIENCES
发明人： Jingjing CHEN , Nanjian WU , Haiyong WANG , Weiyang LIU , Peng FENG
IPC分类号： H03L7/089 , H04L7/033 , H04B1/04 , H03L7/099
CPC分类号： H03L7/0891 , H03L7/099 , H03L7/193 , H04B1/04 , H04B1/403 , H04L7/033 , H04L27/12 , H04L27/152
摘要： The present disclosure discloses a wireless radio-frequency transmission apparatus, comprising: a phase frequency detector, a charge pump, a loop filter and a twin voltage-controlled oscillator, wherein the twin voltage-controlled oscillator comprises a first voltage-controlled oscillator and a second voltage-controlled oscillator which are of the same structure, wherein when the twin voltage-controlled oscillator is in a reception mode, the first voltage-controlled oscillator and the second voltage-controlled oscillator are coupled to each other to form a quadrature voltage-controlled oscillator, and the quadrature voltage-controlled oscillator, the phase frequency detector, the charge pump and the loop filter constitute a phase-locked loop to generate quadrature carriers for receiving information; and when the twin voltage-controlled oscillator is in a transmission mode, the first voltage-controlled oscillator, the phase frequency detector, the charge pump and the loop filter constitute a phase-locked loop, and the second voltage-controlled oscillator is used for performing frequency modulation on transmitted data. The present disclosure can maintain a carrier frequency to be stable during high data rate transmission, and have a relatively short locking time of frequency hopping.

15. 发明授权

US09584067B2 Circuits and methods for increasing output frequency of an LC oscillator 有权
标题翻译：增加LC振荡器输出频率的电路和方法
公开(公告)号：US09584067B2
公开(公告)日：2017-02-28
申请号：US14717895
申请日：2015-05-20
申请人： Skyworks Solutions, Inc.
发明人： Georgi Milev Taskov
IPC分类号： H04B1/06 , H04B7/00 , H04M1/00 , H03B5/12 , H04B1/18 , H04B1/403 , B23K31/02 , H03H7/01
CPC分类号： H03B5/1215 , B23K31/02 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2224/05554 , H01L2224/45144 , H01L2224/48091 , H01L2224/48106 , H01L2224/4813 , H01L2224/48227 , H01L2224/49175 , H01L2224/49176 , H01L2924/1205 , H01L2924/1206 , H01L2924/14211 , H03B5/1212 , H03B5/1228 , H03B2200/0026 , H03B2200/0036 , H03H7/0115 , H04B1/0458 , H04B1/18 , H04B1/403 , H04W88/02 , Y10T29/4902 , H01L2924/00014 , H01L2924/00
摘要： Disclosed are circuits and methods for increasing an output frequency of an inductance-capacitance (LC) oscillator. In some embodiments, the LC oscillator can be implemented as a voltage-controlled oscillator (VCO) having differential outputs. When the VCO is implemented on a die, wirebond connections from the outputs to a ground results in an effective inductance that impacts a maximum frequency associated with the VCO. An electrical connection such as a wirebond between the differential outputs yields a reduction in the effective inductance thereby increasing the maximum frequency. In some embodiments, the wirebond between the differential outputs can be configured so that its contribution to mutual inductance is reduced or substantially nil.
摘要翻译：公开了用于增加电感 - 电容（LC）振荡器的输出频率的电路和方法。在一些实施例中，LC振荡器可以被实现为具有差分输出的压控振荡器（VCO）。当VCO在芯片上实现时，从输出到地的引线连接导致影响与VCO相关的最大频率的有效电感。在差分输出之间的诸如引线键的电连接导致有效电感的减小，从而增加最大频率。在一些实施例中，差分输出之间的引线键可被配置为使得其对互感的贡献减小或基本上为零。

16. 发明授权

US09130737B1 Signal-generating circuit and wireless communication device 有权
标题翻译：信号发生电路和无线通信装置
公开(公告)号：US09130737B1
公开(公告)日：2015-09-08
申请号：US14610271
申请日：2015-01-30
申请人： Panasonic Corporation
发明人： Koji Takinami , Takayuki Tsukizawa , Kenji Miyanaga , Shunsuke Hirano
IPC分类号： H03D3/24 , H04L7/033 , H04B1/405 , H04B1/00 , H03L7/18 , H03L7/193 , H03L7/16
CPC分类号： H03L7/16 , H03L7/18 , H03L7/193 , H04B1/403 , H04B1/408
摘要： A signal-generating circuit includes a voltage-controlled oscillator that generates an oscillated signal; a first frequency divider that generates a first divided signal by dividing the oscillated signal; a second frequency divider that generates a second divided signal by dividing the divided signal; a phase comparator that receives as input the second divided signal and a reference signal and outputs two signals corresponding to a phase difference therebetween; a loop filter that extracts a low frequency signal between the two signals to be output to the voltage-controlled oscillator; a third frequency divider that generates a third divided signal by dividing the first divided signal; a first frequency converter that generates a first frequency converted signal by multiplying the oscillated signal by the third divided signal; and a first multiplier that generates a multiplied signal by multiplying the first frequency converted signal by a first multiplication number.
摘要翻译：信号发生电路包括产生振荡信号的压控振荡器; 第一分频器，通过分频振荡信号产生第一分频信号; 第二分频器，通过划分分频信号产生第二分频信号; 相位比较器，接收第二分频信号和参考信号作为输入，并输出对应于它们之间的相位差的两个信号; 环路滤波器，提取要输出到压控振荡器的两个信号之间的低频信号; 第三分频器，通过划分第一分频信号产生第三分频信号; 第一频率转换器，其通过将所述振荡信号乘以所述第三分频信号来产生第一频率转换信号; 以及第一乘法器，通过将第一频率转换信号乘以第一乘法数来产生相乘的信号。

17. 发明申请

US20150180594A1 SELF-CALIBRATING SHARED-COMPONENT DUAL SYNTHESIZER 有权
标题翻译：自我校准共享组件双合成器
公开(公告)号：US20150180594A1
公开(公告)日：2015-06-25
申请号：US14137366
申请日：2013-12-20
申请人： Texas Instruments Deutschland GmbH , Texas Instruments Incorporated
发明人： Sudipto Chakraborty , Jens Graul
IPC分类号： H04B17/14 , H04B17/24 , H04B17/21 , H03L7/099 , H03L7/08
CPC分类号： H03L7/0802 , H03L7/0891 , H03L7/099 , H03L7/104 , H03L7/18 , H03L7/235 , H04B1/403 , H04B1/408 , H04B1/50
摘要： A self-calibrating shared-component dual synthesizer includes, for example, two frequency synthesizers that are adapted to operate (respectively) in transmit (TX) and receive (RX) modes. Each synthesizer can be selectively arranged to vary and optimize the phase noise in accordance with the TX and RX requirements associated with each mode as well as independently optimized for flexible low area floorplan to achieve low power, spectral fidelity and reduced test time, low cost built in self-calibration. The two frequency synthesizers are also adapted to provide a built-in self-test signals used for intermodulation testing and calibration.
摘要翻译：自校准共享部件双合成器包括例如适于在发射（TX）和接收（RX）模式中分别操作的两个频率合成器。每个合成器可以选择性地布置成根据与每个模式相关联的TX和RX要求来改变和优化相位噪声，并且针对灵活的低面积平面图进行独立优化，以实现低功率，频谱保真度和缩短的测试时间，低成本内置进行自校准。两个频率合成器也适用于提供用于互调测试和校准的内置自测信号。

18. 发明授权

US08938204B2 Signal generator circuit and radio transmission and reception device including the same 有权
标题翻译：信号发生器电路和包括其的无线电发射和接收装置
公开(公告)号：US08938204B2
公开(公告)日：2015-01-20
申请号：US13733620
申请日：2013-01-03
申请人： Fujitsu Limited
发明人： Kazuaki Oishi
IPC分类号： H04B1/40 , H04B1/06 , H03B21/01 , H03B21/02 , H04B1/00
CPC分类号： H04B1/403 , H03B21/01 , H03B21/02 , H04B1/0082
摘要： The disclosed signal generator circuit has a four-phase signal generator circuit generating four-phase signals with a first frequency; an eight-phase signal generator circuit performing ½ frequency division of the four-phase signals to generate eight-phase signals with a second frequency; a first to a fourth harmonic rejection mixer circuits multiplying a first four-phase signal and a second four-phase signal of the four-phase signals by a first to a third eight-phase signals and a third to a fifth eight-phase signals of the eight-phase signals with mutually different combinations; a subtractor subtracting between outputs of the first and the fourth harmonic rejection mixer circuits to generate a first output signal with a third frequency; and an adder adding between outputs of the second and the third harmonic rejection mixer circuits to generate a second output signal with a third frequency whose phase is different from the first output signal by π/2.
摘要翻译：所公开的信号发生器电路具有产生具有第一频率的四相信号的四相信号发生器电路; 执行四相信号的1/2分频以产生具有第二频率的八相信号的八相信号发生器电路; 第一至第四谐波抑制混频器电路将四相信号的第一四相信号和第二四相信号乘以第一至第三八相信号和第三至第五八相八位信号具有相互不同组合的八相信号; 减法器，在第一和第四谐波抑制混频器电路的输出之间减去以产生具有第三频率的第一输出信号; 以及加法器，其在第二和第三谐波抑制混频器电路的输出之间相加，以产生具有第三频率的第二输出信号，该第三频率的相位与第一输出信号不同于＆pgr / / 2。

19. 发明授权

US08774789B2 Enhanced discontinuous mode operation with shared radio frequency resources 失效
标题翻译：增强的不连续模式操作，共享射频资源
公开(公告)号：US08774789B2
公开(公告)日：2014-07-08
申请号：US14080300
申请日：2013-11-14
申请人： Broadcom Corporation
发明人： Jin-Sheng Su , Jacobus C. Alberts , Rami Mehlo , Vivek Ramaprasad
IPC分类号： H04M3/00
CPC分类号： H04W24/02 , H04B1/0067 , H04B1/403 , H04B15/04 , H04W48/18 , H04W52/0216 , H04W68/12 , H04W76/28 , H04W88/06 , Y02D70/1222 , Y02D70/1242 , Y02D70/1262 , Y02D70/144 , Y02D70/168 , Y02D70/24 , Y02D70/25 , Y02D70/40
摘要： A scheduling technique is described for discontinuous transmission and reception. The scheduling technique may be implemented in a mobile communication device with multiple SIMs. The scheduling technique facilitates enhanced communication capability for the mobile communication device. In one implementation, the scheduling technique helps avoid substantial overlap between discontinuous receive cycles of the SIMs, for example by renegotiating a discontinuous transmit/receive offset if too much overlap exists. The renegotiation process may be incorporated into a future industry standard communication protocol (e.g., 3GPP release 11 or later), or may be implemented as an extension to an existing communication protocol.
摘要翻译：描述了用于不连续发送和接收的调度技术。调度技术可以在具有多个SIM的移动通信设备中实现。调度技术有助于增强移动通信设备的通信能力。在一个实现中，调度技术有助于避免SIM的不连续接收周期之间的实质重叠，例如通过重新协商不连续的发送/接收偏移，如果存在太多的重叠。重新协商过程可以被合并到未来的工业标准通信协议（例如，3GPP版本11或更高版本）中，或者可以被实现为对现有通信协议的扩展。

20. 发明授权

US08768284B2 Radio frequency integrated circuit with noise immunity border 有权
标题翻译：射频集成电路具有抗噪声边界
公开(公告)号：US08768284B2
公开(公告)日：2014-07-01
申请号：US11481465
申请日：2006-07-06
申请人： Shahla Khorram
发明人： Shahla Khorram
IPC分类号： H04B1/28 , H04B1/00 , H05K1/14 , H01L25/00
CPC分类号： H04B1/0028 , H04B1/0032 , H04B1/1027 , H04B1/403 , H04B15/04 , H04B2215/064
摘要： An integrated circuit includes an analog module, digital circuitry, and a border section. The analog module is susceptible to noise and is on a substrate of the integrated circuit. The digital circuitry generates the noise and is on the substrate. The border section is on the substrate and physically separates the analog module from the digital circuitry.
摘要翻译：集成电路包括模拟模块，数字电路和边界部分。模拟模块易受噪声影响，并在集成电路的基板上。数字电路产生噪声，并在基板上。边界部分在基板上，并将模拟模块与数字电路物理分离。

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