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    • 17. 发明申请
    • RESISTIVE MEMORY
    • 电阻记忆
    • US20160351256A1
    • 2016-12-01
    • US14563375
    • 2014-12-08
    • University of Massachusetts
    • Qiangfei Xia
    • G11C13/00H01L27/24H01L45/00
    • H01L27/2463G11C13/0002G11C13/0014G11C13/0023G11C13/0069G11C2213/33G11C2213/52G11C2213/77H01L27/2409H01L45/1233H01L45/1273H01L45/145H01L45/1675
    • A memory device includes one or more first semiconductor ridges formed on a first semiconductor wafer. The first semiconductor ridges are configured to be first electrodes. The memory device also includes one or more second semiconductor ridges formed on a second semiconductor wafer. The second semiconductor ridges are configured to be second electrodes and are placed orthogonally on top of the first semiconductor ridges forming a crossbar structure, with sharp edges of the first semiconductor ridges coupled to sharp edges of the second semiconductor ridges. Each area of coupling of a first semiconductor ridge and a second semiconductor ridge is configured to be a memory cell. In addition, the memory device includes a compound layer covering the sharp edges of at least one of the first semiconductor ridges or the second semiconductor ridges. The compound layer is configured to be a switching layer.
    • 存储器件包括形成在第一半导体晶片上的一个或多个第一半导体脊。 第一半导体脊被配置为第一电极。 存储器件还包括形成在第二半导体晶片上的一个或多个第二半导体脊。 第二半导体脊被配置为第二电极,并且正交地放置在形成横梁结构的第一半导体脊的顶部上,其中第一半导体脊的尖锐边缘耦合到第二半导体脊的尖锐边缘。 第一半导体脊和第二半导体脊的耦合的每个区域被配置为存储单元。 此外,存储器件包括覆盖第一半导体脊或第二半导体脊中的至少一个的尖锐边缘的复合层。 复合层被配置为开关层。