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11. 发明授权

US09898274B2 Replacing an accelerator firmware image without operating system reboot 有权
公开(公告)号：US09898274B2
公开(公告)日：2018-02-20
申请号：US14987074
申请日：2016-01-04
申请人： International Business Machines Corporation
发明人： Andre L. Albot , Vishal C. Aslot , Thomas V. Burks, III , John D. Dietel
IPC分类号： G06F9/44 , G06F9/445 , G06F13/16 , G06F13/24 , G06F12/109 , G06F12/10 , G06F13/42
CPC分类号： G06F8/65 , G06F8/654 , G06F12/10 , G06F12/109 , G06F13/1668 , G06F13/24 , G06F13/4282 , G06F2212/657 , G06F2213/2424
摘要： The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.

12. 发明授权

US09710254B2 Replacing an accelerator firmware image without operating system reboot 有权
公开(公告)号：US09710254B2
公开(公告)日：2017-07-18
申请号：US14925768
申请日：2015-10-28
申请人： International Business Machines Corporation
发明人： Andre L. Albot , Vishal C. Aslot , Thomas V. Burks, III , John D. Dietel
IPC分类号： G06F9/44 , G06F9/445 , G06F13/16 , G06F13/24
CPC分类号： G06F8/65 , G06F8/654 , G06F12/10 , G06F12/109 , G06F13/1668 , G06F13/24 , G06F13/4282 , G06F2212/657 , G06F2213/2424
摘要： The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.

13. 发明申请

US20170161054A1 REPLACING AN ACCELERATOR FIRMWARE IMAGE WITHOUT OPERATING SYSTEM REBOOT 有权
公开(公告)号：US20170161054A1
公开(公告)日：2017-06-08
申请号：US15403465
申请日：2017-01-11
申请人： International Business Machines Corporation
发明人： Andre L. ALBOT , Vishal C. ASLOT , Thomas V. BURKS, III , John D. DIETEL
IPC分类号： G06F9/445 , G06F12/10 , G06F13/24
CPC分类号： G06F8/65 , G06F8/654 , G06F12/10 , G06F12/109 , G06F13/1668 , G06F13/24 , G06F13/4282 , G06F2212/657 , G06F2213/2424
摘要： The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.

14. 发明授权

US09201623B2 Control device and image forming apparatus with two controllers 有权
标题翻译：具有两个控制器的控制装置和图像形成装置
公开(公告)号：US09201623B2
公开(公告)日：2015-12-01
申请号：US14486479
申请日：2014-09-15
申请人： FUJI XEROX CO., LTD.
发明人： Kinichi Yoshida , Yasuaki Mitobe , Shigekazu Yamagishi
IPC分类号： G06K15/00 , G06F3/12 , H04N1/32 , G06F13/24 , G06F13/28 , G06F13/42
CPC分类号： G06F3/1296 , G06F13/24 , G06F13/287 , G06F13/4282 , G06F2213/2424 , G06F2213/2802 , G06K15/40 , H04N1/32587 , H04N1/32593 , H04N1/32598 , H04N2201/0082
摘要： A control device includes an apparatus controller that is connected to at least one apparatus and includes a first memory which stores data for controlling the driving of the apparatus and data indicating a state of the apparatus and a reading and transmitting unit which reads each data item stored in the first memory and transmits the read data, a main controller that includes a central processing unit, a second memory, and a writing unit which writes the data transmitted from the apparatus controller to the second memory, and a full-duplex serial bus that connects the main controller and the apparatus controller. The reading and transmitting unit and the writing unit operate such that each data item stored in the first memory is read, transmitted, and stored in the second memory in a cycle equal to or less than a count cycle of a system timer.
摘要翻译：控制装置包括连接到至少一个装置的装置控制器，并且包括存储用于控制装置的驱动的数据的第一存储器和指示装置的状态的数据以及读取和发送单元，其读取存储的每个数据项在第一存储器中并发送读取的数据，主控制器包括中央处理单元，第二存储器和将从设备控制器发送的数据写入第二存储器的写入单元，以及全双工串行总线，连接主控制器和设备控制器。读取和发送单元和写入单元的操作使得存储在第一存储器中的每个数据项以等于或小于系统定时器的计数周期的周期被读取，发送和存储在第二存储器中。

15. 发明申请

US20150113193A1 Interrupt Distribution Scheme 审中-公开
标题翻译：中断分配方案
公开(公告)号：US20150113193A1
公开(公告)日：2015-04-23
申请号：US14590203
申请日：2015-01-06
申请人： Apple Inc.
发明人： Josh P. de Cesare , Ruchi Wadhawan , Erik P. Machnicki , Mark D. Hayter
IPC分类号： G06F13/24
CPC分类号： G06F13/24 , G06F2213/2424 , Y02D10/14
摘要： In one embodiment, an interrupt controller may implement an interrupt distribution scheme for distributing interrupts among multiple processors. The scheme may take into account various processor state in determining which processor should receive a given interrupt. For example, the processor state may include whether or not the processor is in a sleep state, whether or not interrupts are enabled, whether or not the processor has responded to previous interrupts, etc. The interrupt controller may implement timeout mechanisms to detect that an interrupt is being delayed (e.g. after being offered to a processor). The interrupt may be re-evaluated at the expiration of a timeout, and potentially offered to another processor. The interrupt controller may be configured to automatically, and atomically, mask an interrupt in response to delivering an interrupt vector for the interrupt to a responding processor.
摘要翻译：在一个实施例中，中断控制器可以实现用于在多个处理器之间分配中断的中断分配方案。该方案可以考虑在确定哪个处理器应该接收给定中断时的各种处理器状态。例如，处理器状态可以包括处理器是否处于休眠状态，中断是否被使能，处理器是否响应先前的中断等。中断控制器可以实现超时机制以检测到中断被延迟（例如，在提供给处理器之后）。中断可能会在超时到期时重新评估，并可能提供给另一个处理器。中断控制器可以被配置为自动并原子地屏蔽中断，以响应于将中断的中断向量传递给响应处理器。

16. 发明授权

US08984201B2 Providing I2C bus over Ethernet 有权
标题翻译：通过以太网提供I2C总线
公开(公告)号：US08984201B2
公开(公告)日：2015-03-17
申请号：US13487072
申请日：2012-06-01
申请人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
发明人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： G06F13/24
CPC分类号： G06F13/4282 , G06F13/24 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F21/85 , G06F2213/2424 , H04L12/4633 , H04L12/4641 , H04L45/44 , H04L49/351 , H04L63/08 , H04L63/162
摘要： In one embodiment, a system includes a local processor, a peripheral component interconnect express (PCIe) switch electrically coupled to the local processor, one or more local I2C bus devices, a dedicated processor electrically coupled to the one or more local I2C bus devices and the PCIe switch, and a local network switch electrically coupled to the dedicated processor and the PCIe switch, wherein the dedicated processor is adapted for routing interrupts from the one or more local I2C bus devices to the local processor, and wherein the local processor is adapted for handling the interrupts from the one or more local I2C bus devices. Other distributed fabric protocol (DFP) systems, computer program products, and methods are presented according to additional embodiments.
摘要翻译：在一个实施例中，系统包括本地处理器，电耦合到本地处理器的外围组件互连快速（PCIe）开关，一个或多个本地I2C总线设备，电耦合到一个或多个本地I2C总线设备的专用处理器，以及 PCIe交换机和电耦合到专用处理器和PCIe交换机的本地网络交换机，其中专用处理器适于将中断从一个或多个本地I2C总线设备路由到本地处理器，并且其中本地处理器被适配用于处理来自一个或多个本地I2C总线设备的中断。根据另外的实施例呈现了其他分布式结构协议（DFP）系统，计算机程序产品和方法。

17. 发明申请

US20180349306A1 TECHNIQUES FOR HANDLING INTERRUPTS IN A PROCESSING UNIT USING INTERRUPT REQUEST QUEUES 审中-公开
公开(公告)号：US20180349306A1
公开(公告)日：2018-12-06
申请号：US15826138
申请日：2017-11-29
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION
发明人： FLORIAN A. AUERNHAMMER , DANIEL WIND
IPC分类号： G06F13/24 , G06F12/122
CPC分类号： G06F13/24 , G06F9/4812 , G06F9/542 , G06F12/122 , G06F2212/69 , G06F2212/70 , G06F2213/2424
摘要： A technique for handling interrupts in a data processing system includes receiving, at an interrupt presentation controller (IPC), an event notification message (ENM) that specifies an event target number and a number of bits to ignore. In response to a slot being available in an interrupt request queue, the IPC enqueues the ENM in the slot. In response to the ENM being dequeued from the interrupt request queue, the IPC determines a group of virtual processor threads that may be potentially interrupted based on the event target number and the number of bits to ignore specified in the ENM. The event target number identifies a specific virtual processor thread and the number of bits to ignore identifies the number of lower-order bits to ignore with respect to the specific virtual processor thread when determining a group of virtual processor threads that may be potentially interrupted.

18. 发明申请

US20180107472A1 REPLACING AN ACCELERATOR FIRMWARE IMAGE WITHOUT OPERATING SYSTEM REBOOT 审中-公开
公开(公告)号：US20180107472A1
公开(公告)日：2018-04-19
申请号：US15846132
申请日：2017-12-18
申请人： International Business Machines Corporation
发明人： Andre L. ALBOT , Vishal C. ASLOT , Thomas V. BURKS, III , John D. DIETEL
IPC分类号： G06F13/24 , G06F13/16 , G06F12/10 , G06F13/42
CPC分类号： G06F8/65 , G06F8/654 , G06F12/10 , G06F12/109 , G06F13/1668 , G06F13/24 , G06F13/4282 , G06F2212/657 , G06F2213/2424
摘要： The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.

19. 发明申请

US20170123780A1 REPLACING AN ACCELERATOR FIRMWARE IMAGE WITHOUT OPERATING SYSTEM REBOOT 有权
公开(公告)号：US20170123780A1
公开(公告)日：2017-05-04
申请号：US14987074
申请日：2016-01-04
申请人： International Business Machines Corporation
发明人： Andre L. ALBOT , Vishal C. ASLOT , Thomas V. BURKS, III , John D. DIETEL
IPC分类号： G06F9/445 , G06F13/16 , G06F12/109
CPC分类号： G06F8/65 , G06F8/654 , G06F12/10 , G06F12/109 , G06F13/1668 , G06F13/24 , G06F13/4282 , G06F2212/657 , G06F2213/2424
摘要： The present disclosure relates to updating a firmware image on a coherent hardware accelerator concurrently with executing operations on the coherent hardware accelerator. According to one embodiment, while executing accelerator-enabled operations on the coherent hardware accelerator, a system stores a firmware update package in a local memory on the coherent hardware accelerator. Once the firmware update package is stored in local memory on the coherent hardware accelerator, the system restarting the coherent hardware accelerator by pausing the execution of at least a first operation initiated on the coherent hardware accelerator and applying the firmware update package to the firmware image on the coherent hardware accelerator. Once the firmware update package is applied to the coherent hardware accelerator, the system resumes the operation on the coherent hardware accelerator.

20. 发明申请

US20150146738A1 PROVIDING I2C BUS OVER ETHERNET 有权
标题翻译：在以太网上提供I2C总线
公开(公告)号：US20150146738A1
公开(公告)日：2015-05-28
申请号：US14606982
申请日：2015-01-27
申请人： International Business Machines Corporation
发明人： Alexander P. Campbell , Keshav G. Kamble , Vijoy A. Pandey
IPC分类号： H04L12/931 , H04L12/721 , H04L12/46
CPC分类号： G06F13/4282 , G06F13/24 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F21/85 , G06F2213/2424 , H04L12/4633 , H04L12/4641 , H04L45/44 , H04L49/351 , H04L63/08 , H04L63/162
摘要： In one embodiment, a method includes accessing every local I2C bus device, using a local processor of a distributed fabric protocol (DFP) system member, to ascertain which local I2C bus devices are present, receiving a request from a remote DFP system master, using a dedicated processor of the DFP system member, to register local I2C devices on the DFP system member in order to allow the DFP system master to have access to the local I2C devices, sending an acknowledgement to the request back to the DFP system master, receiving a read request from the DFP system master to read the local I2C bus devices and authenticating the read request, encapsulating details of the local I2C bus devices into a packet similar to that in which the read request was received, and sending the packet to a local network switch to be switched to the DFP system master.
摘要翻译：在一个实施例中，一种方法包括使用分布式结构协议（DFP）系统成员的本地处理器来访问每个本地I2C总线设备，以确定存在哪些本地I2C总线设备，从远程DFP系统主站接收请求，使用 DFP系统成员的专用处理器，用于在DFP系统成员上注册本地I2C设备，以便DFP系统主设备可以访问本地I2C设备，将请求确认发送回DFP系统主站，接收来自DFP系统主机的读取请求以读取本地I2C总线设备并认证读取请求，将本地I2C总线设备的细节封装成与接收到读取请求类似的数据包，并将数据包发送到本地网络交换机切换到DFP系统主站。

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