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11. 发明申请

US20220006288A1 LOW-IMPEDANCE SWITCH DRIVER IN PASSIVE MULTI-INPUT COMPARATOR FOR ISOLATION OF TRANSMIT SIGNALS IN MULTI-MODE CONFIGURATION 有权
公开(公告)号：US20220006288A1
公开(公告)日：2022-01-06
申请号：US17480798
申请日：2021-09-21
申请人： Kandou Labs SA
发明人： Suhas Rattan , Kiarash Gharibdoust
IPC分类号： H02H9/04
摘要： Dual mode T-switches driven by at least one low-impedance switch driver, to connect at least four wires of a multiwire bus to a multi-input comparator (MIC) of a plurality of MICs in a first mode of Orthogonal Vector Signaling operation, and in a full-duplex mode of operation, using the low-impedance switch driver to disable a corresponding subset of T-switches to selectively disconnect a pair of wires of the multiwire bus from the MIC while using low-impedance enable signal paths in the low-impedance switch drivers to shunt capacitively-coupled interfering outbound signals received at the MIC from the selectively disconnected pair of wires in the full-duplex mode of operation.

12. 发明授权

US11038518B2 Dynamic integration time adjustment of a clocked data sampler using a static analog calibration circuit 有权
公开(公告)号：US11038518B2
公开(公告)日：2021-06-15
申请号：US16897033
申请日：2020-06-09
申请人： Kandou Labs SA
发明人： Kiarash Gharibdoust , Armin Tajalli , Pavan Kumar Jampani , Ali Hormati
IPC分类号： H03M1/12 , H03M1/36 , H03M1/10 , H03M1/06
摘要： Methods and systems are described for generating a process-voltage-temperature (PVT)-dependent reference voltage at a reference branch circuit based on a reference current obtained via a band gap generator and a common mode voltage input, generating a PVT-dependent output voltage at an output of a static analog calibration circuit responsive to the common mode voltage input and an adjustable current, adjusting the adjustable current through the static analog calibration circuit according to a control signal generated responsive to comparisons of the PVT-dependent output voltage to the PVT-dependent reference voltage, and configuring a clocked data sampler with a PVT-calibrated current by providing the control signal to the clocked data sampler.

13. 发明申请

US20210111931A1 HIGH SPEED COMMUNICATIONS SYSTEM 有权
公开(公告)号：US20210111931A1
公开(公告)日：2021-04-15
申请号：US17081562
申请日：2020-10-27
申请人： Kandou Labs SA
发明人： Ali Hormati , Armin Tajalli , Amin Shokrollahi
IPC分类号： H04L25/03 , H04L1/00 , H04L25/49
摘要： Transmission of baseband and carrier-modulated vector codewords, using a plurality of encoders, each encoder configured to receive information bits and to generate a set of baseband-encoded symbols representing a vector codeword; one or more modulation circuits, each modulation circuit configured to operate on a corresponding set of baseband-encoded symbols, and using a respective unique carrier frequency, to generate a set of carrier-modulated encoded symbols; and, a summation circuit configured to generate a set of wire-specific outputs, each wire-specific output representing a sum of respective symbols of the carrier-modulated encoded symbols and at least one set of baseband-encoded symbols.

14. 发明申请

US20210075586A1 METHOD FOR MEASURING AND CORRECTING MULTIWIRE SKEW 有权
公开(公告)号：US20210075586A1
公开(公告)日：2021-03-11
申请号：US17081566
申请日：2020-10-27
申请人： Kandou Labs SA
发明人： Ali Hormati
IPC分类号： H04L7/00 , G06F1/10 , H04B3/462
摘要： Methods and systems are described for sequentially obtaining a plurality of data streams, the plurality of data streams comprising a data stream in a current condition, a data stream in a skewed-forward condition, and a data stream in a skewed-backward condition, calculating, for each data stream in the plurality of data streams, a corresponding set of cost-function values by obtaining a corresponding set of eye measurements, the eye measurements obtained by adjusting a sampling threshold of a sampler generating a plurality of samples of the data stream, the plurality of samples comprising edge samples and data samples, wherein the data stream is sampled at a rate equal to twice a rate of the data stream and calculating the corresponding set of cost-function values based on the corresponding set of eye measurements, and generating a skew control signal based on a comparison of the sets of calculated cost-function values.

15. 发明授权

US10904046B2 Variable gain amplifier and sampler offset calibration without clock recovery 有权
公开(公告)号：US10904046B2
公开(公告)日：2021-01-26
申请号：US16833362
申请日：2020-03-27
申请人： Kandou Labs SA
发明人： Ali Hormati
IPC分类号： H04L25/03 , H04L7/00 , H03F3/45 , H03F3/19
摘要： Methods and systems are described for generating a time-varying information signal at an output of a variable gain amplifier (VGA), sampling, using a sampler having a vertical decision threshold associated with a target signal amplitude, the time-varying information signal asynchronously to generate a sequence of decisions from varying sampling instants in sequential signaling intervals, the sequence of decisions comprising (i) positive decisions indicating the time-varying information signal is above the target signal amplitude and (ii) negative decisions indicating the time-varying information signal is below the target signal amplitude, accumulating a ratio of positive decisions to negative decisions, and generating a gain feedback control signal to adjust a gain setting of the VGA responsive to a mismatch of the accumulated ratio with respect to a target ratio.

16. 发明授权

US09203402B1 Efficient processing and detection of balanced codes 有权
标题翻译：平衡代码的高效处理和检测
公开(公告)号：US09203402B1
公开(公告)日：2015-12-01
申请号：US14089577
申请日：2013-11-25
申请人： Kandou Labs SA
发明人： Armin Tajalli , Harm Cronie , Amin Shokrollahi
IPC分类号： H03M5/00 , H03K17/687 , H03M13/29 , G11B20/14 , H04L1/00 , H03F1/32 , H04B3/54 , H04B1/7156
CPC分类号： H03M5/14 , G11B20/1426 , H03F1/3247 , H03K17/6871 , H03M13/2957 , H04B1/7156 , H04B3/54 , H04L1/0003 , H04L1/0048 , H04L1/0053 , H04L1/0057 , H04L1/0059
摘要： Circuits that are matched to balanced codes may recover transmitted information in a noise resilient and power efficient manner. Circuit components for processing a balanced code may include one or more of: matched amplification of the signals representing the balanced code, matched equalization and/or filtering on the signals representing the balanced code, matched non-linear filtering on the signaling representing the balanced code to detect the presence of particular symbols and matched latching of the signals representing the balanced code. Such matched circuits and circuit components may be achieved at least in part by incorporating suitable common circuit nodes and/or a single energy source into circuit topologies.
摘要翻译：与平衡代码匹配的电路可以以噪声弹性和功率有效的方式恢复发送的信息。用于处理平衡码的电路组件可以包括以下中的一个或多个：表示平衡码的信号的匹配放大，表示平衡码的信号的匹配均衡和/或滤波，对表示平衡码的信令进行匹配的非线性滤波以检测特定符号的存在和表示平衡码的信号的匹配锁存。这样的匹配电路和电路组件可以至少部分地通过将合适的公共电路节点和/或单个能量源并入到电路拓扑中来实现。

17. 发明申请

US20140254642A1 Methods and Systems for High Bandwidth Chip-to-Chip Communications Interface 有权
标题翻译：高带宽芯片到芯片通信接口的方法和系统
公开(公告)号：US20140254642A1
公开(公告)日：2014-09-11
申请号：US14199960
申请日：2014-03-06
申请人： Kandou Labs, SA
发明人： John Fox , Brian Holden , Ali Hormati , Peter Hunt , John D. Keay , Amin Shokrollahi , Richard Simpson , Anant Singh , Andrew Kevin John Stewart , Giuseppe Surace , Roger Ulrich
IPC分类号： H04L25/02
CPC分类号： H04L25/028 , H04L25/0292
摘要： Systems and methods are described for transmitting data over physical channels to provide a high bandwidth, low latency interface between integrated circuit chips with low power utilization. Communication is performed using group signaling over multiple wires using a vector signaling code, where each wire carries a low-swing signal that may take on more than two signal values.
摘要翻译：描述了用于通过物理信道传输数据的系统和方法，以在具有低功率利用率的集成电路芯片之间提供高带宽，低延迟的接口。使用矢量信令码通过多条线路使用组信令进行通信，其中每条线路携带可能承受多于两个信号值的低摆动信号。

18. 发明申请

US20140063915A1 DIFFERENTIAL VECTOR STORAGE FOR DYNAMIC RANDOM ACCESS MEMORY 有权
标题翻译：动态随机存取存储器的差分向量存储
公开(公告)号：US20140063915A1
公开(公告)日：2014-03-06
申请号：US13843785
申请日：2013-03-15
申请人： Kandou Labs, SA
发明人： Harm Cronie , Amin Shokrollahi
IPC分类号： G11C11/408
CPC分类号： G11C11/4087 , G11C7/1006 , G11C11/406 , G11C11/4096 , G11C11/565 , H03M7/20
摘要： A storage device stores data in groups of memory cells using vectors corresponding to voltage code codewords, each codeword having k entries. Entries have values selected from a set of at least three entry values and 2n distinct inputs can be encoded into k-entry codewords for some n>k. A vector storage element comprising k cells can store an k electrical quantities (voltage, current, etc.) corresponding to a codeword. The voltage code is such that, for at least one position of a vector, there are at least three vectors having distinct entry values at that position and, for at least a subset of the possible codewords, the sum of the entry values over the positions of the each vector is constant from vector to vector in that subset. The storage device might be an integrated circuit device, a discrete memory device, or a device having embedded memory.
摘要翻译：存储装置使用与电压代码字对应的矢量存储存储单元组的数据，每个码字具有k个条目。条目具有从一组至少三个条目值中选择的值，并且对于某些n> k，2n个不同的输入可被编码为k个入口码字。包括k个单元的矢量存储元件可以存储对应于码字的k个电量（电压，电流等）。电压代码使得对于向量的至少一个位置，存在至少三个向量，在该位置具有不同的入口值，并且对于至少一个可能的码字的子集，在位置上的入口值的和的每个向量在该子集中从向量到向量是不变的。存储设备可以是集成电路设备，分立存储设备或具有嵌入式存储器的设备。

19. 发明授权

US12074735B2 Horizontal centering of sampling point using multiple vertical voltage 有权
公开(公告)号：US12074735B2
公开(公告)日：2024-08-27
申请号：US18158405
申请日：2023-01-23
申请人： Kandou Labs SA
发明人： Ali Hormati
IPC分类号： H04L25/03
CPC分类号： H04L25/03057
摘要： Methods and systems are described for adjusting the sample timing of a data sampler operating in a data signal processing path having a decision threshold associated with a decision feedback equalization (DFE) correction factor. The vertical threshold and sample timing of a spare sampler are varied to measure a signal amplitude trajectory of a pattern-verified signal according to detection of the predetermined transitional data pattern, the locked sampling point then being adjusted based on the measured signal amplitude trajectory.

20. 发明公开

US20230308064A1 VARIABLE GAIN AMPLIFIER WITH CROSS-COUPLED COMMON MODE REDUCTION 审中-公开
公开(公告)号：US20230308064A1
公开(公告)日：2023-09-28
申请号：US17702884
申请日：2022-03-24
申请人： Kandou Labs SA
发明人： Maik Fuhs
IPC分类号： H04L25/02 , H03F3/45 , H03D7/14
CPC分类号： H04L25/0272 , H03F3/45475 , H03D7/1458
摘要： Methods and systems for receiving a differential input voltage signal at an input of a variable gain amplifier, and responsively generating an amplified differential output voltage signal on a pair of output nodes by driving a pair of load impedances connected to the pair of output nodes with an amplifier current according to the differential input voltage signal, enabling a cross-coupled differential pair connected in parallel to the pair of load impedances, the cross-coupled differential pair having drain inputs and cross-coupled gate inputs connected to the pair of output nodes to supplement a gain of the amplified differential voltage output voltage signal, and reducing a common mode voltage of the amplified differential output voltage signal by lowering the amplifier current driving the pair of load impedances via a bias control signal, the amplifier current lowered responsive to detecting the supplemented gain of the amplified differential output voltage signal.

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