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11. 发明授权

US07148526B1 Germanium MOSFET devices and methods for making same 有权
标题翻译：锗MOSFET器件及其制造方法
公开(公告)号：US07148526B1
公开(公告)日：2006-12-12
申请号：US10348758
申请日：2003-01-23
申请人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
发明人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
IPC分类号： H01L29/72
CPC分类号： H01L29/7855 , H01L21/823821 , H01L29/42384 , H01L29/7843 , H01L29/78684
摘要： A double gate germanium metal-oxide semiconductor field-effect transistor (MOSFET) includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, and a second gate formed adjacent a second side of the germanium fin opposite the first side. A triple gate MOSFET includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, a second gate formed adjacent a second side of the germanium fin opposite the first side, and a top gate formed on top of the germanium fin. An all-around gate MOSFET includes a germanium fin, a first sidewall gate structure formed adjacent a first side of the germanium fin, a second sidewall gate structure formed adjacent a second side of the germanium fin, and additional gate structures formed on and around the germanium fin.
摘要翻译：双栅极锗金属氧化物半导体场效应晶体管（MOSFET）包括锗翅片，邻近锗翅片的第一侧形成的第一栅极和与第一侧相对的锗翅片第二侧附近形成的第二栅极。三栅极MOSFET包括锗翅片，与锗翅片的第一侧相邻形成的第一栅极，与第一侧相对的锗翅片的第二侧附近形成的第二栅极和形成在锗翅片顶部上的顶栅极。全栅极MOSFET包括锗翅片，邻近锗翅片的第一侧形成的第一侧壁栅极结构，邻近锗翅片的第二侧形成的第二侧壁栅极结构，以及形成在锗翅片上和周围的附近的栅极结构锗鳍

12. 发明授权

US08334181B1 Germanium MOSFET devices and methods for making same 有权
标题翻译：锗MOSFET器件及其制造方法
公开(公告)号：US08334181B1
公开(公告)日：2012-12-18
申请号：US12836378
申请日：2010-07-14
申请人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
发明人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
IPC分类号： H01L29/72
CPC分类号： H01L29/7855 , H01L21/823821 , H01L29/42384 , H01L29/7843 , H01L29/78684
摘要： A double gate germanium metal-oxide semiconductor field-effect transistor (MOSFET) includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, and a second gate formed adjacent a second side of the germanium fin opposite the first side. A triple gate MOSFET includes a germanium fin, a first gate formed adjacent a first side of the germanium fin, a second gate formed adjacent a second side of the germanium fin opposite the first side, and a top gate formed on top of the germanium fin. An all-around gate MOSFET includes a germanium fin, a first sidewall gate structure formed adjacent a first side of the germanium fin, a second sidewall gate structure formed adjacent a second side of the germanium fin, and additional gate structures formed on and around the germanium fin.
摘要翻译：双栅极锗金属氧化物半导体场效应晶体管（MOSFET）包括锗翅片，邻近锗翅片的第一侧形成的第一栅极和与第一侧相对的锗翅片第二侧附近形成的第二栅极。三栅极MOSFET包括锗翅片，与锗翅片的第一侧相邻形成的第一栅极，与第一侧相对的锗翅片的第二侧附近形成的第二栅极和形成在锗翅片顶部上的顶栅极。全栅极MOSFET包括锗翅片，邻近锗翅片的第一侧形成的第一侧壁栅极结构，邻近锗翅片的第二侧形成的第二侧壁栅极结构，以及形成在锗翅片上和周围的附近的栅极结构锗鳍

13. 发明授权

US08222680B2 Double and triple gate MOSFET devices and methods for making same 有权
标题翻译：双栅极和三栅极MOSFET器件及其制造方法
公开(公告)号：US08222680B2
公开(公告)日：2012-07-17
申请号：US10274961
申请日：2002-10-22
申请人： Ming-Ren Lin , Judy Xilin An , Zoran Krivokapic , Cyrus E. Tabery , Haihong Wang , Bin Yu
发明人： Ming-Ren Lin , Judy Xilin An , Zoran Krivokapic , Cyrus E. Tabery , Haihong Wang , Bin Yu
IPC分类号： H01L29/72
CPC分类号： H01L29/785 , H01L29/42384 , H01L29/66795 , H01L29/66818
摘要： A double gate metal-oxide semiconductor field-effect transistor (MOSFET) includes a fin, a first gate and a second gate. The first gate is formed on top of the fin. The second gate surrounds the fin and the first gate. In another implementation, a triple gate MOSFET includes a fin, a first gate, a second gate, and a third gate. The first gate is formed on top of the fin. The second gate is formed adjacent the fin. The third gate is formed adjacent the fin and opposite the second gate.
摘要翻译：双栅极金属氧化物半导体场效应晶体管（MOSFET）包括鳍状物，第一栅极和第二栅极。第一个门形成在鳍的顶部。第二个门围绕翅片和第一个门。在另一实施方案中，三栅极MOSFET包括鳍片，第一栅极，第二栅极和第三栅极。第一个门形成在鳍的顶部。第二个门形成在翅片附近。第三栅极形成在翅片附近并与第二栅极相对。

14. 发明授权

US07781810B1 Germanium MOSFET devices and methods for making same 有权
标题翻译：锗MOSFET器件及其制造方法
公开(公告)号：US07781810B1
公开(公告)日：2010-08-24
申请号：US11538217
申请日：2006-10-03
申请人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
发明人： Judy Xilin An , Zoran Krivokapic , Haihong Wang , Bin Yu
IPC分类号： H01L29/72
CPC分类号： H01L29/7855 , H01L21/823821 , H01L29/42384 , H01L29/7843 , H01L29/78684
摘要： A device includes a fin, a first gate and a second gate. The first gate is formed adjacent a first side of the fin and includes a first layer of material having a first thickness and having an upper surface that is substantially co-planar with an upper surface of the fin. The second gate is formed adjacent a second side of the fin opposite the first side and includes a second layer of material having a second thickness and having an upper surface that is substantially co-planar with the upper surface of the fin, where the first thickness and the second thickness are substantially equal to a height of the fin.
摘要翻译：一种装置包括鳍片，第一栅极和第二栅极。第一门形成在鳍片的第一侧附近，并且包括具有第一厚度并且具有与鳍片的上表面基本共面的上表面的第一材料层。所述第二浇口邻近所述翅片的与所述第一侧相对的第二侧形成，并且包括具有第二厚度并具有与所述翅片的上表面基本共面的上表面的第二材料层，其中所述第一厚度并且第二厚度基本上等于翅片的高度。

15. 发明授权

US07196372B1 Flash memory device 有权
标题翻译：闪存设备
公开(公告)号：US07196372B1
公开(公告)日：2007-03-27
申请号：US10614177
申请日：2003-07-08
申请人： Bin Yu , Ming-Ren Lin , Srikanteswara Dakshina-Murthy , Zoran Krivokapic
发明人： Bin Yu , Ming-Ren Lin , Srikanteswara Dakshina-Murthy , Zoran Krivokapic
IPC分类号： H01L29/788
CPC分类号： H01L29/7887 , H01L21/28273 , H01L27/11568 , H01L29/785
摘要： A non-volatile memory device includes a substrate, an insulating layer, a fin, an oxide layer, spacers and one or more control gates. The insulating layer is formed on the substrate and the fin is formed on the insulating layer. The oxide layer is formed on the fin and acts as a tunnel oxide for the memory device. The spacers are formed adjacent the side surfaces of the fin and the control gates are formed adjacent the spacers. The spacers act as floating gate electrodes for the non-volatile memory device.
摘要翻译：非易失性存储器件包括衬底，绝缘层，鳍，氧化物层，间隔物和一个或多个控制栅极。绝缘层形成在基板上，并且鳍形成在绝缘层上。氧化层形成在翅片上并用作存储器件的隧道氧化物。间隔件邻近翅片的侧表面形成，并且控制栅极邻近间隔件形成。间隔件用作非易失性存储器件的浮栅电极。

16. 发明授权

US06842048B2 Two transistor NOR device 有权
标题翻译：两晶体管NOR器件
公开(公告)号：US06842048B2
公开(公告)日：2005-01-11
申请号：US10301617
申请日：2002-11-22
申请人： Zoran Krivokapic , Judy Xilin An , Ming-Ren Lin , Haihong Wang
发明人： Zoran Krivokapic , Judy Xilin An , Ming-Ren Lin , Haihong Wang
IPC分类号： H01L27/088 , H01L27/092 , H01L27/12 , H01L29/423 , H01L29/786 , H03K19/20
CPC分类号： H01L27/1203 , H01L27/088 , H01L27/0886 , H01L27/092 , H01L27/0924 , H01L29/42384 , H01L29/785 , H01L29/7856
摘要： A NOR gate includes is constructed with two asymmetric FinFET type transistors instead of the conventional four-transistor NOR gate. The reduction in the number of transistors from four down to two allows for significant improvements in integrated semiconductor circuits.
摘要翻译： NOR门包括用两个非对称的FinFET型晶体管构成，而不是常规的四晶体管或非门。晶体管数量从四个减少到二个允许集成半导体电路的显着改进。

17. 发明授权

US06717212B2 Leaky, thermally conductive insulator material (LTCIM) in semiconductor-on-insulator (SOI) structure 有权
标题翻译：绝缘体上绝缘体（SOI）结构中的漏电导热绝缘体材料（LTCIM）
公开(公告)号：US06717212B2
公开(公告)日：2004-04-06
申请号：US09879724
申请日：2001-06-12
申请人： Dong-Hyuk Ju , William George En , Srinath Krishnan , Concetta E. Riccobene , Zoran Krivokapic , Judy Xilin An , Bin Yu
发明人： Dong-Hyuk Ju , William George En , Srinath Krishnan , Concetta E. Riccobene , Zoran Krivokapic , Judy Xilin An , Bin Yu
IPC分类号： H01L31392
CPC分类号： H01L21/76254 , H01L21/187 , H01L29/78603 , H01L29/78606 , H01L29/78609 , H01L29/78612
摘要： A device and method for making a semiconductor-on-insulator (SOI) structure having a leaky, thermally conductive material (LTCIM) layer disposed between a semiconductor substrate and a semiconductor layer.
摘要翻译：一种用于制造绝缘体半导体（SOI）结构的装置和方法，其具有设置在半导体衬底和半导体层之间的具有泄漏的导热材料（LTCIM）层。

18. 发明授权

US06855583B1 Method for forming tri-gate FinFET with mesa isolation 失效
标题翻译：用于形成台栅隔离的三栅极FinFET的方法
公开(公告)号：US06855583B1
公开(公告)日：2005-02-15
申请号：US10633503
申请日：2003-08-05
申请人： Zoran Krivokapic , Judy Xilin An , Bin Yu
发明人： Zoran Krivokapic , Judy Xilin An , Bin Yu
IPC分类号： H01L21/336 , H01L29/786 , H01L21/00
CPC分类号： H01L29/785 , H01L29/66545 , H01L29/66795
摘要： A method forming a tri-gate fin field effect transistor includes forming an oxide layer over a silicon-on-insulator wafer comprising a silicon layer, and etching the silicon and oxide layers using a rectangular mask to form a mesa. The method further includes etching a portion of the mesa using a second mask to form a fin, forming a gate dielectric layer over the fin, and forming a tri-gate over the fin and the gate dielectric layer.
摘要翻译：形成三栅极鳍场效应晶体管的方法包括在包括硅层的绝缘体上硅晶片上形成氧化物层，并且使用矩形掩模蚀刻硅和氧化物层以形成台面。该方法还包括使用第二掩模蚀刻台面的一部分以形成翅片，在翅片上形成栅极电介质层，并在鳍状物和栅极介电层上形成三栅极。

19. 发明授权

US06864164B1 Finfet gate formation using reverse trim of dummy gate 失效
标题翻译： Finfet门形成使用虚拟门的倒装
公开(公告)号：US06864164B1
公开(公告)日：2005-03-08
申请号：US10320536
申请日：2002-12-17
申请人： Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Cyrus E. Tabery
发明人： Srikanteswara Dakshina-Murthy , Zoran Krivokapic , Cyrus E. Tabery
IPC分类号： H01L21/336 , H01L29/786 , H01L21/3205
CPC分类号： H01L29/785 , H01L29/66545 , H01L29/66795
摘要： A method of forming a gate electrode for a fin field effect transistor (FinFET) includes forming a fin on a substrate and forming an oxide layer over the fin. The method further includes forming a carbon layer over the oxide layer and forming a trench in the oxide layer and the carbon layer, where the trench crosses over the fin. The method also includes filling the trench with a material to form the gate electrode.
摘要翻译：形成鳍状场效应晶体管（FinFET）的栅电极的方法包括在衬底上形成翅片并在鳍上形成氧化物层。所述方法还包括在所述氧化物层上形成碳层并在所述氧化物层和所述碳层中形成沟槽，其中所述沟槽跨过所述鳍片。该方法还包括用材料填充沟槽以形成栅电极。

20. 发明授权

US07235436B1 Method for doping structures in FinFET devices 有权
标题翻译： FinFET器件掺杂结构的方法
公开(公告)号：US07235436B1
公开(公告)日：2007-06-26
申请号：US10614051
申请日：2003-07-08
申请人： Ming-Ren Lin , Zoran Krivokapic , Haihong Wang , Bin Yu
发明人： Ming-Ren Lin , Zoran Krivokapic , Haihong Wang , Bin Yu
IPC分类号： H01L21/84
CPC分类号： H01L21/845 , H01L27/1211 , H01L29/66795 , H01L29/785
摘要： A method for doping fin structures in FinFET devices includes forming a first glass layer on the fin structure of a first area and a second area. The method further includes removing the first glass layer from the second area, forming a second glass layer on the fin structure of the first area and the second area, and annealing the first area and the second area to dope the fin structures.
摘要翻译：在FinFET器件中掺杂鳍结构的方法包括在第一区域和第二区域的鳍结构上形成第一玻璃层。该方法还包括从第二区域去除第一玻璃层，在第一区域和第二区域的翅片结构上形成第二玻璃层，并退火第一区域和第二区域以掺杂翅片结构。

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