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11. 发明申请

US20190227401A1 ELECTROCHROMIC ELEMENT 审中-公开
公开(公告)号：US20190227401A1
公开(公告)日：2019-07-25
申请号：US16250291
申请日：2019-01-17
申请人： Keiichiroh YUTANI , Tomoo FUKUDA , Hiroyuki TAKAHASHI , Koh FUJIMURA , Tohru YASHIRO , Takaaki KONNO , Noboru SASA
发明人： Keiichiroh YUTANI , Tomoo FUKUDA , Hiroyuki TAKAHASHI , Koh FUJIMURA , Tohru YASHIRO , Takaaki KONNO , Noboru SASA
IPC分类号： G02F1/1523 , G02F1/1516 , G02F1/153 , G02F1/1334 , G02F1/155
摘要： An electrochromic element is provided that includes a first substrate and a second substrate that are arranged to oppose each other, a first transparent electrode that is formed on a surface of the first substrate facing the second substrate, a second transparent electrode that is formed on a surface of the second substrate facing the first substrate, and a coloration layer that is arranged between the first transparent electrode and the second transparent electrode. The coloration layer includes an electrochromic material and an electrolyte, and a pattern or a concentration gradient of the electrochromic material is formed in at least a part of the coloration layer.

12. 发明申请

US20120139824A1 ELECTROCHROMIC DISPLAY ELEMENT, DISPLAY DEVICE AND INFORMATION APPARATUS 有权
标题翻译：电子显示元件，显示设备和信息设备
公开(公告)号：US20120139824A1
公开(公告)日：2012-06-07
申请号：US13307122
申请日：2011-11-30
申请人： Hiroyuki TAKAHASHI , Yoshinori OKADA , Tohru YASHIRO , Akishige MURAKAMI , Shigenobu HIRANO , Yoshihisa NAIJO
发明人： Hiroyuki TAKAHASHI , Yoshinori OKADA , Tohru YASHIRO , Akishige MURAKAMI , Shigenobu HIRANO , Yoshihisa NAIJO
IPC分类号： G09G3/38 , G02F1/153
CPC分类号： G02F1/155 , G02F2001/1536 , G02F2201/16
摘要： A disclosed electrochromic display element includes a display substrate, a counter substrate facing the display substrate, display electrodes arranged between the display substrate and the counter substrate, electrochromic layers formed on the respective display electrodes, a plurality of drive elements arranged on the counter substrate at predetermined intervals, a plurality of pixel electrodes arranged on the drive elements, a charge retention layer formed over the pixel electrodes as a continuous layer, the charge retention layer being formed of a mixed film including a polymer and one of electric conductive microparticles and semiconductor microparticles, and an electrolyte layer sandwitched between the display substrate and the charge retention layer.
摘要翻译：所公开的电致变色显示元件包括显示基板，面对显示基板的对置基板，布置在显示基板和对置基板之间的显示电极，形成在各个显示电极上的电致变色层，布置在相对基板上的多个驱动元件布置在驱动元件上的多个像素电极，形成在像素电极上作为连续层的电荷保持层，电荷保持层由包含聚合物和导电微粒和半导体微粒之一的混合膜形成以及在显示基板和电荷保持层之间切换的电解质层。

13. 发明申请

US20170064264A1 ACTUATOR CONTROLLING DEVICE, DRIVE SYSTEM, VIDEO DEVICE, IMAGE PROJECTION DEVICE, AND ACTUATOR CONTROLLING METHOD 审中-公开
标题翻译：执行器控制装置，驱动系统，视频装置，图像投影装置和致动器控制方法
公开(公告)号：US20170064264A1
公开(公告)日：2017-03-02
申请号：US15247062
申请日：2016-08-25
申请人： Hiroyuki TAKAHASHI
发明人： Hiroyuki TAKAHASHI
IPC分类号： H04N9/31
CPC分类号： H04N9/31 , G02B26/0858 , G02B26/101 , G02B26/105 , H01L41/042 , H04N9/3194
摘要： An actuator controlling device controls an actuator based on signals acquired from a photodetector. The actuator includes a drive unit that causes a reflecting part to move. The actuator controlling device includes a waveform generating unit, a driving amplifier, a power supply unit, and a controller. The waveform generating unit generates a voltage waveform for driving the drive unit. The driving amplifier amplifies the voltage waveform generated by the waveform generating unit. The power supply unit supplies power to the driving amplifier. The controller acquires detection signals from the photodetector and controls, based on the acquired detection signals, voltage to be supplied from the power supply unit to the driving amplifier.
摘要翻译：致动器控制装置基于从光电检测器获取的信号来控制致动器。致动器包括使反射部分移动的驱动单元。致动器控制装置包括波形发生单元，驱动放大器，电源单元和控制器。波形发生单元产生用于驱动驱动单元的电压波形。驱动放大器放大由波形发生单元产生的电压波形。电源单元为驱动放大器供电。控制器从光电检测器获取检测信号，并根据获取的检测信号控制从电源单元提供给驱动放大器的电压。

14. 发明申请

US20130016726A1 MEMORY CONTROL APPARATUS, INFORMATION PROCESSING APPARATUS, AND MEMORY CONTROL METHOD 有权
标题翻译：存储器控制装置，信息处理装置和存储器控制方法
公开(公告)号：US20130016726A1
公开(公告)日：2013-01-17
申请号：US13542139
申请日：2012-07-05
申请人： Satoru NUMAKURA , Junichi IKEDA , Mitsuru SUZUKI , Koji TAKEO , Tetsuya SATOH , Hiroyuki TAKAHASHI
发明人： Satoru NUMAKURA , Junichi IKEDA , Mitsuru SUZUKI , Koji TAKEO , Tetsuya SATOH , Hiroyuki TAKAHASHI
IPC分类号： H04L12/56
CPC分类号： H04L49/9042 , G06F7/00 , G11C8/16 , H04L49/901
摘要： A memory control apparatus that controls writing and reading of data to/from a memory. The memory control apparatus includes: a sequence control unit that receives a packet sequence including a write packet including a write request of data and a read packet including a read request of the data, and changes an arrangement of the write packet and the read packet included in the packet sequence so that a first predetermined number of write packets are arranged successively and a second predetermined number of read packets are arranged successively; and a command output unit that receives the packet sequence from the sequence control unit, and outputs a write command according to the write packet and an a read command according to the read packet to the memory, in accordance with an order of arrangement of the write packet and the read packet.
摘要翻译：一种用于控制向/从存储器写入和读取数据的存储器控制装置。存储器控制装置包括：序列控制单元，其接收包括包括数据的写入请求的写入包和包含数据的读取请求的读取包的数据包序列，并且改变写入数据包和包含的读取数据包的配置在分组序列中，使得第一预定数量的写分组被连续地排列，并且第二预定数量的读分组被依次布置; 以及命令输出单元，其从顺序控制单元接收分组序列，并且根据写入分组和根据读取的分组的读取命令，根据写入的顺序将顺序输出到存储器包和读包。

15. 发明申请

US20120262976A1 SEMICONDUCTOR STORAGE DEVICE 有权
标题翻译：半导体存储设备
公开(公告)号：US20120262976A1
公开(公告)日：2012-10-18
申请号：US13437783
申请日：2012-04-02
申请人： Hiroyuki TAKAHASHI , Ryoutaka Kitou
发明人： Hiroyuki TAKAHASHI , Ryoutaka Kitou
IPC分类号： G11C5/06 , G11C11/24
CPC分类号： G11C5/06 , G11C5/02 , G11C11/4094 , G11C11/4097 , G11C11/4099 , H01L27/0207 , H01L27/088 , H01L27/105 , H01L27/10885 , H01L27/10897
摘要： When plural diffusion layers are shared in order to save an area of a semiconductor integrated circuit, parasitic capacities of wirings coupled to those diffusion layers are changed. Nonetheless, a semiconductor layout balancing capacitive loads of paired wirings coupled to the diffusion layers with each other is provided. The diffusion layers coupled to the respective paired wirings are alternately arranged or staggered to balance the respective capacitive loads of the paired wirings with each other.
摘要翻译：共享多个扩散层以节省半导体集成电路的面积时，与这些扩散层耦合的布线的寄生电容发生变化。然而，提供了平衡耦合到扩散层的成对布线的容性负载的半导体布局。耦合到相应配对布线的扩散层交替地布置或交错以平衡配对布线的各自的容性负载。

16. 发明申请

US20120260687A1 CENTRIFUGE 有权
标题翻译：离心机
公开(公告)号：US20120260687A1
公开(公告)日：2012-10-18
申请号：US13446497
申请日：2012-04-13
申请人： Masahiro INANIWA , Hiroyuki TAKAHASHI , Kouichi AKATSU , Hisanobu OOYAMA , Yuki HODOTSUKA , Hidetaka OSAWA
发明人： Masahiro INANIWA , Hiroyuki TAKAHASHI , Kouichi AKATSU , Hisanobu OOYAMA , Yuki HODOTSUKA , Hidetaka OSAWA
IPC分类号： F25B49/02 , F25B41/04 , F25D31/00
CPC分类号： B04B15/02 , B04B9/10 , B04B13/00
摘要： A centrifuge including: a rotor configured to be driven by a motor and to hold a sample, a centrifuge inverter, a chamber accommodating the rotor, a temperature sensor configured to detect the temperature of the chamber, a cooling machine configured to cool the chamber and including a compressor, a compressor inverter, a compressor motor configured to be controlled in a variable speed and a control device, wherein the control device carries out a feedback control of the compressor motor based on a preset temperature and a detected temperature of the temperature sensor when the rotation number of the compressor motor is larger than a predetermined rotation number, and the control device carries out an intermittent control for turning ON-OFF the cooling function of the compressor when the rotation number of the compressor motor is smaller than a predetermined rotation number.
摘要翻译：一种离心机，包括：转子，其被配置为由电动机驱动并保持样品，离心机逆变器，容纳转子的室，被配置为检测室的温度的温度传感器，被配置为冷却室的冷却机构，包括压缩机，压缩机逆变器，被配置为以可变速度控制的压缩机电动机和控制装置，其中控制装置基于预设温度和温度传感器的检测温度执行压缩机电动机的反馈控制当压缩机电动机的旋转数大于预定转数时，并且当压缩机电动机的转速小于预定转速时，控制装置进行用于使压缩机的冷却功能接通 - 断开的间歇控制数。

17. 发明申请

US20110255360A1 SEMICONDUCTOR MEMORY DEVICE AND METHOD FOR CONTROLLING THE SAME 有权
标题翻译：半导体存储器件及其控制方法
公开(公告)号：US20110255360A1
公开(公告)日：2011-10-20
申请号：US13070034
申请日：2011-03-23
申请人： Hiroyuki TAKAHASHI
发明人： Hiroyuki TAKAHASHI
IPC分类号： G11C7/00
CPC分类号： G11C11/406 , G11C11/40615 , G11C2211/4062
摘要： A semiconductor memory device includes a memory cell array having plural memory cells that require a refresh operation when retaining data; a read/write control unit that performs read-access or write-access of memory cell address specified for the memory cell array based on instructions from the outside; a refresh control unit that performs hidden-refresh of memory cells without control from the outside; and a schedule control unit that makes the refresh control unit perform hidden-refresh after the read/write control unit read-accesses the memory cell array, and that also makes the refresh control unit perform hidden-refresh before the read/write access control unit performs write-access.
摘要翻译：半导体存储器件包括具有多个存储单元的存储单元阵列，当存储数据时需要刷新操作; 读/写控制单元，其基于来自外部的指令执行对存储单元阵列指定的存储单元地址的读取或写入; 刷新控制单元，其不从外部进行控制地进行存储单元的隐藏刷新; 以及调度控制单元，其使刷新控制单元在读/写控制单元读取存储单元阵列之后执行隐藏刷新，并且还使刷新控制单元在读/写访问控制单元之前进行隐藏刷新执行写入访问。

18. 发明申请

US20110230327A1 CENTRIFUGE AND CENTRIFUGE OPERATION INFORMATION COLLECTING SYSTEM 有权
标题翻译：离散和离心操作信息收集系统
公开(公告)号：US20110230327A1
公开(公告)日：2011-09-22
申请号：US13038410
申请日：2011-03-02
申请人： Hiroyuki TAKAHASHI , Hisanobu OOYAMA
发明人： Hiroyuki TAKAHASHI , Hisanobu OOYAMA
IPC分类号： B04B13/00
CPC分类号： B04B13/00 , B04B5/10 , B04B9/10
摘要： A centrifuge includes: a driving unit; a rotor configured to be rotated by the driving unit and hold a sample; a control unit configured to control rotation of the driving unit; and a communication controller configured to communicate with an external network. The control unit has an automatic transmission mode in which operation data is collected at predetermined intervals while the centrifuge is operating and the operation data is periodically transmitted to a data managing apparatus through the network.
摘要翻译：离心机包括：驱动单元; 构造成由所述驱动单元旋转并保持样本的转子; 控制单元，被配置为控制所述驱动单元的旋转; 以及通信控制器，被配置为与外部网络进行通信。控制单元具有自动传送模式，其中在离心机运行时以预定间隔收集操作数据，并且通过网络将操作数据周期性地发送到数据管理装置。

19. 发明申请

US20110103124A1 SEMICONDUCTOR MEMORY DEVICE 失效
标题翻译：半导体存储器件
公开(公告)号：US20110103124A1
公开(公告)日：2011-05-05
申请号：US12916768
申请日：2010-11-01
申请人： Hiroyuki TAKAHASHI , Masahiro Yoshida
发明人： Hiroyuki TAKAHASHI , Masahiro Yoshida
IPC分类号： G11C7/12 , G11C11/4063 , G11C5/06
CPC分类号： G11C7/1048 , G11C7/12 , G11C7/227 , G11C11/4094 , G11C11/4096 , G11C2207/002
摘要： A semiconductor memory device has: memory blocks; and a local bus connected to the memory blocks. Each memory block has: switches respectively provided between bit line pairs and the local bus and each of which is turned ON in response to a selection signal; a dummy local bus; first and second control circuits. The local bus and the dummy local bus are precharged to a first potential before a read operation. In the read operation, the first control circuit outputs the selection signal to a selected switch to electrically connect a selected bit line pair and the local bus, while the second control circuit supplies a second potential lower than the first potential to the dummy local bus. The first control circuit stops outputting the selection signal when a potential of the dummy local bus is decreased to a predetermined set potential that is between the first and second potentials.
摘要翻译：半导体存储器件具有：存储器块; 以及连接到存储器块的本地总线。每个存储块具有分别设置在位线对和本地总线之间的开关，并且每个开关响应于选择信号而导通; 虚拟当地巴士第一和第二控制电路。在读操作之前，本地总线和虚拟本地总线被预先充电到第一个电位。在读取操作中，第一控制电路将选择信号输出到所选择的开关，以电连接所选位线对和局部总线，而第二控制电路将低于第一电位的第二电位提供给虚拟本地总线。当虚拟局部总线的电位降低到第一和第二电位之间的预定设定电位时，第一控制电路停止输出选择信号。

20. 发明申请

US20100290300A1 SEMICONDUCTOR INTEGRATED DEVICE 失效
标题翻译：半导体集成器件
公开(公告)号：US20100290300A1
公开(公告)日：2010-11-18
申请号：US12769141
申请日：2010-04-28
申请人： Hiroyuki TAKAHASHI , Tetsuo Fukushi
发明人： Hiroyuki TAKAHASHI , Tetsuo Fukushi
IPC分类号： G11C7/00 , G11C7/06
CPC分类号： G11C11/4085 , G11C7/062 , G11C7/12 , G11C11/4091 , G11C11/4094 , G11C11/4097
摘要： Provided is a semiconductor integrated device including a semiconductor memory circuit and a peripheral circuit of the semiconductor memory circuit. The peripheral circuit includes a first transistor having a first voltage as a breakdown voltage of a gate oxide film. The semiconductor memory circuit includes a pair of bit lines, one of the pair of bit lines being connected to a gate transistor of a memory cell, and a precharge circuit that includes a transistor having a breakdown voltage substantially equal to that of the first transistor, and precharges the pair of bit lines to a predetermined voltage in response to an activation signal. The activation signal of the precharge circuit is a second voltage higher than the first voltage.
摘要翻译：提供一种包括半导体存储电路和半导体存储电路的外围电路的半导体集成器件。外围电路包括具有作为栅氧化膜的击穿电压的第一电压的第一晶体管。半导体存储器电路包括一对位线，一对位线中的一个连接到存储单元的栅极晶体管，以及预充电电路，其包括具有基本上等于第一晶体管的击穿电压的晶体管，并且响应于激活信号将一对位线预充电到预定电压。预充电电路的激活信号是比第一电压高的第二电压。

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