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    • 11. 发明授权
    • Pulse width modulation with effective high duty resolution
    • 具有高占空比分辨率的脉宽调制
    • US09490792B2
    • 2016-11-08
    • US12703239
    • 2010-02-10
    • Bin Zhao
    • Bin Zhao
    • H03K7/08H04N9/31H05B33/08H02M1/084
    • H03K7/08H02M1/084H04N9/3123H05B33/0818H05B33/0845Y02B20/346
    • A pulse width modulation (PWM) signal generator generates a PWM signal having a specified effective PWM duty resolution for a corresponding cycle window. The PWM signal generator receives an N-bit value representing a duty to be implemented and sets values X and Y to the M least significant bits and the N-M most significant bits, respectively, of the N-bit value. The value M can be determined based on the value N and a maximum implementable frequency of a clock signal used to time the generation of each PWM cycle. The PWM signal generator generates a cycle window of 2M PWM cycles, each PWM cycle of the cycle window having a duty of either Y or Y+1. The number of PWM cycles in the cycle window having the duty Y+1 is based on the value X and the PWM cycles having a particular duty are contiguous within the cycle window.
    • 脉冲宽度调制(PWM)信号发生器产生对于相应的周期窗口具有指定的有效PWM占空比分辨率的PWM信号。 PWM信号发生器接收表示要实现的占空比的N位值,并将值X和Y分别设置为N位值的M个最低有效位和N-M个最高有效位。 可以基于用于时间产生每个PWM周期的时钟信号的值N和最大可实施频率来确定值M. PWM信号发生器产生2M个PWM周期的周期窗口,周期窗口的每个PWM周期具有Y或Y + 1的占空比。 具有占空比Y + 1的周期窗口中的PWM周期的数量基于值X,并且具有特定占空比的PWM周期在周期窗口内是连续的。
    • 15. 发明授权
    • LED driver with frame-based dynamic power management
    • LED驱动器采用基于帧的动态电源管理
    • US08279144B2
    • 2012-10-02
    • US12183492
    • 2008-07-31
    • Bin ZhaoJack W. CornishBrian B. HorngAndrew M KameyaJan KrellnerKenneth C. KwokVictor K. LeeWeizhuang W. Xin
    • Bin ZhaoJack W. CornishBrian B. HorngAndrew M KameyaJan KrellnerKenneth C. KwokVictor K. LeeWeizhuang W. Xin
    • G09G3/32
    • H05B33/0815H05B33/0827H05B33/086
    • Disclosed are example techniques for frame-based power management in a light emitting diode (LED) system having a plurality of LED strings. A voltage source provides an output voltage to drive the LED strings. An LED driver generates a frame timing reference representative of the frame rate or display timing of a series of image frames to be displayed via the LED system. An update reference is generated from the frame timing reference. The LED driver monitors one or more operating parameters of the LED system. In response to update triggers marked by the update reference, the LED driver adjusts the output voltage of the voltage source based on the status of each of the one or more monitored operating parameters (either from the previous update period or determined in response to the update trigger), thereby synchronizing the updating of the output voltage to the frame rate (or a virtual approximation of the frame rate) of the video being displayed.
    • 公开了具有多个LED串的发光二极管(LED)系统中用于基于帧的电源管理的示例技术。 电压源提供输出电压来驱动LED串。 LED驱动器生成表示要通过LED系统显示的一系列图像帧的帧速率或显示定时的帧定时参考。 从帧定时参考生成更新参考。 LED驱动器监视LED系统的一个或多个操作参数。 响应于由更新参考标记的更新触发器,LED驱动器基于一个或多个监视的操作参数中的每一个的状态来调节电压源的输出电压(从先前的更新周期或响应于更新确定) 触发),从而将输出电压的更新同步于正在显示的视频的帧速率(或帧速率的虚拟近似)。
    • 16. 发明授权
    • LED driver with segmented dynamic headroom control
    • LED驱动器采用分段动态净空控制
    • US08115414B2
    • 2012-02-14
    • US12363179
    • 2009-01-30
    • Bin ZhaoJack W. CornishBrian B. HorngVictor K. LeeAndrew M. Kameya
    • Bin ZhaoJack W. CornishBrian B. HorngVictor K. LeeAndrew M. Kameya
    • H05B37/02
    • H05B33/0815H05B33/0827
    • Techniques for dynamic headroom control in a light emitting diode (LED) system are disclosed. An output voltage is provided to drive a plurality of LED strings. A feedback controller monitors the tail voltages of the LED strings to identify the minimum tail voltage and adjusts the output voltage based on the lowest tail voltage. The LED strings grouped into subsets and the feedback controller is segmented such that, for a certain duration, a minimum tail voltage is determined for each subset. The minimum tail voltages of the subsets are used to determine the overall minimum tail voltage of the plurality of LED strings for the certain duration so as to control the output voltage in the following duration. The segments of the feedback controller can be implemented in separate integrated circuit (IC) packages, thereby facilitating adaptation to different numbers of LED strings by integrating the corresponding number of IC packages.
    • 公开了一种用于发光二极管(LED)系统中的动态裕量控制技术。 提供输出电压以驱动多个LED串。 反馈控制器监视LED串的尾部电压,以识别最小尾电压,并根据最低的尾部电压调节输出电压。 将LED串分组成子集,并且反馈控制器被分段,使得在一定持续时间内,为每个子集确定最小尾电压。 子集的最小尾电压用于在特定持续时间内确定多个LED串的总体最小尾电压,以便在随后的持续时间内控制输出电压。 反馈控制器的段可以在单独的集成电路(IC)封装中实现,从而通过集成相应数量的IC封装来促进适应不同数量的LED串。
    • 18. 发明授权
    • Peak detection with digital conversion
    • 峰值检测与数字转换
    • US08040079B2
    • 2011-10-18
    • US12424326
    • 2009-04-15
    • Bin Zhao
    • Bin Zhao
    • H05B37/02
    • G01R19/2506H05B33/0815H05B33/0827
    • A peak detection/digitization circuit includes a plurality of level detect units, each having a comparator and a flip-flop with a clock input responsive to the output of the comparator. For a detection period, each level detect unit configures a data output signal of the flip-flop to a first data state responsive to a start of the detection period. Further, each level detect unit is configured to enable the comparator responsive to the data output signal having the first data state or a second data state, respectively. While the comparator is enabled during the detection period, the level detect unit configures the data output signal of the flip-flop responsive to a comparison of an input signal to a corresponding reference voltage level by the comparator. The data output signals of the flip-flops of the level detect units at the end of the detection period are used to determine a digital value representative of a peak voltage level of the input signal.
    • 峰值检测/数字化电路包括多个电平检测单元,每个电平检测单元具有响应于比较器的输出的具有时钟输入的比较器和触发器。 对于检测周期,响应于检测周期的开始,每个电平检测单元将触发器的数据输出信号配置为第一数据状态。 此外,每个电平检测单元被配置为使得比较器能够分别响应于具有第一数据状态或第二数据状态的数据输出信号。 当在检测期间比较器被使能时,电平检测单元响应于比较器将输入信号与相应参考电压电平的比较来配置触发器的数据输出信号。 在检测周期结束时,电平检测单元的触发器的数据输出信号用于确定表示输入信号的峰值电压电平的数字值。
    • 19. 发明申请
    • PULSE WIDTH MODULATION WITH EFFECTIVE HIGH DUTY RESOLUTION
    • 具有有效高分辨率的脉冲宽度调制
    • US20110193648A1
    • 2011-08-11
    • US12703239
    • 2010-02-10
    • Bin Zhao
    • Bin Zhao
    • H03K7/08
    • H03K7/08H02M1/084H04N9/3123H05B33/0818H05B33/0845Y02B20/346
    • A pulse width modulation (PWM) signal generator generates a PWM signal having a specified effective PWM duty resolution for a corresponding cycle window. The PWM signal generator receives an N-bit value representing a duty to be implemented and sets values X and Y to the M least significant bits and the N-M most significant bits, respectively, of the N-bit value. The value M can be determined based on the value N and a maximum implementable frequency of a clock signal used to time the generation of each PWM cycle. The PWM signal generator generates a cycle window of 2M PWM cycles, each PWM cycle of the cycle window having a duty of either Y or Y+1. The number of PWM cycles in the cycle window having the duty Y+1 is based on the value X and the PWM cycles having a particular duty are contiguous within the cycle window.
    • 脉冲宽度调制(PWM)信号发生器产生对于相应的周期窗口具有指定的有效PWM占空比分辨率的PWM信号。 PWM信号发生器接收表示要实现的占空比的N位值,并将值X和Y分别设置为N位值的M个最低有效位和N-M个最高有效位。 可以基于用于时间产生每个PWM周期的时钟信号的值N和最大可实施频率来确定值M. PWM信号发生器产生2M个PWM周期的周期窗口,周期窗口的每个PWM周期具有Y或Y + 1的占空比。 具有占空比Y + 1的周期窗口中的PWM周期的数量基于值X,并且具有特定占空比的PWM周期在周期窗口内是连续的。