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11. 发明授权

US08688898B2 Memory device configured to execute plural access commands in parallel and memory access method therefor 失效
标题翻译：被配置为并行地执行多个访问命令的存储器件及其存储器访问方法
公开(公告)号：US08688898B2
公开(公告)日：2014-04-01
申请号：US13226271
申请日：2011-09-06
申请人： Yoko Masuo , Taichiro Yamanaka , Hironobu Miyamoto
发明人： Yoko Masuo , Taichiro Yamanaka , Hironobu Miyamoto
IPC分类号： G06F12/00
CPC分类号： G06F13/16
摘要： According to one embodiment, a memory device includes a memory, a memory interface, a command generator, an access command returning module and a command progress manager. The memory interface accesses the memory in parallel in accordance with access commands. The command generator speculatively issues access commands to the memory interface. The access command returning module returns access commands already issued to the memory interface and unexecuted at a time of occurrence of an error, through corresponding purge responses. The command progress manager updates command progress management information such that the command progress management information indicates the oldest one of the unexecuted access commands. The command generator reissues the returned unexecuted access commands to the memory interface based on the updated command progress management information.
摘要翻译：根据一个实施例，存储器装置包括存储器，存储器接口，命令发生器，访问命令返回模块和命令进度管理器。存储器接口根据访问命令并行访问存储器。命令生成器推测地向存储器接口发出访问命令。访问命令返回模块返回已发送到存储器接口的访问命令，并通过相应的清除响应在发生错误时执行。命令进度管理器更新命令进度管理信息，使得命令进度管理信息指示未执行的访问命令中最早的一个。命令生成器基于更新的命令进度管理信息将返回的未执行的访问命令重新发送到存储器接口。

12. 发明授权

US08583859B2 Storage controller for wear-leveling and compaction and method of controlling thereof 有权
标题翻译：用于磨损平整和压实的存储控制器及其控制方法
公开(公告)号：US08583859B2
公开(公告)日：2013-11-12
申请号：US13154203
申请日：2011-06-06
申请人： Yoko Masuo , Hironobu Miyamoto , Wataru Okamoto
发明人： Yoko Masuo , Hironobu Miyamoto , Wataru Okamoto
IPC分类号： G06F12/16
CPC分类号： G06F12/0246 , G06F2212/7211
摘要： According to one embodiment, a storage controller includes a condition storage, a determination module, a wear-leveling block retainer, and a data transfer controller. The condition storage is provided in a storage including a plurality of blocks, and stores block condition information including at least one of erasure time information indicating when data is erased last time and erasure count information indicating the number of times data is erased. The determination module determines whether there is a block that requires wear leveling based on the block condition information. The wear-leveling block retainer retains block identification information that identifies a block determined to require wear leveling. The data transfer controller performs compaction to transfer data stored in blocks of the storage for collecting the data in a block, and, when the block identification information is retained, transfers data stored in the block identified by the block identification information.
摘要翻译：根据一个实施例，存储控制器包括条件存储器，确定模块，磨损均衡块保持器和数据传输控制器。条件存储被提供在包括多个块的存储器中，并且存储包括指示上次擦除数据的擦除时间信息中的至少一个的块条件信息，以及指示擦除次数数据的擦除计数信息。确定模块基于块条件信息确定是否存在需要磨损均衡的块。磨损平整块保持器保持块识别信息，其识别确定为需要磨损均匀化的块。数据传输控制器执行压缩以将存储在存储器块中的数据传送到块中以收集数据，并且当块识别信息被保留时，传送存储在由块识别信息识别的块中的数据。

13. 发明授权

US09384124B2 Data storage device, memory control method, and electronic device with data storage device 有权
标题翻译：数据存储装置，存储器控制方法和具有数据存储装置的电子装置
公开(公告)号：US09384124B2
公开(公告)日：2016-07-05
申请号：US13720356
申请日：2012-12-19
申请人： Taichiro Yamanaka , Yoko Masuo , Hironobu Miyamoto
发明人： Taichiro Yamanaka , Yoko Masuo , Hironobu Miyamoto
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7205
摘要： According to one embodiment, a data storage device includes a first controller, a second controller, and a third controller. The first controller performs a control operation of writing data of a first data unit to a storage area in a flash memory and reading the data of the first data unit from the storage area. The second controller carries out migration processing of measuring a data amount of valid data stored in storage areas of a second data unit that is a data erase processing unit.
摘要翻译：根据一个实施例，数据存储设备包括第一控制器，第二控制器和第三控制器。第一控制器执行将第一数据单元的数据写入闪速存储器中的存储区域并从存储区域读取第一数据单元的数据的控制操作。第二控制器执行迁移处理，测量存储在作为数据擦除处理单元的第二数据单元的存储区域中的有效数据的数据量。

14. 发明申请

US20120311235A1 MEMORY SYSTEM HAVING MULTIPLE CHANNELS AND METHOD OF GENERATING READ COMMANDS FOR COMPACTION IN MEMORY SYSTEM 失效
标题翻译：具有多个通道的存储器系统和生成用于记忆系统压缩的读取命令的方法
公开(公告)号：US20120311235A1
公开(公告)日：2012-12-06
申请号：US13422947
申请日：2012-03-16
申请人： Yoko Masuo , Wataru Okamoto , Hironobu Miyamoto
发明人： Yoko Masuo , Wataru Okamoto , Hironobu Miyamoto
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/401 , G06F2212/7204
摘要： According to one embodiment, a valid-cluster search module searches valid clusters included in first blocks, in each of channels, for compaction. A read command generator generates read commands used to read, in parallel, valid clusters to be migrated to a second block. The valid clusters searched in each of the channels comprise the valid clusters to be migrated. The valid clusters to be migrated correspond to a number of clusters simultaneously written to the second block and to a second number of channels in a first number of channels. A determination module determines the second number of channels corresponding to read commands to be generated next based on a situation of issuance of the read commands.
摘要翻译：根据一个实施例，有效群集搜索模块搜索包括在每个信道中的第一块中的有效簇以用于压缩。读命令生成器生成用于并行读取要迁移到第二块的有效集群的读命令。在每个通道中搜索的有效集群包括要迁移的有效集群。要迁移的有效簇对应于同时写入第二块的多个簇和第一数量的信道中的第二数量的信道。确定模块基于读取命令的发布的情况来确定与下一个要生成的读取命令相对应的通道的第二数量。

15. 发明授权

US08772785B2 Semiconductor device, schottky barrier diode, electronic apparatus, and method of producing semiconductor device 有权
标题翻译：半导体器件，肖特基势垒二极管，电子器件，以及半导体器件的制造方法
公开(公告)号：US08772785B2
公开(公告)日：2014-07-08
申请号：US13141448
申请日：2009-11-26
申请人： Yasuhiro Okamoto , Hironobu Miyamoto , Yuji Ando , Tatsuo Nakayama , Takashi Inoue , Kazuki Ota , Kazuomi Endo
发明人： Yasuhiro Okamoto , Hironobu Miyamoto , Yuji Ando , Tatsuo Nakayama , Takashi Inoue , Kazuki Ota , Kazuomi Endo
IPC分类号： H01L29/15
CPC分类号： H01L29/872 , H01L29/08 , H01L29/2003 , H01L29/475
摘要： A semiconductor device includes semiconductor layers, an anode electrode, and a cathode electrode. The semiconductor layers include a composition change layer, the anode electrode is electrically connected to one of principal surfaces of the composition change layer through a formation of a Schottky junction between the anode electrode and a part of the semiconductor layers, the cathode electrode is electrically connected to the other of the principal surfaces of the composition change layer through a formation of a junction between the cathode electrode and another part of the semiconductor layers, the anode electrode and the cathode electrode are capable of applying a voltage to the composition change layer in a direction perpendicular to the principal surface.
摘要翻译：半导体器件包括半导体层，阳极电极和阴极电极。半导体层包括组成变化层，阳极电极通过在阳极电极和一部分半导体层之间形成肖特基结而与组合物变化层的主表面电连接，阴极电连接通过在阴极电极和另一部分半导体层之间形成接合而形成组合物变化层的另一个主表面，阳极电极和阴极电极能够向组合物变化层施加电压方向垂直于主表面。

16. 发明授权

US08725932B2 Memory system and method of controlling memory system 有权
标题翻译：内存系统和控制内存系统的方法
公开(公告)号：US08725932B2
公开(公告)日：2014-05-13
申请号：US13063255
申请日：2009-12-28
申请人： Hirokuni Yano , Hajime Yamazaki , Hironobu Miyamoto , Shinji Yonezawa
发明人： Hirokuni Yano , Hajime Yamazaki , Hironobu Miyamoto , Shinji Yonezawa
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F11/1435 , G06F11/1441 , G06F11/1471 , G06F2212/2022 , G06F2212/72 , G06F2212/7207 , G06F2212/7208 , G11C11/5621 , G11C16/0483
摘要： A first log indicating that a system is running is recorded in a second storage unit before a first difference log is recorded in the second storage unit after system startup, and a second log indicating that the system halts is recorded in the second storage unit following the difference log, at the time of normal system halt, and it is judged whether normal system halt has been performed or an incorrect power-off sequence has been performed last time, based on a recorded state of the first and second logs in the second storage unit, at the time of system startup, thereby detecting an incorrect power-off easily and reliably.
摘要翻译：在系统启动之前，将第一差异日志记录在第二存储单元中之前，将指示系统运行的第一日志记录在第二存储单元中，并且指示系统暂停的第二日志记录在第二存储单元之后差异日志，在正常系统停止时，基于第二存储器中的第一和第二日志的记录状态，判断是否正在执行正常系统暂停或者上次执行错误的断电顺序单元，在系统启动时，容易可靠地检测出不正确的断电。

17. 发明申请

US20130069071A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20130069071A1
公开(公告)日：2013-03-21
申请号：US13553759
申请日：2012-07-19
申请人： Takashi Inoue , Tatsuo Nakayama , Yasuhiro Okamoto , Hironobu Miyamoto
发明人： Takashi Inoue , Tatsuo Nakayama , Yasuhiro Okamoto , Hironobu Miyamoto
IPC分类号： H01L29/778 , H01L29/205
CPC分类号： H01L29/778 , H01L21/02458 , H01L21/0254 , H01L29/2003 , H01L29/205 , H01L29/4236 , H01L29/432 , H01L29/517 , H01L29/66431 , H01L29/66462 , H01L29/7783
摘要： Compression strains are generated at an interface between the cap layer and the barrier layer and an interface between the channel layer and the buffer layer and a tensile strain is generated at an interface between the barrier layer and the channel layer. Therefore, negative charge is higher than positive charge at the interface between the cap layer and the barrier layer and the interface between the channel layer and the buffer layer, while positive charge is higher than negative charge at the interface between the barrier layer and the channel. The channel layer has a stacked layer structure of a first layer, a second layer, and a third layer. The second layer has a higher electron affinity than those of the first layer and the third layer.
摘要翻译：在帽层和阻挡层之间的界面处产生压缩应变，并且在沟道层和缓冲层之间的界面处产生压缩应变，并且在阻挡层和沟道层之间的界面处产生拉伸应变。因此，负电荷高于帽层和阻挡层之间的界面处的正电荷以及沟道层与缓冲层之间的界面，而正电荷高于阻挡层和沟道之间的界面处的负电荷。沟道层具有第一层，第二层和第三层的堆叠层结构。第二层比第一层和第三层具有更高的电子亲和力。

18. 发明申请

US20120012995A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：US20120012995A1
公开(公告)日：2012-01-19
申请号：US13137927
申请日：2011-09-21
申请人： Naotaka Kuroda , Akio Wakejima , Masahiro Tanomura , Hironobu Miyamoto
发明人： Naotaka Kuroda , Akio Wakejima , Masahiro Tanomura , Hironobu Miyamoto
IPC分类号： H01L23/34
CPC分类号： H01L23/367 , H01L23/373 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/072 , H01L2223/6644 , H01L2224/45144 , H01L2224/48091 , H01L2224/48095 , H01L2224/48137 , H01L2224/48247 , H01L2224/49 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01019 , H01L2924/01029 , H01L2924/0103 , H01L2924/01031 , H01L2924/01033 , H01L2924/01042 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12041 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/14 , H01L2924/1423 , H01L2924/16195 , H01L2924/351 , H01L2924/00014 , H01L2924/00
摘要： A semiconductor device includes a semiconductor element having a rectangular two-dimensional geometry and serving as a heat source, a first heat sink section including the semiconductor element mounted thereon, and a second heat sink section joined to an opposite side of the first heat sink section that includes the semiconductor element. A relation among directional components of thermal conductivity is K1yy≧K1xx>K1zz, where directional components of a three-dimensional thermal conductivity of the heat sink section in X, Y, and Z directions are determined as Kxx, Kyy, and Kzz. A relation among directional components of a thermal conductivity of the second heat sink section is K2zz≧K2yy>K2xx or K2yy≧K2zz>K2xx, where the directional components of the thermal conductivity of the second heat sink section in X, Y, and X directions are determined as K2xx, K2yy, and K2zz.
摘要翻译：半导体器件包括具有矩形二维几何形状并用作热源的半导体元件，包括安装在其上的半导体元件的第一散热部分和与第一散热部分相对的一侧连接的第二散热部分其包括半导体元件。导热方向分量之间的关系为K1yy≥K1xx> K1zz，其中X，Y和Z方向上散热片部分的三维热导率的方向分量确定为Kxx，Kyy和Kzz。第二散热片部分的热导率的方向分量之间的关系为K2zz≥K2yy> K2xx或K2yy≥K2zz> K2xx，其中X，Y和X方向上第二散热片部分的热导率的方向分量被确定为K2xx，K2yy和K2zz。

19. 发明申请

US20110297954A1 SEMICONDUCTOR DEVICE, SCHOTTKY BARRIER DIODE, ELECTRONIC APPARATUS, AND METHOD OF PRODUCING SEMICONDUCTOR DEVICE 有权
标题翻译：半导体器件，肖特基二极管二极管，电子设备和生产半导体器件的方法
公开(公告)号：US20110297954A1
公开(公告)日：2011-12-08
申请号：US13141448
申请日：2009-11-26
申请人： Yasuhiro Okamoto , Hironobu Miyamoto , Yuji Ando , Tatsuo Nakayama , Takashi Inoue , Kazuki Ota , Kazuomi Endo
发明人： Yasuhiro Okamoto , Hironobu Miyamoto , Yuji Ando , Tatsuo Nakayama , Takashi Inoue , Kazuki Ota , Kazuomi Endo
IPC分类号： H01L29/20 , H01L21/329
CPC分类号： H01L29/872 , H01L29/08 , H01L29/2003 , H01L29/475
摘要： [Problem to be Solved] Provided is a semiconductor device in which the trade-off between the pressure resistance and the on-state resistance is improved and the performance is improved.[Solution] The semiconductor device 1 of the present invention comprises semiconductor layers 20 to 23, an anode electrode 12, and a cathode electrode 13, wherein the semiconductor layers include a composition change layer 23, the anode electrode 12 is electrically connected to one of principal surfaces of the composition change layer through a formation of a Schottky junction between the anode electrode 12 and a part of the semiconductor layers, the cathode electrode 13 is electrically connected to the other of the principal surfaces of the composition change layer through a formation of a junction between the cathode electrode 13 and another part of the semiconductor layers, the anode electrode 12 and the cathode electrode 13 are capable of applying a voltage to the composition change layer 23 in a direction perpendicular to the principal surface, andthe composition change layer 23 has composition that changes from a cathode electrode 13 side toward an anode electrode 12 side in the direction perpendicular to the principal surface of the composition change layer, has a negative polarization charge that is generated due to the composition that changes, and contains a donor impurity.
摘要翻译： [待解决的问题]提供了一种半导体器件，其中改善了耐压性和通态电阻之间的折衷，并提高了性能。 [解决方案]本发明的半导体器件1包括半导体层20至23，阳极电极12和阴极电极13，其中半导体层包括组成变化层23，阳极电极12电连接到通过在阳极12和半导体层的一部分之间形成肖特基结，组成变化层的主表面通过形成阴极电极13而与组合物改变层的另一个主表面电连接阴极电极13和半导体层的另一部分之间的接合点，阳极电极12和阴极电极13能够在垂直于主表面的方向上向组合物变化层23施加电压，并且组成变化层 23具有从阴极电极13侧向阳极电极12侧变化的组成具有垂直于组成变化层的主表面的方向具有由于组成变化而产生并且包含施主杂质的负极化电荷。

20. 发明授权

US07973335B2 Field-effect transistor having group III nitride electrode structure 失效
标题翻译：具有III族氮化物电极结构的场效应晶体管
公开(公告)号：US07973335B2
公开(公告)日：2011-07-05
申请号：US10538739
申请日：2003-12-15
申请人： Yasuhiro Okamoto , Hironobu Miyamoto , Yuji Ando , Tatsuo Nakayama , Takashi Inoue , Masaaki Kuzuhara
发明人： Yasuhiro Okamoto , Hironobu Miyamoto , Yuji Ando , Tatsuo Nakayama , Takashi Inoue , Masaaki Kuzuhara
IPC分类号： H01L31/072
CPC分类号： H01L29/402 , H01L29/2003 , H01L29/42316 , H01L29/7787
摘要： A field plate portion (5) overhanging a drain side in a visored shape is formed in a gate electrode (2). A multilayered film including a SiN film (21) and a SiO2 film (22) is formed beneath the field plate portion (5). The SiN film (21) is formed so that a surface of an AlGaN electron supply layer (13) is covered therewith.
摘要翻译：在栅电极（2）中形成有以遮挡形状突出于漏极侧的场板部（5）。在场板部（5）的下方形成有SiN膜（21）和SiO 2膜（22）的多层膜。形成SiN膜（21），使得AlGaN电子供给层（13）的表面被覆盖。

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