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    • 11. 发明授权
    • Power supply system for motherboard
    • 主板供电系统
    • US07746044B2
    • 2010-06-29
    • US11829099
    • 2007-07-27
    • Ying ChenJin-Liang Xiong
    • Ying ChenJin-Liang Xiong
    • G05F1/40H02J1/00
    • G06F1/28
    • A power supply system for a motherboard includes a voltage regulator circuit includes a system power source, and a voltage output terminal, a sampling circuit having an input, and an output receiving a high level sleep signal from a south bridge of the motherboard, a switching circuit having an input, and an output, a power connector having a control terminal connected to the output of the switching circuit, and a power source being connected to the power connector. When the voltage regulator circuit outputs a voltage greater than a predetermined stable voltage to the sampling circuit, the sampling circuit outputs a low level signal to the switching circuit which in return outputs a high level signal to the control terminal of the power connector to cut off power supply from the power source to the system power source.
    • 一种用于母板的电源系统包括:电压调节器电路,包括系统电源和电压输出端子,具有输入的采样电路和从主板的南桥接收高电平睡眠信号的输出;开关 具有输入的电路和输出端,具有连接到开关电路的输出的控制端子的电源连接器以及连接到电源连接器的电源。 当电压调节器电路向采样电路输出大于预定的稳定电压的电压时,采样电路向开关电路输出低电平信号,输出高电平信号到电源连接器的控制端以切断 电源从电源到系统电源。
    • 12. 发明授权
    • Fan failure alarm device
    • 风扇故障报警装置
    • US07639152B2
    • 2009-12-29
    • US11858122
    • 2007-09-20
    • Ying ChenJin-Liang Xiong
    • Ying ChenJin-Liang Xiong
    • G08B21/00
    • G06F1/206G06F11/0772
    • A fan failure alarm device includes a first digital-analog converting circuit (200), a first diode (D11), a switching circuit (260), an input-output (I/O) controller (U11), and an alarm circuit (270). The first digital-analog converting circuit receives a digital pulse signal from a first fan, and outputs a direct current (DC) voltage signal at an output terminal. The first diode with a cathode coupled to the output terminal of the first digital-analog converting circuit, the first diode turns on when the first fan stops rotating. The switching circuit with an input terminal coupled to an anode of the first diode, outputs a first control signal when the fan rotates normally and outputs a second control signal when the fan stops rotating. The input-output (I/O) controller receives the first and second control signals from the switching circuit, and outputs an alarm signal when receives the second control signal. The alarm circuit receives the alarm signal from the I/O controller, and activates an alarm.
    • 风扇故障报警装置包括第一数模转换电路(200),第一二极管(D11),开关电路(260),输入输出(I / O)控制器(U11)和报警电路 270)。 第一数模转换电路从第一风扇接收数字脉冲信号,并在输出端输出直流(DC)电压信号。 具有阴极的第一二极管耦合到第一数字 - 模拟转换电路的输出端,当第一个风扇停止转动时,第一个二极管导通。 具有耦合到第一二极管的阳极的输入端的开关电路在风扇正常转动时输出第一控制信号,并且当风扇停止转动时输出第二控制信号。 输入输出(I / O)控制器从开关电路接收第一和第二控制信号,并在接收到第二控制信号时输出报警信号。 报警电路从I / O控制器接收报警信号,并启动报警。
    • 19. 发明申请
    • CONSTRAINED DEPTH INTRA MODE CODING FOR 3D VIDEO CODING
    • 用于3D视频编码的约束深度内部模式编码
    • US20170006309A1
    • 2017-01-05
    • US15125549
    • 2014-03-13
    • Hongbin LIUYing CHENQUALCOMM INCORPORATED
    • Hongbin LiuYing Chen
    • H04N19/597H04N19/11H04N19/176H04N19/119H04N19/70H04N19/96
    • This disclosure describes techniques for constraining depth intra mode coding in a three-dimensional (3D) video coding process, such as 3D-High Efficiency Video Coding (3D-HEVC). In some examples, the techniques for constraining depth intra mode coding may prevent transform tree nodes from being split into sub-transform tree nodes when a depth prediction unit that corresponds to the transform tree node is predicted according to a depth modeling mode (DMM). In further examples, the techniques for constraining depth intra mode coding may prevent the DMM mode from being used when the maximum transform unit size that corresponds to a depth prediction unit is greater than the size of the depth prediction unit. The techniques for constraining depth intra mode coding may prevent characteristics of the DMM prediction modes used in 3D-HEVC and characteristics of the transform tree subdivision used in 3D-HEVC from interfering with each other.
    • 本公开描述了在3D-高效率视频编码(3D-HEVC)三维(3D)视频编码处理中约束深度帧内模式编码的技术。 在一些示例中,当根据深度建模模式(DMM)预测与变换树节点对应的深度预测单元时,用于约束深度帧内模式编码的技术可以防止变换树节点被分割成子变换树节点。 在另外的例子中,当对应于深度预测单元的最大变换单位大小大于深度预测单元的大小时,用于约束深度帧内模式编码的技术可以防止DMM模式被使用。 限制深度帧内模式编码的技术可以防止在3D-HEVC中使用的DMM预测模式的特征和在3D-HEVC中使用的变换树细分的特征彼此干扰。
    • 20. 发明申请
    • SIMPLIFIED SUB-PREDICTION UNIT (SUB-PU) MOTION PARAMETER INHERITENCE (MPI)
    • 简化子预测单元(SUB-PU)运动参数不确定度(MPI)
    • US20160366442A1
    • 2016-12-15
    • US15119057
    • 2014-03-07
    • Hongbin LIUQUALCOMM INCORPORATEDYing CHEN
    • Hongbin LiuYing Chen
    • H04N19/597H04N19/52
    • This disclosure describes techniques for simplifying depth inter mode coding in a three-dimensional (3D) video coding process, such as 3D-HEVC. The techniques include generating a motion parameter candidate list, e.g., merging candidate list, for a current depth prediction unit (PU). In some examples, the described techniques include determining that a sub-PU motion parameter inheritance (MPI) motion parameter candidate is unavailable for inclusion in the motion parameter candidate list for the current depth PU if motion parameters of a co-located texture block to a representative block of the current depth PU are unavailable. In some examples, the described techniques include deriving a sub-PU MPI candidate for inclusion in the motion parameter candidate list for the current depth PU only if a partition mode of the current depth PU is 2N×2N.
    • 本公开描述了用于简化3D-HEVC等三维(3D)视频编码处理中的深度帧间编码的技术。 这些技术包括为当前深度预测单元(PU)生成运动参数候选列表,例如合并候选列表。 在一些示例中,所描述的技术包括确定如果将位于同一个位置的纹理块的运动参数传送到一个或多个运动参数继承(MPI)运动参数候选者的运动参数,则不能使用用于当前深度PU的运动参数候选列表 当前深度PU的代表块不可用。 在一些示例中,所描述的技术包括仅当当前深度PU的分区模式是2N×2N时,才导出用于当前深度PU的运动参数候选列表中的子PU MPI候选。