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11. 发明申请

US20120299616A1 CIRCUIT AND METHOD TO CONTROL SLEW RATE OF A CURRENT-MODE LOGIC OUTPUT DRIVER 有权
标题翻译：用于控制电流模式逻辑输出驱动器的电流的电路和方法
公开(公告)号：US20120299616A1
公开(公告)日：2012-11-29
申请号：US13114479
申请日：2011-05-24
申请人： Xin Liu , Arvind Bomdica , Ming-Ju Edward Lee
发明人： Xin Liu , Arvind Bomdica , Ming-Ju Edward Lee
IPC分类号： H03K5/01
CPC分类号： H03K5/01 , H04L25/0272 , H04L25/0282
摘要： A method is provided for selecting at least one of a plurality of slew rate control settings based at least upon a speed of data transmission and receiving input data where the input data is received at the data transmission speed. The method also includes switching the received input data in accordance with the selected at least one of a plurality of slew rate control settings and sending output data at the data transmission speed. Also provided is data driver device that includes at least one activation portion comprising one or more slew rate controls, a voltage-mode driver portion and at least a first current-mode driver portion. Also provided is a computer readable storage device encoded with data for adapting a manufacturing facility to create the data driver device. Also provided is a system including the data driver device, a data storage device and a processor device.
摘要翻译：提供了一种至少根据数据传输的速度选择多个转换速率控制设置中的至少一个并接收以数据传输速度接收输入数据的输入数据的方法。该方法还包括根据所选择的多个转换速率控制设置中的至少一个切换所接收的输入数据，并以数据传输速度发送输出数据。还提供了数据驱动器装置，其包括至少一个包括一个或多个转换速率控制的激活部分，电压模式驱动器部分和至少第一电流模式驱动器部分。还提供了一种用数据编码的计算机可读存储设备，用于使制造设施适配以创建数据驱动器设备。还提供了包括数据驱动器装置，数据存储装置和处理器装置的系统。

12. 发明授权

US08102632B2 Electrostatic discharge power clamp trigger circuit using low stress voltage devices 有权
标题翻译：静电放电电源钳位触发电路采用低应力电压器件
公开(公告)号：US08102632B2
公开(公告)日：2012-01-24
申请号：US12406684
申请日：2009-03-18
申请人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
发明人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
IPC分类号： H02H9/00 , H01C7/12 , H02H1/00 , H02H1/04 , H02H3/22 , H02H9/06
CPC分类号： H03K19/00315
摘要： Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin interface, a voltage drop network coupled to the IO pin and comprising a plurality of forward-biased diodes connected in series to drop a high voltage on the IO pin to a low voltage level, an NMOS shunt transistor coupled between the voltage drop network and a ground terminal, and a trigger circuit coupled to the NMOS shunt transistor to activate the shunt transistor when a sensed input voltage rise time is shorter than a defined supply voltage rise time.
摘要翻译：描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路，以保护IC免受过多的电源电压和ESD电压的影响。每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。实施例的保护电路包括高电压IO引脚接口，耦合到IO引脚的电压降网络，并且包括串联连接的多个正向偏置二极管以将IO引脚上的高电压降低到低电压电平，耦合在所述电压降网络和接地端子之间的NMOS分流晶体管，以及耦合到所述NMOS分流晶体管的触发电路，以在感测到的输入电压上升时间短于限定的电源电压上升时间时激活所述并联晶体管。

13. 发明申请

US20100238598A1 Electrostatic Discharge Power Clamp Trigger Circuit Using Low Stress Voltage Devices 有权
标题翻译：使用低应力电压器件的静电放电电源钳位触发电路
公开(公告)号：US20100238598A1
公开(公告)日：2010-09-23
申请号：US12406684
申请日：2009-03-18
申请人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
发明人： Yikai Liang , Arvind Bomdica , Samudyatha Suryanarayana , Gayatri Gopalan , Min Xu , Xin Liu , Ming-Ju Edward Lee
IPC分类号： H02H9/04 , G06F17/00
CPC分类号： H03K19/00315
摘要： Embodiments of an IC protection circuit that protects low voltage supply transistors and circuits within the IC from excessive power supply levels and ESD events are described. A protection circuit situated between the IO pins of the IC and the internal circuitry of the IC includes a voltage drop network and a plurality of shunt circuits to protect the IC against excessive supply voltages and ESD voltages. Each shunt circuit includes an RC trigger stage and an NMOS shunt stage that are made using low-voltage devices. A protection circuit of the embodiments includes a high voltage IO pin interface, a voltage drop network coupled to the IO pin and comprising a plurality of forward-biased diodes connected in series to drop a high voltage on the IO pin to a low voltage level, an NMOS shunt transistor coupled between the voltage drop network and a ground terminal, and a trigger circuit coupled to the NMOS shunt transistor to activate the shunt transistor when a sensed input voltage rise time is shorter than a defined supply voltage rise time.
摘要翻译：描述了保护IC内的低压电源晶体管和电路免受过多电源电平和ESD事件的IC保护电路的实施例。位于IC的IO引脚和IC内部电路之间的保护电路包括一个压降网络和多个分流电路，以保护IC免受过多的电源电压和ESD电压的影响。每个并联电路包括使用低电压器件制造的RC触发级和NMOS分流级。实施例的保护电路包括高电压IO引脚接口，耦合到IO引脚的电压降网络，并且包括串联连接的多个正向偏置二极管以将IO引脚上的高电压降低到低电压电平，耦合在所述电压降网络和接地端子之间的NMOS分流晶体管，以及耦合到所述NMOS分流晶体管的触发电路，以在感测到的输入电压上升时间短于限定的电源电压上升时间时激活所述并联晶体管。

14. 发明授权

US08760196B2 Squelch detection method and circuit using dual rectifying circuit for detecting out-of-band signal 有权
标题翻译：采用双路整流电路的静噪检测方法和电路，用于检测带外信号
公开(公告)号：US08760196B2
公开(公告)日：2014-06-24
申请号：US13316724
申请日：2011-12-12
申请人： Xin Liu , Arvind Bomdica
发明人： Xin Liu , Arvind Bomdica
IPC分类号： H03K5/22
CPC分类号： H03F3/45179 , H03F3/45632 , H03F3/505 , H03F2200/78 , H03F2203/45394 , H03F2203/45418 , H03F2203/45478 , H03F2203/45562 , H03F2203/45648
摘要： A circuit for detecting out-of-band signals is disclosed. In one embodiment, the circuit includes a first differential circuit configured to level shift and positively rectify a differential input signal to produce a first output component of a differential output signal. The detector further includes a second differential circuit configured to level shift and negatively rectify the differential input signal to produce a second output component of the differential output signal. A third differential circuit is configured to level shift and output first and second fixed voltages based on an input reference voltage and a ground voltage. The circuit is configured to provide the differential output signal and the first and second fixed voltages to an indicator circuit configured to assert an indication responsive to detecting that a differential voltage of the differential output signal is greater than a differential voltage of the first and second fixed voltages.
摘要翻译：公开了一种用于检测带外信号的电路。在一个实施例中，电路包括第一差分电路，其被配置为对差分输入信号进行电平移位和正整流以产生差分输出信号的第一输出分量。检测器还包括第二差分电路，其被配置为对差分输入信号进行电平偏移和负整流，以产生差分输出信号的第二输出分量。第三差分电路被配置为基于输入参考电压和接地电压来电平移位和输出第一和第二固定电压。电路被配置为将差分输出信号和第一和第二固定电压提供给指示器电路，该指示器电路被配置为响应于检测到差分输出信号的差分电压大于第一和第二固定的差分电压而断言指示电压。

15. 发明申请

US20130147556A1 Squelch Detection Method and Circuit Using Rectifying Circuit for Detecting Out-of-Band Signal 有权
标题翻译：用于检测带外信号的整流电路的静噪检测方法和电路
公开(公告)号：US20130147556A1
公开(公告)日：2013-06-13
申请号：US13316737
申请日：2011-12-12
申请人： Xin Liu , Arvind Bomdica
发明人： Xin Liu , Arvind Bomdica
IPC分类号： H03F3/45
CPC分类号： H03F3/45179 , H03F3/45632 , H03F3/505 , H03F2200/78 , H03F2203/45394 , H03F2203/45418 , H03F2203/45478 , H03F2203/45562 , H03F2203/45648
摘要： A circuit for detecting out-of-band signals is disclosed. In one embodiment, the circuit includes a first differential circuit configured to level shift and positively rectify a differential input signal to produce a first output component of a differential output signal. The first differential circuit is further configured to generate and provide a common mode voltage of the differential input signal as a second component of the differential output signal. The circuit further includes a second differential circuit configured to level shift and output first and second fixed voltages based on an input reference voltage and a ground voltage. The circuit is configured to provide the differential output signal and the first and second fixed voltages to an indicator circuit configured to assert an indication responsive to detecting that a differential voltage of the differential output signal is greater than a differential voltage of the first and second fixed voltages.
摘要翻译：公开了一种用于检测带外信号的电路。在一个实施例中，电路包括第一差分电路，其被配置为对差分输入信号进行电平移位和正整流以产生差分输出信号的第一输出分量。第一差分电路还被配置为产生并提供差分输入信号的共模电压作为差分输出信号的第二分量。该电路还包括第二差分电路，其被配置为基于输入参考电压和接地电压来电平移位和输出第一和第二固定电压。电路被配置为将差分输出信号和第一和第二固定电压提供给指示器电路，该指示器电路被配置为响应于检测到差分输出信号的差分电压大于第一和第二固定的差分电压而断言指示电压。

16. 发明申请

US20130147554A1 LOW-POWER HIGH-GAIN MULTISTAGE COMPARATOR CIRCUIT 有权
标题翻译：低功耗高增益多电路比较器电路
公开(公告)号：US20130147554A1
公开(公告)日：2013-06-13
申请号：US13316488
申请日：2011-12-10
申请人： Xin Liu , Arvind Bomdica , Yikai Liang
发明人： Xin Liu , Arvind Bomdica , Yikai Liang
IPC分类号： H03F3/45
CPC分类号： H03F3/3022 , H03F3/45183 , H03F2203/45644 , H03F2203/45674 , H03F2203/45676
摘要： A method is provided for receiving a differential signal pair input at a first circuit stage and converting the differential signal pair input to a single-ended signal at a second circuit stage. The method also provides for receiving an output of the first circuit stage and an output of the second stage at a third circuit stage and transmitting an amplified signal output from the third circuit stage. The method allows for a 60 dB signal gain or more. A circuit is also provided that includes multiple circuit stages that can provide signal gain to an input differential signal pair. The circuit converts the differential pair into a single-ended signal and transmits the amplified signal as an output. The circuit provides the signal gain without using a current mirror. A computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus is also provided.
摘要翻译：提供一种用于接收在第一电路级输入的差分信号对，并在第二电路级将差分信号对输入转换为单端信号的方法。该方法还提供在第三电路级接收第一电路级的输出和第二级的输出，并且传输从第三电路级输出的放大信号。该方法允许60dB的信号增益或更多。还提供了一种电路，其包括可向输入差分信号对提供信号增益的多个电路级。电路将差分对转换为单端信号，并将放大的信号作为输出发送。该电路在不使用电流镜的情况下提供信号增益。还提供了一种用于适配制造设备以创建设备的数据编码的计算机可读存储设备。

17. 发明申请

US20130058429A1 TRANSMITTER EQUALIZATION METHOD AND CIRCUIT USING UNIT-SIZE AND FRACTIONAL-SIZE SUBDRIVERS IN OUTPUT DRIVER FOR HIGH-SPEED SERIAL INTERFACE 有权
标题翻译：用于高速串行接口的输出驱动器中的发送器均衡方法和电路使用单位尺寸和分尺寸子
公开(公告)号：US20130058429A1
公开(公告)日：2013-03-07
申请号：US13227356
申请日：2011-09-07
申请人： Xin Liu , Arvind Bomdica
发明人： Xin Liu , Arvind Bomdica
IPC分类号： H04L27/00
CPC分类号： H04L25/03878 , H04L25/03343
摘要： A method is provided for controlling a data transmission device that includes at least one fractional-sized subdriver. The method includes enabling at least one subdriver and driving a differential signal pair output. Also provided is a device with an output driver having a plurality of subdrivers where at least one subdriver is fractional-sized. The device also includes a de-emphasis portion configured to enable and disable the subdrivers. The device is configured to drive an output data signal. Also provided is a computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus such as the device. Also provided is an apparatus that includes an output driver with at least one fractional-sized subdriver and a de-emphasis portion configured to enable and disable the subdrivers of the output driver. The output driver is configured to drive a differential output data signal.
摘要翻译：提供一种用于控制数据传输设备的方法，所述数据传输设备包括至少一个分数大小的子机。该方法包括启用至少一个子驱动器和驱动差分信号对输出。还提供了一种具有输出驱动器的装置，其具有多个子驱动器，其中至少一个子驱动器是分数尺寸的。该设备还包括被配置为启用和禁用子驱动器的去加重部分。该器件配置为驱动输出数据信号。还提供了一种用数据编码的计算机可读存储设备，用于使制造设备适配以创建诸如设备的设备。还提供了一种装置，其包括具有至少一个分数大小的子驱动器的输出驱动器和被配置为启用和禁用输出驱动器的子驱动器的去加重部分。输出驱动器配置为驱动差分输出数据信号。

18. 发明申请

US20130057320A1 LOW-POWER WIDE-TUNING RANGE COMMON-MODE DRIVER FOR SERIAL INTERFACE TRANSMITTERS 有权
标题翻译：用于串行接口发射机的低功耗宽带调谐范围通用模式驱动器
公开(公告)号：US20130057320A1
公开(公告)日：2013-03-07
申请号：US13227250
申请日：2011-09-07
申请人： Xin Liu , Arvind Bomdica
发明人： Xin Liu , Arvind Bomdica
IPC分类号： H03K3/00
CPC分类号： H04L25/0276
摘要： A method is provided for controlling a data transmission device. The method includes providing a reference voltage to the common mode driver and putting the data transmission device in a low power state. The method also includes driving a differential signal pair output from the common mode driver during a portion of the low power state. Also provided is a device that includes a data output driver portion configured to drive an output signal at a common mode voltage and a data output driver portion configured to drive an output signal at a differential voltage level during at least a portion of time when the device is not in a low power state. Also provided is a computer readable storage device encoded with data for adapting a manufacturing facility to create the device. Also provided is an apparatus configured to perform the method.
摘要翻译：提供了一种用于控制数据传输设备的方法。该方法包括向共模驱动器提供参考电压并将数据传输设备置于低功率状态。该方法还包括在低功率状态的一部分期间驱动从共模驱动器输出的差分信号对。还提供了一种装置，其包括被配置为以共模电压驱动输出信号的数据输出驱动器部分和数据输出驱动器部分，所述数据输出驱动器部分被配置为在至少一部分时间内驱动具有差分电压电平的输出信号，不处于低功率状态。还提供了一种计算机可读存储设备，其被编码用于使制造设备适配以创建设备的数据。还提供了被配置为执行该方法的装置。

19. 发明申请

US20130057319A1 METHOD AND CIRCUIT FOR PRECISELY CONTROLLING AMPLITUDE OF CURRENT-MODE LOGIC OUTPUT DRIVER FOR HIGH-SPEED SERIAL INTERFACE 审中-公开
标题翻译：用于精确控制电流模式逻辑输出驱动器用于高速串行接口的方法和电路
公开(公告)号：US20130057319A1
公开(公告)日：2013-03-07
申请号：US13226371
申请日：2011-09-06
申请人： Xin Liu , Arvind Bomdica
发明人： Xin Liu , Arvind Bomdica
IPC分类号： H03K3/00
CPC分类号： H04L25/0282 , H04L25/0272
摘要： A method is provided for selecting a reference voltage value at a data transmission device that comprises a bias circuit and an output driver circuit. The method also includes providing a first electrical current at the bias circuit and a second electrical current at the output driver circuit. The second electrical current amplitude is approximately a multiple of the first electrical current amplitude, and the first electrical current is based on the reference voltage value. The method further includes driving a differential output the second electrical current. A circuit is also provided that includes a data output driver portion and a bias circuit portion. The bias circuit portion is a replica of the data output driver portion. The circuit is configured to drive a data signal. A computer readable storage device encoded with data for adapting a manufacturing facility to create an apparatus is also provided.
摘要翻译：提供一种用于在包括偏置电路和输出驱动器电路的数据传输装置处选择参考电压值的方法。该方法还包括在偏置电路处提供第一电流和在输出驱动器电路处提供第二电流。第二电流幅度大约是第一电流幅度的倍数，第一电流基于参考电压值。该方法还包括驱动差分输出第二电流。还提供了包括数据输出驱动器部分和偏置电路部分的电路。偏置电路部分是数据输出驱动器部分的副本。电路被配置为驱动数据信号。还提供了一种用于适配制造设备以创建设备的数据编码的计算机可读存储设备。

20. 发明授权

US08149024B2 Dual function voltage and current mode differential driver 有权
标题翻译：双功能电压和电流模式差分驱动器
公开(公告)号：US08149024B2
公开(公告)日：2012-04-03
申请号：US12633174
申请日：2009-12-08
申请人： Xin Liu , Arvind Bomdica , Yikai Liang , Ming-Ju Edward Lee , Rohit Rathi , Jinyung Namkoong
发明人： Xin Liu , Arvind Bomdica , Yikai Liang , Ming-Ju Edward Lee , Rohit Rathi , Jinyung Namkoong
IPC分类号： H03K3/00
CPC分类号： H03K19/018528 , H03K19/018585
摘要： A dual function differential driver includes a voltage mode differential driver portion and a current mode differential driver portion. Control circuitry is connected to the voltage mode differential driver portion and the current mode differential driver portion. The control circuitry switches the dual function differential driver between operation as a voltage mode differential driver and operation as a current mode differential driver.
摘要翻译：双功能差分驱动器包括电压模式差分驱动器部分和电流模式差分驱动器部分。控制电路连接到电压模式差分驱动器部分和电流模式差分驱动器部分。控制电路将双功能差分驱动器作为电压模式差分驱动器操作，并作为电流模式差分驱动器进行操作。

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