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11. 发明授权

US06368988B1 Combined gate cap or digit line and spacer deposition using HDP 失效
公开(公告)号：US06368988B1
公开(公告)日：2002-04-09
申请号：US09354572
申请日：1999-07-16
申请人： Weimin Li , Sujit Sharan , Gurtej Sandhu
发明人： Weimin Li , Sujit Sharan , Gurtej Sandhu
IPC分类号： H01L21318
CPC分类号： H01L29/6656 , C23C16/345 , C23C16/402 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/31612 , H01L21/3185 , H01L21/76832 , H01L21/76834 , H01L21/76885
摘要： A method for fabricating gate electrodes and gate interconnects with a protective silicon oxide or silicon nitride cap and spacer formed by high density plasma chemical vapor deposition (HDPCVD). Silicon oxide or silicon nitride is deposited in a reaction zone of a HDPCVD reactor while providing two or more selected substrate bias powers, source powers and/or selected gas mixtures to tailor the shape and thickness of the film for desired applications. In one embodiment, a low bias power of below 500 Watts is provided in a first stage HDPCVD and the bias power is then increased to between 500 and 3000 Watts for a second stage to produce a protective film having thin sidewall spacers for enhanced semiconductor device density and a relatively thick cap.

12. 发明申请

US20060270240A1 PROTECTION IN INTEGRATED CIRCUITS 失效
标题翻译：集成电路保护
公开(公告)号：US20060270240A1
公开(公告)日：2006-11-30
申请号：US11458064
申请日：2006-07-17
申请人： Neal Rueger , William Budge , Weimin Li
发明人： Neal Rueger , William Budge , Weimin Li
IPC分类号： H01L21/302
CPC分类号： H01L21/76235
摘要： A method including, prior to a plasma heat-up operation, forming a liner on structure coated with an insulator. And a method including forming a trench on a substrate, forming an insulator on the trench, and after forming a liner having a thickness of between about 50 angstroms and about 400 angstroms on the insulator, applying a plasma heat-up operation to the substrate.
摘要翻译：一种方法，包括在等离子体加热操作之前，在涂覆有绝缘体的结构上形成衬垫。以及一种方法，包括在衬底上形成沟槽，在沟槽上形成绝缘体，并且在形成绝缘体上具有介于约50埃至约400埃之间的厚度的衬垫之后，对衬底施加等离子体加热操作。

13. 发明授权

US06524975B2 Combined gate cap or digit line and spacer deposition using HDP 失效
公开(公告)号：US06524975B2
公开(公告)日：2003-02-25
申请号：US09989036
申请日：2001-11-21
申请人： Weimin Li , Sujit Sharan , Gurtej Sandhu
发明人： Weimin Li , Sujit Sharan , Gurtej Sandhu
IPC分类号： H01L21318
CPC分类号： H01L29/6656 , C23C16/345 , C23C16/402 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/31612 , H01L21/3185 , H01L21/76832 , H01L21/76834 , H01L21/76885
摘要： A method for fabricating gate electrodes and gate interconnects with a protective silicon oxide or silicon nitride cap and spacer formed by high density plasma chemical vapor deposition (HDPCVD). Silicon oxide or silicon nitride is deposited in a reaction zone of a HDPCVD reactor while providing two or more selected substrate bias powers, source powers and/or selected gas mixtures to tailor the shape and thickness of the film for desired applications. In one embodiment, a low bias power of below 500 Watts is provided in a first stage HDPCVD and the bias power is then increased to between 500 and 3000 Watts for a second stage to produce a protective film having thin sidewall spacers for enhanced semiconductor device density and a relatively thick cap.

14. 发明申请

US20060172079A1 Methods of forming intermediate semiconductor device structures using spin-on, photopatternable, interlayer dielectric materials 有权
公开(公告)号：US20060172079A1
公开(公告)日：2006-08-03
申请号：US11391774
申请日：2006-03-29
申请人： Weimin Li , Gurtej Sandhu
发明人： Weimin Li , Gurtej Sandhu
IPC分类号： C08J7/04 , H01L21/31
CPC分类号： G03F7/095 , G03F7/0757 , H01L21/02134 , H01L21/02137 , H01L21/02216 , H01L21/02222 , H01L21/02282 , H01L21/02348 , H01L21/311 , Y10T428/31663
摘要： A cap layer that enables a photopatternable, spin-on material to be used in the formation of semiconductor device structures at wavelengths that were previously unusable. The photopatternable, spin-on material is applied as a layer to a semiconductor substrate. The cap layer and a photoresist layer are each formed over the photopatternable layer. The cap layer absorbs or reflects radiation and protects the photopatternable layer from a first wavelength of radiation used in patterning the photoresist layer. The photopatternable, spin-on material is convertible to a silicon dioxide-based material upon exposure to a second wavelength of radiation.

15. 发明申请

US20060160375A1 Method of depositing a silicon dioxide-comprising layer in the fabrication of integrated circuitry, methods of forming trench isolation in the fabrication of integrated circuitry, Method of depositing silicon dioxide-comprising layers in the fabrication of integrated circuitry, and methods of forming bit line over capacitor arrays of memory cells 有权
标题翻译：在集成电路的制造中沉积含二氧化硅层的方法，在集成电路的制造中形成沟槽隔离的方法。在集成电路的制造中沉积含二氧化硅的层的方法以及形成位线的方法电容阵列的存储单元
公开(公告)号：US20060160375A1
公开(公告)日：2006-07-20
申请号：US11378825
申请日：2006-03-17
申请人： Weimin Li , Gurtej Sandhu
发明人： Weimin Li , Gurtej Sandhu
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/02145 , H01L21/02164 , H01L21/02214 , H01L21/02271 , H01L21/0228 , H01L21/3121 , H01L21/31612 , H01L21/76224 , H01L21/823462
摘要： This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over capacitor arrays of memory cells. In one implementation, a semiconductor substrate having an exposed outer first surface comprising silicon-nitrogen bonds and an exposed outer second surface comprising at least one of silicon and silicon dioxide is provided. A layer comprising a metal is deposited over at least the outer second surface. A silanol is flowed to the metal of the outer second surface and to the outer first surface effective to selectively deposit a silicon dioxide comprising layer over the outer second surface as compared to the outer first surface. Other aspects and implementations are contemplated.
摘要翻译：本发明包括在集成电路的制造中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法以及在存储器单元的电容器阵列上形成位线的方法。在一个实施方案中，提供了具有包含硅 - 氮键的暴露的外部第一表面和包含硅和二氧化硅中的至少一种的暴露的外部第二表面的半导体衬底。包含金属的层至少沉积在外部第二表面上。与外部第一表面相比，硅烷醇流动到外部第二表面的金属和外部第一表面，有效地选择性地将二氧化硅包含层沉积在外部第二表面上。考虑了其他方面和实现。

16. 发明申请

US20050208778A1 Methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming arrays of memory cells 有权
标题翻译：在制造集成电路中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法和形成存储器单元阵列的方法
公开(公告)号：US20050208778A1
公开(公告)日：2005-09-22
申请号：US10806923
申请日：2004-03-22
申请人： Weimin Li , Gurtej Sandhu
发明人： Weimin Li , Gurtej Sandhu
IPC分类号： H01L21/31 , H01L21/312 , H01L21/316 , H01L21/469 , H01L21/762 , H01L21/8234 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L21/02145 , H01L21/02164 , H01L21/02214 , H01L21/02271 , H01L21/0228 , H01L21/3121 , H01L21/31612 , H01L21/76224 , H01L21/823462
摘要： This invention includes methods of depositing silicon dioxide comprising layers in the fabrication of integrated circuitry, methods of forming trench isolation, and methods of forming bit line over capacitor arrays of memory cells. In one implementation, a semiconductor substrate having an exposed outer first surface comprising silicon-nitrogen bonds and an exposed outer second surface comprising at least one of silicon and silicon dioxide is provided. A layer comprising a metal is deposited over at least the outer second surface. A silanol is flowed to the metal of the outer second surface and to the outer first surface effective to selectively deposit a silicon dioxide comprising layer over the outer second surface as compared to the outer first surface. Other aspects and implementations are contemplated.
摘要翻译：本发明包括在集成电路的制造中沉积包含层的二氧化硅的方法，形成沟槽隔离的方法以及在存储器单元的电容器阵列上形成位线的方法。在一个实施方案中，提供了具有包含硅 - 氮键的暴露的外部第一表面和包含硅和二氧化硅中的至少一种的暴露的外部第二表面的半导体衬底。包含金属的层至少沉积在外部第二表面上。与外部第一表面相比，硅烷醇流动到外部第二表面的金属和外部第一表面，有效地选择性地将二氧化硅包含层沉积在外部第二表面上。考虑了其他方面和实现。

17. 发明授权

US06756293B2 Combined gate cap or digit line and spacer deposition using HDP 失效
标题翻译：使用HDP组合门帽或数字线和间隔层沉积
公开(公告)号：US06756293B2
公开(公告)日：2004-06-29
申请号：US10319694
申请日：2002-12-16
申请人： Weimin Li , Sujit Sharan , Gurtej Sandhu
发明人： Weimin Li , Sujit Sharan , Gurtej Sandhu
IPC分类号： H01L214763
CPC分类号： H01L29/6656 , C23C16/345 , C23C16/402 , H01L21/02164 , H01L21/0217 , H01L21/02211 , H01L21/02274 , H01L21/31612 , H01L21/3185 , H01L21/76832 , H01L21/76834 , H01L21/76885
摘要： A method for fabricating gate electrodes and gate interconnects with a protective silicon oxide or silicon nitride cap and spacer formed by high density plasma chemical vapor deposition (HDPCVD). Silicon oxide or silicon nitride is deposited in a reaction zone of a HDPCVD reactor while providing two or more selected substrate bias powers, source powers and/or selected gas mixtures to tailor the shape and thickness of the film for desired applications. In one embodiment, a low bias power of below 500 Watts is provided in a first stage HDPCVD and the bias power is then increased to between 500 and 3000 Watts for a second stage to produce a protective film having thin sidewall spacers for enhanced semiconductor device density and a relatively thick cap.
摘要翻译：一种通过高密度等离子体化学气相沉积（HDPCVD）形成的具有保护性氧化硅或氮化硅帽和间隔物的栅电极和栅极互连的方法。氧化硅或氮化硅沉积在HDPCVD反应器的反应区中，同时提供两种或更多种选择的底物偏压功率，源功率和/或选定的气体混合物以根据期望的应用来定制膜的形状和厚度。在一个实施例中，在第一级HDPCVD中提供低于500瓦的低偏置功率，然后将偏置功率增加到500至3000瓦之间，用于第二级，以产生具有薄侧壁间隔件的保护膜，用于增强半导体器件密度和一个相对较厚的帽子。

18. 发明授权

US07314837B2 Chemical treatment of semiconductor substrates 失效
标题翻译：半导体衬底的化学处理
公开(公告)号：US07314837B2
公开(公告)日：2008-01-01
申请号：US11333629
申请日：2005-12-29
申请人： Li Li , Weimin Li
发明人： Li Li , Weimin Li
IPC分类号： H01L21/31
CPC分类号： H01L21/316 , H01L21/76232 , H01L21/76826 , H01L21/76828 , H01L21/76837 , Y10S438/902
摘要： A method is disclosed for removing liquids from a semiconductor substrate by contacting the liquid on the substrate with a liquid which attracts the liquid on the substrate, separating the liquids from the substrate, and inducing a phase transition in a layer on the substrate. In particular, the method is applicable to removing water from a water-containing layer on the substrate by contacting the layer with a hygroscopic liquid. Trenches on a substrate can be isolated by filling the trenches with a water-containing gel formed by reacting silane and hydrogen peroxide. The gel is contacted with sulfuric acid to remove a portion of the water from the gel before annealing to form silica in the trenches. Unlike filled trenches formed by conventional technology, there are no voids in the bottom of the trenches. The method is also applicable to forming dielectric layers which cover metal lines, low-dielectric layers, and interlayer dielectric layers. The liquid may be applied to the substrate by chemical vapor deposition or by spin-applying.
摘要翻译：公开了一种通过使衬底上的液体接触吸附衬底上的液体的液体，将液体与衬底分离并引起衬底上的层中的相变来从半导体衬底去除液体的方法。特别地，该方法适用于通过使该层与吸湿性液体接触来从基底上的含水层除去水分。通过用硅烷和过氧化氢反应形成的含水凝胶填充沟槽可以分离衬底上的沟槽。将凝胶与硫酸接触以在退火之前从凝胶中除去一部分水以在沟槽中形成二氧化硅。与常规技术形成的填充沟槽不同，沟槽底部没有空隙。该方法也适用于形成覆盖金属线，低电介质层和层间电介质层的电介质层。液体可以通过化学气相沉积或通过旋涂施加到基底上。

19. 发明授权

US07018469B2 Atomic layer deposition methods of forming silicon dioxide comprising layers 失效
标题翻译：形成二氧化硅层的原子层沉积方法
公开(公告)号：US07018469B2
公开(公告)日：2006-03-28
申请号：US10669667
申请日：2003-09-23
申请人： Li Li , Weimin Li , Gurtej S. Sandhu
发明人： Li Li , Weimin Li , Gurtej S. Sandhu
IPC分类号： C30B25/14
CPC分类号： C23C16/45527 , C23C16/402
摘要： A substrate is positioned within a deposition chamber. Trimethylsilane is flowed to the chamber and a first inert gas is flowed to the chamber under conditions effective to chemisorb a first species monolayer comprising silicon onto the substrate. The first inert gas is flowed at a first rate. After forming the first species monolayer, an oxidant is flowed to the chamber and a second inert gas is flowed to the chamber under conditions effective to react the oxidant with the chemisorbed first species and form a monolayer comprising silicon dioxide on the substrate. The second inert gas flowing is at a second rate which is less than the first rate. The a) trimethylsilane and first inert gas flowing and the b) oxidant and second inert gas flowing are successively repeated effective to form a silicon dioxide comprising layer on the substrate. Other implementations and aspects are contemplated.
摘要翻译：衬底位于沉积室内。三甲基硅烷流到室中，并且第一惰性气体在有效地化学吸附包含硅的第一物质单层到衬底上的条件下流到室中。第一惰性气体以第一速率流动。在形成第一物质单层之后，将氧化剂流到室，并且在有效使氧化剂与化学吸附的第一种类反应的条件下将第二惰性气体流入室，并在衬底上形成包含二氧化硅的单层。第二惰性气体流动的速度小于第一速率。 a）三甲基硅烷和第一惰性气体流动，b）氧化剂和第二惰性气体流动相继重复有效地在基底上形成含二氧化硅的层。考虑其他实现和方面。

20. 发明授权

US06936547B2 Gas delivery system for deposition processes, and methods of using same 失效
公开(公告)号：US06936547B2
公开(公告)日：2005-08-30
申请号：US10284681
申请日：2002-10-31
申请人： Weimin Li , Neal R. Rueger , Li Li , Ross S. Dando , Kevin T. Hamer , Allen P. Mardian
发明人： Weimin Li , Neal R. Rueger , Li Li , Ross S. Dando , Kevin T. Hamer , Allen P. Mardian
IPC分类号： C23C16/44 , C23C16/455 , C23C16/507 , H01L21/31
CPC分类号： C23C16/45565 , C23C16/455 , C23C16/507
摘要： The present invention is generally directed to a novel gas delivery system for various deposition processes, and various methods of using same. In one illustrative embodiment, a deposition tool comprises a process chamber, a wafer stage adapted for holding a wafer positioned therein, and a gas delivery system positioned in the chamber above a position where a plasma will be generated in the chamber, wherein substantially all of a reactant gas is delivered into the chamber via the gas delivery system. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed so as to cover substantially all of an area defined by an upper surface of the wafer. In one illustrative embodiment, the method comprises positioning a wafer in a process chamber of a deposition tool, generating a plasma within the process chamber above the wafer, and forming a layer of material above the wafer by introducing substantially all of a reactant gas used to form the layer of material into the process chamber above the plasma via a gas delivery system positioned above the plasma. In another illustrative embodiment, the reactant gas exiting the gas delivery system is directed to cover substantially all of an area defined by an upper surface of the wafer.

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