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11. 发明授权

US07048836B2 Thermal-insulating material having an essentially magnetoplumbitic crystal structure 失效
标题翻译：绝热材料具有基本上为磁铅石的晶体结构
公开(公告)号：US07048836B2
公开(公告)日：2006-05-23
申请号：US10141341
申请日：2002-05-09
申请人： Bilge Saruhan-Brings , Uwe Schulz , Claus Jürgen Kroder
发明人： Bilge Saruhan-Brings , Uwe Schulz , Claus Jürgen Kroder
IPC分类号： C23C14/46 , C23C14/30
CPC分类号： C01G45/006 , C01B33/26 , C01F17/0025 , C01P2002/30 , C01P2002/54 , C01P2006/10 , C01P2006/32 , C01P2006/34 , C23C14/08 , C23C28/3215 , C23C28/322 , C23C28/345 , C23C28/3455 , C23C30/00 , Y02T50/67 , Y10T428/12611 , Y10T428/12618
摘要： Thermal-insulating material provided on a metal substrate by means of an EB-PVD process includes a metal having a substantially magnetoplumbitic crystal structure and having a chemical composition according to general formula: Ln3+M2+1+xQ44+A111−2xO19. The thermally-insulated metal substrate may advantageously include an adhesive layer provided between the surface of the metal substrate and the thermal-insulating layer. The process for producing the thermal-insulated metal substrate includes applying the thermal-insulating material onto a surface of the metal substrate employing an EB-PVD process.
摘要翻译：通过EB-PVD工艺在金属基底上提供的绝热材料包括具有基本磁铅垂石晶体结构并具有根据通式的化学组成的金属：Ln 3+ 2 + 1/2 + 1 + 4 。绝热金属基板可以有利地包括设置在金属基板的表面和绝热层之间的粘合剂层。用于制造绝热金属基板的方法包括使用EB-PVD工艺将绝热材料施加到金属基板的表面上。

12. 发明申请

US20060019107A1 Thermal-insulating material having an essentially magnetoplumbitic crystal structure 有权
公开(公告)号：US20060019107A1
公开(公告)日：2006-01-26
申请号：US11183818
申请日：2005-07-19
申请人： Bilge Saruhan-Brings , Uwe Schulz , Claus Kroder
发明人： Bilge Saruhan-Brings , Uwe Schulz , Claus Kroder
IPC分类号： B32B15/04
CPC分类号： C01G45/006 , C01B33/26 , C01F17/0025 , C01P2002/30 , C01P2002/54 , C01P2006/10 , C01P2006/32 , C01P2006/34 , C23C14/08 , C23C28/3215 , C23C28/322 , C23C28/345 , C23C28/3455 , C23C30/00 , Y02T50/67 , Y10T428/12611 , Y10T428/12618
摘要： The subject matter of the invention is a thermal-insulating material having an essentially magnetoplumbitic crystal structure, a metal substrate having a adhesive layer and a thermal-insulating layer made of the thermal-insulating material on its surface, and a process for coating metal substrates with the thermal-insulating material.

13. 发明授权

US6127006A Heat-insulating layers on monocrystalline and polycrystalline metal substrates having an improved crystallographic relationship between layer and substrate 失效
标题翻译：单层和多晶金属衬底上的绝热层具有改善的层与衬底之间的结晶学关系
公开(公告)号：US6127006A
公开(公告)日：2000-10-03
申请号：US165213
申请日：1998-10-02
申请人： Uwe Schulz , Claus Kroder , Jorg Brien , Harmut Schurmann , Uwe Kaden , Klaus Fritscher
发明人： Uwe Schulz , Claus Kroder , Jorg Brien , Harmut Schurmann , Uwe Kaden , Klaus Fritscher
IPC分类号： C23C14/08 , C23C14/50 , C23C14/30
CPC分类号： C23C14/083 , C23C14/505 , Y02T50/67
摘要： The present invention relates to a method for coating monocrystalline or polycrystalline metal substrates with a ceramic heat-insulating layer of zirconia by electron-beam vapor deposition, and to a method for coating turbine blades made of Ni-based superalloys. The method is characterized in that the metal substrate is moved during the vapor deposition in terms of a superposition of two rotational motions around horizontal axes, but in essentially perpendicular directions.
摘要翻译：本发明涉及通过电子束气相沉积用陶瓷绝热层氧化锆涂覆单晶或多晶金属基板的方法，以及一种用于涂覆由Ni基超级合金制成的涡轮叶片的方法。该方法的特征在于，在气相沉积期间，金属基板在围绕水平轴线的两个旋转运动的叠加方面基本上沿垂直方向移动。

14. 发明授权

US4890238A Method for physical VLSI-chip design 失效
标题翻译：物理VLSI芯片设计方法
公开(公告)号：US4890238A
公开(公告)日：1989-12-26
申请号：US133402
申请日：1987-12-15
申请人： Klaus Klein , Kurt Pollmann , Helmut Schettler , Uwe Schulz , Otto M. Wagner , Rainer Zuehlke
发明人： Klaus Klein , Kurt Pollmann , Helmut Schettler , Uwe Schulz , Otto M. Wagner , Rainer Zuehlke
IPC分类号： H01L21/82 , G06F17/50 , H01L21/822 , H01L27/04
CPC分类号： G06F17/5072
摘要： For the physical design of a very large scale integration (VSLI) chip, a method is provided to implement a high density master image that contains logic and RAMs. In a hierarchical top-down design methodology, the circuitry to be contained on the chip is logically divided into partitions that are manageable by the present automatic design systems and programs. Global wiring connection lines are from the beginning included into the design of the different individual partitions and treated there in the same way as circuits in that area. Thus, the different partitions are designed in parallel. A floor plan is established that gives the different partitions a shape in such a way that they fit together without leaving any space between the different individual partitions. The chip need no extra space for global wiring and the partitions are immediately attached to each other. The master image described is very flexible with respect to logic, RAM, ROM and other macros, and it offers some of the advantages of semicustom gate arrays and custom macro design. The thus designed chip shows no global wiring avenues between the partitions and has partitions of different porosity.
摘要翻译：对于大规模集成（VSLI）芯片的物理设计，提供了一种实现包含逻辑和RAM的高密度主映像的方法。在分层自顶向下的设计方法中，芯片上所包含的电路在逻辑上划分为可由当前自动设计系统和程序管理的分区。全局接线连接线从一开始就包括在不同的分区设计中，并以与该区域的电路相同的方式进行处理。因此，不同的分区是并行设计的。建立了平面图，其给出不同分区的形状，使得它们在不在不同单独分区之间留下空间的情况下相配合。该芯片不需要额外的空间用于全局布线，并且分区立即相互连接。所描述的主图像对逻辑，RAM，ROM和其他宏非常灵活，并且提供半定制门阵列和定制宏设计的一些优点。这样设计的芯片在分区之间没有显示全局布线通道，并具有不同孔隙度的分隔。

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