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    • 12. 发明授权
    • Image signal processor
    • 图像信号处理器
    • US07113206B2
    • 2006-09-26
    • US10194708
    • 2002-07-12
    • Toshio Nakakuki
    • Toshio Nakakuki
    • H04N5/228
    • H04N9/045
    • According to the present invention, it is possible to display an image signal with as a high picture quality as would have been obtained with a solid image pick-up device having color filters arrayed in a mosaic pattern. The image signal obtained from the solid image pick-up device with a Bayer array of the three primary colors of R, G, and B is separated by a color separation circuit 4 into R-color, G-color, and B-color signals. These color signals are attenuated by filters 6, 8, 10 respectively at half a horizontal sampling frequency in order to suppress the occurrence of moire noise. The G-color filter circuit 8 has a narrower attenuation band width than that of the R-color filter circuit 6 and the B-color filter circuit 10. These color signals thus filtered are adjusted in level at a white balance circuit 12 and then mixed by addition at a mixer 14, thus generating a luminance signal. By narrowing the attenuation band width of the G-color signal, the resolution can be kept high while suppressing the occurrence of moire noise.
    • 根据本发明,可以以具有以马赛克图案排列的彩色滤光片的实心图像拾取装置获得的具有高图像质量的图像信号显示。 由具有R,G和B的三原色的拜耳阵列的实心图像拾取装置获得的图像信号被色分离电路4分离成R色,G色和B色信号 。 这些颜色信号分别以半水平采样频率被滤波器6,8,10衰减,以便抑制莫尔噪声的发生。 G滤色器电路8具有比R滤色器电路6和B色滤波器电路10的衰减带宽窄的衰减带宽。 这样滤波的这些彩色信号在白平衡电路12处被调节,然后通过在混合器14处相加来进行混合,从而产生亮度信号。 通过缩小G色信号的衰减带宽,可以在抑制莫尔噪声的发生的同时保持高分辨率。
    • 13. 发明申请
    • Image signal processor
    • 图像信号处理器
    • US20060072021A1
    • 2006-04-06
    • US11234207
    • 2005-09-26
    • Toshio NakakukiTsuyoshi Mitsui
    • Toshio NakakukiTsuyoshi Mitsui
    • H04N5/228
    • H04N5/232
    • In an image signal processor with which a group of control variables, having relevance to one another, stored in registers are activated synchronously with the switching of a picture, when a host sets the control variable group in the registers, mutual coherency is secured even if the setting operation extends beyond a pulse of a vertical synchronous signal (VD). In order to realize this, an operation for setting a control variable group in a register block (20) by the host, and an operation for reflecting the control variable group in a DSP block (22), are separately performed. After setting of the control variable group, the host sets H level in a VLAT register (30). In correspondence with this operation, a control portion (24) updates an output of a latch circuit (36). As a result, the control variable group is activated from the register block (20) to the DSP block (22).
    • 在图像信号处理器中,与图像的切换同步地激活存储在寄存器中的彼此相关的一组控制变量的图像信号处理器,当主机在寄存器中设置控制变量组时,即使 设置操作延伸超过垂直同步信号(VD)的脉冲。 为了实现这一点,分别执行用于由主机在寄存器块(20)中设置控制变量组的操作和用于反映控制变量组在DSP模块(22)中的操作。 在设置控制变量组之后,主机在VLAT寄存器(30)中设置H电平。 与该操作相对应,控制部分(24)更新锁存电路(36)的输出。 结果,控制变量组从寄存器块(20)激活到DSP模块(22)。
    • 15. 发明申请
    • Camera module adjusting method
    • 相机模块调整方式
    • US20050024506A1
    • 2005-02-03
    • US10888958
    • 2004-07-12
    • Toshio NakakukiAtsushi Noda
    • Toshio NakakukiAtsushi Noda
    • H04N5/232G03B17/00G03B17/02H04N5/225H04N5/335H04N5/372H04N9/04H04N9/73
    • G03B17/02
    • The invention provides a camera module adjusting method which reduces load of work of a camera adjusting step on a side of a downstream product manufacturer. In the camera module adjusting method of the invention, camera adjustment data (e.g. data on adjustment of white balance characteristics of a CCD and adjustment of a mechanical shutter which varies among CCDs or products) and a module control program are stored in a flash memory of the camera module in a camera module manufacturing procedure, and then this camera module is sent to a downstream product manufacturer. Then, in a downstream product manufacturing procedure, the camera module is mounted on the motherboard for a downstream product, and the motherboard is mounted in the downstream product.
    • 本发明提供了一种相机模块调整方法,其减少了下游产品制造商侧面的照相机调整步骤的工作负荷。 在本发明的相机模块调整方法中,相机调整数据(例如CCD的白平衡特性的调整数据和CCD或产品中的机械快门的调整)以及模块控制程序被存储在 相机模块在相机模块制造过程中,然后将该相机模块发送到下游产品制造商。 然后,在下游产品制造程序中,相机模块安装在母板上用于下游产品,并且母板安装在下游产品中。
    • 16. 发明授权
    • Solid-state imaging apparatus
    • 固态成像装置
    • US06822689B1
    • 2004-11-23
    • US09512754
    • 2000-02-25
    • Toshio NakakukiTomomichi Nakai
    • Toshio NakakukiTomomichi Nakai
    • H04N5235
    • H04N5/2353H04N5/235
    • Exposure control for a solid-state imaging apparatus can be completed in a short time. First exposure information D1 and second exposure information D2 are prepared. The first exposure information D1 is for adjustment of an exposure time L for a CCD (1) through extension or reduction in the unit of one horizontal scanning period; the second exposure information D2 is for direct designation of an exposure time L. When the power is switched on, the second exposure information D2 is selected for supply to a timing control circuit (3). After a lapse of a predetermined time, the first exposure information D1 is then selected.
    • 固态成像装置的曝光控制可以在短时间内完成。 准备第一曝光信息D1和第二曝光信息D2。 第一曝光信息D1用于通过以一个水平扫描周期为单位通过扩展或缩小来调整CCD(1)的曝光时间L; 第二曝光信息D2用于直接指定曝光时间L.当电源接通时,选择第二曝光信息D2供给定时控制电路(3)。 经过预定时间后,选择第一曝光信息D1。
    • 19. 发明授权
    • Image signal processing apparatus
    • 图像信号处理装置
    • US07855739B2
    • 2010-12-21
    • US11018485
    • 2004-12-22
    • Toshio Nakakuki
    • Toshio Nakakuki
    • H04N5/208H04N11/20H04N5/228
    • H04N7/0135G09G5/005G09G2340/0407
    • In an image signal processing apparatus, line memories conventionally provided at a latter stage of the apparatus in order to convert a VGA image signal into a CIF image signal are eliminated. Image data of the VGA held in a unit of one line in plural line memories 60 provided in a digital signal processing circuit are weighted and added in a VLPF 62. A factor setting part 76 of the VLPF 62 changes weighting factors according to a positional relation between a position of a generation object line of the CIF and a line of the VGA. The weighting factors are determined so that a characteristic of trapping ½ of a vertical sampling frequency fv is also obtained. The VLPF 62 uses the weighting factors to trap fv/2, and changes the position of the vertical sampling point to a position of each line of the CIF image.
    • 在图像信号处理装置中,为了将VGA图像信号转换为CIF图像信号,在设备的后一级通常提供的行存储器被消除。 在数字信号处理电路中设置的多行存储器60中保持一行的VGA的图像数据被加权并附加在VLPF 62中。VLPF 62的因子设定部76根据位置关系来改变加权因子 在CIF的生成对象行的位置和VGA的一行之间。 确定加权因子,使得捕获垂直采样频率fv的1/2的特性也被获得。 VLPF 62使用加权因子来捕获fv / 2,并且将垂直采样点的位置改变为CIF图像的每一行的位置。