专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明申请

US20120031324A1 METHOD FOR GROWING GROUP III NITRIDE CRYSTAL 有权
标题翻译：生长III类氮化物晶体的方法
公开(公告)号：US20120031324A1
公开(公告)日：2012-02-09
申请号：US13115560
申请日：2011-05-25
申请人： Yuki Hiromura , Koji Uematsu , Hiroaki Yoshida , Shinsuke Fujiwara
发明人： Yuki Hiromura , Koji Uematsu , Hiroaki Yoshida , Shinsuke Fujiwara
IPC分类号： C30B25/02
CPC分类号： H01L21/02389 , C30B25/18 , C30B29/403 , H01L21/0243 , H01L21/02433 , H01L21/0254 , H01L21/0262 , H01L21/02658
摘要： The present invention is to provide a method for growing a group III nitride crystal that has a large size and has a small number of pits formed in the main surface of the crystal by using a plurality of tile substrates. A method for growing a group III nitride crystal includes a step of preparing a plurality of tile substrates 10 including main surfaces 10m having a shape of a triangle or a convex quadrangle that allows two-dimensional close packing of the plurality of tile substrates; a step of arranging the plurality of tile substrates 10 so as to be two-dimensionally closely packed such that, at any point across which vertexes of the plurality of tile substrates 10 oppose one another, 3 or less of the vertexes oppose one another; and a step of growing a group III nitride crystal 20 on the main surfaces 10m of the plurality of tile substrates arranged.
摘要翻译：本发明提供一种通过使用多个瓦片基板来生长具有大尺寸并且具有少量形成在晶体的主表面中的凹坑的III族氮化物晶体的方法。用于生长III族氮化物晶体的方法包括制备多个瓦片基板10的步骤，该瓦片基板10包括允许多个瓦片基板的二维密封的具有三角形形状的主表面10m或凸形四边形; 将多个瓦片基板10布置成二维紧密堆叠的步骤，使得在多个瓦片基板10的顶点彼此相对的任何点处，3个或更少的顶点彼此相对; 以及在布置的多个瓦片基板的主表面10m上生长III族氮化物晶体20的步骤。

12. 发明申请

US20110217041A1 PON SYSTEM, STATION-SIDE APPARATUS FOR PON SYSTEM, AND CONTROL METHOD THEREOF 有权
标题翻译： PON系统，PON系统的站点设备及其控制方法
公开(公告)号：US20110217041A1
公开(公告)日：2011-09-08
申请号：US12677258
申请日：2009-05-28
申请人： Hiroaki Yoshida , Tetsuya Yokomoto , Hiroji Shigetome
发明人： Hiroaki Yoshida , Tetsuya Yokomoto , Hiroji Shigetome
IPC分类号： H04J14/00
CPC分类号： H04L12/2876 , H04L12/2861 , H04L47/10 , H04Q11/0067 , H04Q2011/0064 , H04Q2011/0084
摘要： An OLT, which is one of the embodiments of the present invention, is provided with: an allocation request receiving unit that receives a bandwidth allocation request from each of 1 G-ONUs and each of 10 G-ONUs; an allocation execution unit that allocates to each of the ONUs a time slot for data transmission in accordance with an allocation rule based on fairness in time allocation or an allocation rule based on fairness in throughput allocation; and an allocation result notification unit that notifies each of the ONUs of information regarding the time slot.
摘要翻译：作为本发明实施例之一的OLT具有：分配请求接收单元，其从1个G-ONU和10个G-ON中的每一个接收带宽分配请求; 分配执行单元，其基于在时间分配中的公平性或基于吞吐量分配中的公平性的分配规则，根据分配规则向每个ONU分配用于数据传输的时隙; 以及分配结果通知单元，其向每个ONU通知关于该时隙的信息。

13. 发明授权

US07941776B2 Method of IC design optimization via creation of design-specific cells from post-layout patterns 有权
标题翻译：通过从后布局模式创建设计特定单元的IC设计优化方法
公开(公告)号：US07941776B2
公开(公告)日：2011-05-10
申请号：US11805947
申请日：2007-05-25
申请人： Purnabha Majumder , Balakrishna Kumthekar , Nimish Rameshbhai Shah , John Mowchenko , Pramit Anikumar Chavda , Yoshihisa Kojima , Hiroaki Yoshida , Vamsi Boppana
发明人： Purnabha Majumder , Balakrishna Kumthekar , Nimish Rameshbhai Shah , John Mowchenko , Pramit Anikumar Chavda , Yoshihisa Kojima , Hiroaki Yoshida , Vamsi Boppana
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： A closed-loop IC design optimization process by automatically or manually creating design-specific cells with desired characteristics (e.g., performance, area, power, noise, etc.), which will be then implemented as a standard cell (also known hereafter as metacell), from a set of post-layout patterns. A post-layout pattern represents a part or whole of a standard cell and contains information regarding the pattern including, but not limited to, layout, timing, area, power and noise. As the metacells are created from post-layout patterns, the inaccuracies of prior dynamic library techniques are easily avoided. Such metacells, being design-specific, are optimized to satisfy the constraints imposed by the design context, thus bringing the powerful design-specific customization to standard cell-based design methodology.
摘要翻译：通过自动或手动创建具有期望特性（例如，性能，面积，功率，噪声等）的设计特定单元的闭环IC设计优化过程，其将被实现为标准单元（以下也称为metacell ），从一组后布局模式。后置布局图案表示标准单元的一部分或全部，并且包含关于图案的信息，包括但不限于布局，定时，面积，功率和噪声。由于电池是从后期布局模式创建的，所以很容易避免先前的动态库技术的不准确之处。针对特定设计的这种电池进行了优化，以满足设计上下文所施加的限制，从而将强大的设计特定定制功能带入标准的基于单元格的设计方法。

14. 发明授权

US07582697B2 Silicone rubber adhesive film 有权
标题翻译：硅橡胶胶膜
公开(公告)号：US07582697B2
公开(公告)日：2009-09-01
申请号：US11311216
申请日：2005-12-19
申请人： Kazuo Hirai , Hideo Miyazaki , Hiroaki Yoshida , Noriyuki Suganuma
发明人： Kazuo Hirai , Hideo Miyazaki , Hiroaki Yoshida , Noriyuki Suganuma
IPC分类号： C08K3/34 , C08K5/5425
CPC分类号： C08K3/36 , C08L83/00 , C09J183/04 , C08L83/04
摘要： A silicone rubber adhesive film comprising a composition formed from; (A) organopolysiloxane gum that has at least two alkenyl groups in each molecule; (B) wet-method hydrophobic reinforcing silica that has a specific surface area of at least 200 m2/g; (C) organohydrogenpolysiloxane that contains at least two silicon-bonded hydrogen atoms in each molecule; (D) mixture or reaction mixture from: (a) organopolysiloxane that has a branched molecular chain structure and that contains at least one silicon-bonded alkenyl group in each molecule and at least one silicon-bonded hydrolyzable group in each molecule, and (b) a silicon-containing compound that contains at least one silicon-bonded epoxy-functional hydrocarbon group and at least one silicon-bonded hydrolyzable group; and (E) curing accelerator.
摘要翻译：一种硅橡胶粘合膜，其包含由下列物质形成的组合物：（A）在每个分子中具有至少两个烯基的有机聚硅氧烷胶; （B）具有至少200m 2 / g的比表面积的湿法疏水性增强二氧化硅; （C）在每个分子中含有至少两个与硅键合的氢原子的有机氢聚硅氧烷; （D）混合物或反应混合物：（a）具有支链分子链结构并且在每个分子中含有至少一个与硅键合的烯基和每个分子中至少一个硅键合的可水解基团的有机聚硅氧烷，和（b ）含有至少一个与硅键合的环氧官能烃基和至少一个硅键合的可水解基团的含硅化合物; 和（E）固化促进剂。

15. 发明申请

US20090140287A1 III Nitride Crystal Substrate, and Light-Emitting Device and Method of Its Manufacture 有权
标题翻译： III型氮化物晶体基板，发光元件及其制造方法
公开(公告)号：US20090140287A1
公开(公告)日：2009-06-04
申请号：US12324897
申请日：2008-11-28
申请人： Shinsuke Fujiwara , Hiroaki Yoshida
发明人： Shinsuke Fujiwara , Hiroaki Yoshida
IPC分类号： H01L29/20 , H01L33/00
CPC分类号： H01L29/32 , C30B19/02 , C30B23/02 , C30B25/02 , C30B29/406 , H01L21/02389 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/0262 , H01L21/02625 , H01L21/02658 , H01L33/0075 , H01L33/025
摘要： Toward making available III nitride crystal substrates advantageously employed in light-emitting devices, and light-emitting devices incorporating the substrates and methods of manufacturing the light-emitting devices, a III nitride crystal substrate has a major face whose surface area is not less than 10 cm2 and, in a major-face principal region excluding the peripheral margin of the major face from its outer periphery to a 5 mm separation from its outer periphery, the total dislocation density is from 1×104 cm−2 to 3×106 cm−2, and the ratio of screw-dislocation density to the total dislocation density is 0.5 or greater.
摘要翻译：为了制造有利地用于发光器件的III族氮化物晶体衬底，以及结合了衬底的发光器件和制造发光器件的方法，III族氮化物晶体衬底具有表面积不小于10的主面 cm2，并且在从主外表面的外表面的外周边缘除了与其外周分隔5mm之外的主面主要区域中，总位错密度为1×104cm -2至3×106cm-2，螺旋位错密度与总位错密度的比值为0.5以上。

16. 发明申请

US20080127000A1 Method of IC design optimization via creation of design-specific cells from post-layout patterns 有权
标题翻译：通过从后布局模式创建设计特定单元的IC设计优化方法
公开(公告)号：US20080127000A1
公开(公告)日：2008-05-29
申请号：US11805947
申请日：2007-05-25
申请人： Purnabha Majumder , Balakrishna Kumthekar , Nimish Rameshbhai Shah , John Mowchenko , Pramit Anikumar Chavda , Yoshihisa Kojima , Hiroaki Yoshida , Vamsi Boppana
发明人： Purnabha Majumder , Balakrishna Kumthekar , Nimish Rameshbhai Shah , John Mowchenko , Pramit Anikumar Chavda , Yoshihisa Kojima , Hiroaki Yoshida , Vamsi Boppana
IPC分类号： G06F17/50
CPC分类号： G06F17/505
摘要： A closed-loop IC design optimization process by automatically or manually creating design-specific cells with desired characteristics (e.g., performance, area, power, noise, etc.), which will be then implemented as a standard cell (also known hereafter as metacell), from a set of post-layout patterns. A post-layout pattern represents a part or whole of a standard cell and contains information regarding the pattern including, but not limited to, layout, timing, area, power and noise. As the metacells are created from post-layout patterns, the inaccuracies of prior dynamic library techniques are easily avoided. Such metacells, being design-specific, are optimized to satisfy the constraints imposed by the design context, thus bringing the powerful design-specific customization to standard cell-based design methodology.
摘要翻译：通过自动或手动创建具有期望特性（例如，性能，面积，功率，噪声等）的设计特定单元的闭环IC设计优化过程，其将被实现为标准单元（以下也称为metacell ），从一组后布局模式。后置布局图案表示标准单元的一部分或全部，并且包含关于图案的信息，包括但不限于布局，定时，面积，功率和噪声。由于电池是从后期布局模式创建的，所以很容易避免先前的动态库技术的不准确之处。针对特定设计的这种电池进行了优化，以满足设计上下文所施加的限制，从而将强大的设计特定定制功能带入标准的基于单元格的设计方法。

17. 发明申请

US20080074026A1 FIELD EMISSION ELECTRON SOURCE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：场发射电子源及其制造方法
公开(公告)号：US20080074026A1
公开(公告)日：2008-03-27
申请号：US11846929
申请日：2007-08-29
申请人： Tadashi Sakai , Tomio Ono , Naoshi Sakuma , Hiroaki Yoshida , Mariko Suzuki
发明人： Tadashi Sakai , Tomio Ono , Naoshi Sakuma , Hiroaki Yoshida , Mariko Suzuki
IPC分类号： H01J1/312 , H01J9/02
CPC分类号： H01J1/304 , H01J9/025
摘要： A field emission electron source includes a substrate. A wiring layer is formed on the substrate, and an insulation layer is formed over the wiring layer. In the insulation layer, a plurality of through holes are provided, and conductive via plugs are disposed in the through holes. A diamond layer is formed to cover tops of the insulation layer and the conductive via plugs.
摘要翻译：场发射电子源包括衬底。在基板上形成布线层，在布线层上形成绝缘层。在绝缘层中，设置有多个通孔，并且在通孔中设置导电通孔。形成金刚石层以覆盖绝缘层和导电通孔塞的顶部。

18. 发明申请

US20070222884A1 Thumbnail generating apparatus and image shooting apparatus 失效
标题翻译：缩略图生成装置和图像拍摄装置
公开(公告)号：US20070222884A1
公开(公告)日：2007-09-27
申请号：US11723603
申请日：2007-03-21
申请人： Yukio Mori , Yasuhachi Hamamoto , Seiji Okada , Hiroaki Yoshida , Satoru Takeuchi , Masahiro Yokohata
发明人： Yukio Mori , Yasuhachi Hamamoto , Seiji Okada , Hiroaki Yoshida , Satoru Takeuchi , Masahiro Yokohata
IPC分类号： H04N5/222
CPC分类号： H04N1/2112 , G11B27/28 , G11B27/326 , H04N1/212 , H04N1/32128 , H04N5/772 , H04N5/775 , H04N5/781 , H04N5/85 , H04N5/907 , H04N9/7921 , H04N9/8042 , H04N9/8047 , H04N9/8063 , H04N9/8227 , H04N2101/00 , H04N2201/0098 , H04N2201/325
摘要： Based on, for example, the image at the start of a movie, a thumbnail image is tentatively generated and is stored in a header file. If a predetermined triggering condition is fulfilled during movie shooting, a thumbnail image is generated from the frame image at the timing that the triggering condition is fulfilled, and the thumbnail image existing in the header file is replaced with the newly generated thumbnail image. The triggering condition is fulfilled, for example, if, after zooming-in, the angle of view has been kept fixed for a predetermined period or longer, or if the focus has been kept locked for a predetermined period.
摘要翻译：基于例如电影开始时的图像，暂时生成缩略图，并存储在头文件中。如果在短片拍摄期间满足预定的触发条件，则在触发条件满足的定时从帧图像生成缩略图，并且使用新生成的缩略图替换存在于头文件中的缩略图。满足触发条件，例如，如果在放大之后，视角已经保持固定预定时间段或更长时间，或者如果焦点已被保持锁定预定时间段。

19. 发明申请

US20060260722A1 Method of predicting die lives 审中-公开
标题翻译：预测死亡生活的方法
公开(公告)号：US20060260722A1
公开(公告)日：2006-11-23
申请号：US11438257
申请日：2006-05-23
申请人： Hiroaki Yoshida , Shigekazu Itoh , Takuma Okajima
发明人： Hiroaki Yoshida , Shigekazu Itoh , Takuma Okajima
IPC分类号： C21D8/00
CPC分类号： B21J13/02 , B21J5/00
摘要： Disclosed is a method of predicting lives of dies for plastic processing of metals, typically, forging dies, to enable improved die design by predicting an important factor, low cycle fatigue life FL (shot number possible until the die lives end). The method is characterized in that the low cycle damage value “Dc” defined by the formula: Dc=σeq/(YS×softening rate), wherein, σeq is Von Misese's equivalent stress, YS is yield stress (including both of those at tension and compression), and that the following formula is introduced: FL=C1×exp(C2×DcC3), wherein, FL is shot number until the die fracture, and C1, C2 and C3 are constants depending on the material used, so as to presume the possible shot number of the die.
摘要翻译：公开了一种预测金属塑料加工（通常为锻造模具）的模具的寿命的方法，通过预测重要因素，低循环疲劳寿命FL（直到模具寿命结束的射出数量）来实现改进的模具设计。该方法的特征在于由下列公式定义的低循环损伤值“Dc”，其中，ΣSSS软化速率为VonMisese's 等效应力，YS是屈服应力（包括张力和压缩的两者），并且引入以下公式：FL = C 1 xexp（C 2×Dc < SUP> C3 ），其中，FL是直到模头断裂的喷射数，C 1，C 2和C 3 是根据所使用的材料的常数，以便假设模具的可能的射击次数。

20. 发明申请

US20060122885A1 Promotion method and system 审中-公开
公开(公告)号：US20060122885A1
公开(公告)日：2006-06-08
申请号：US11336051
申请日：2006-01-20
申请人： Michihiro Ota , Hiroaki Yoshida , Hiroaki Shinada
发明人： Michihiro Ota , Hiroaki Yoshida , Hiroaki Shinada
IPC分类号： G06Q30/00
CPC分类号： G06Q30/02 , G06Q30/0226 , G06Q30/0236 , G06Q30/0238 , G06Q30/0267
摘要： A promotion system which can manage a promotion system depending on various conditions and independently configure a plurality of promotion systems for individual distributors. A sub-code comprised of a distributor, date information, price information, an area code, etc. is added to point information.

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式