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11. 发明授权

US08035037B2 Core substrate and method of producing the same 失效
标题翻译：核心基材及其制造方法
公开(公告)号：US08035037B2
公开(公告)日：2011-10-11
申请号：US12170963
申请日：2008-07-10
申请人： Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
发明人： Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
IPC分类号： H05K1/11
CPC分类号： H05K3/4608 , H05K1/056 , H05K3/427 , H05K3/429 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09309 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , Y10S428/901 , Y10T29/49155
摘要： The core substrate is capable of securely preventing short circuit between an electrically conductive core section and a plated through-hole section. The core substrate comprises: an electrically conductive core section having a pilot hole, through which a plated through-hole section is formed; electrically conductive layers coating the inner face of the pilot hole and a surface of the core section; a gas purging hole being formed in the conductive layer coating the surface of the core section; an insulating material filling a space between the inner face of the pilot hole and an outer circumferential face of the plated through-hole section; and cable layers being laminated on both side faces of the core section.
摘要翻译：芯基板能够可靠地防止导电芯部与电镀通孔部之间的短路。芯基板包括：具有引导孔的导电芯部分，形成电镀通孔部分; 涂覆导向孔的内表面和芯部表面的导电层; 形成在所述芯部的表面上的导电层中形成的气体净化孔; 绝缘材料，其填充所述导向孔的内表面与所述电镀通孔部的外周面之间的空间; 并且层叠在芯部的两个侧面上的电缆层。

12. 发明申请

US20090095524A1 CORE SUBSTRATE AND METHOD OF PRODUCING THE SAME 失效
标题翻译：核心基板及其制造方法
公开(公告)号：US20090095524A1
公开(公告)日：2009-04-16
申请号：US12170963
申请日：2008-07-10
申请人： Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
发明人： Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Shin Hirano , Takashi Nakagawa , Hideaki Yoshimura , Seigo Yamawaki , Norikazu Ozaki
IPC分类号： H05K1/02 , H05K3/00
CPC分类号： H05K3/4608 , H05K1/056 , H05K3/427 , H05K3/429 , H05K3/4611 , H05K3/4691 , H05K2201/0281 , H05K2201/0323 , H05K2201/09309 , H05K2201/0959 , H05K2201/0969 , H05K2201/09809 , H05K2203/1178 , Y10S428/901 , Y10T29/49155
摘要： The core substrate is capable of securely preventing short circuit between an electrically conductive core section and a plated through-hole section. The core substrate comprises: an electrically conductive core section having a pilot hole, through which a plated through-hole section is formed; electrically conductive layers coating the inner face of the pilot hole and a surface of the core section; a gas purging hole being formed in the conductive layer coating the surface of the core section; an insulating material filling a space between the inner face of the pilot hole and an outer circumferential face of the plated through-hole section; and cable layers being laminated on both side faces of the core section.
摘要翻译：芯基板能够可靠地防止导电芯部与电镀通孔部之间的短路。芯基板包括：具有引导孔的导电芯部分，形成电镀通孔部分; 涂覆导向孔的内表面和芯部表面的导电层; 形成在所述芯部的表面上的导电层中形成的气体净化孔; 绝缘材料，其填充所述导向孔的内表面与所述电镀通孔部的外周面之间的空间; 并且层叠在芯部的两个侧面上的电缆层。

13. 发明申请

US20130096233A1 EPOXY RESIN COMPOSITION FOR PREPREG, PREPREG, AND MULTILAYER PRINTED CIRCUIT BOARD 有权
标题翻译： PREPREG，PREPREG和多层印刷电路板的环氧树脂组合物
公开(公告)号：US20130096233A1
公开(公告)日：2013-04-18
申请号：US13637629
申请日：2011-03-22
申请人： Tomoaki Iwami , Masaaki Matsumoto , Tomoyuki Abe , Tatsuo Yonemoto , Hiroaki Fujiwara
发明人： Tomoaki Iwami , Masaaki Matsumoto , Tomoyuki Abe , Tatsuo Yonemoto , Hiroaki Fujiwara
IPC分类号： C08L63/00 , C08K9/02 , C08K3/10 , C08K3/22
CPC分类号： C08L63/00 , C08G59/4021 , C08G59/621 , C08J5/24 , C08J2363/00 , C08K3/10 , C08K3/22 , C08K5/5313 , C08K5/5397 , C08K9/02 , H05K1/0326 , H05K1/0353 , H05K1/0366 , H05K1/0373 , H05K2201/012 , H05K2201/0209 , H05K2201/0227 , H05K2201/0263
摘要： The problem to be solved by the invention is to provide an epoxy resin composition for a prepreg, which is used in the manufacture of a printed circuit board containing a multilayer printed circuit board, wherein the epoxy resin composition for a prepreg is characterized by containing as essential components, a phosphorus compound that has 1.8 or more and less than 3 on average of a phenolic hydroxyl group that is reactive to an epoxy resin in the molecule, and that has 0.8 or more on average of a phosphorus element; a bifunctional epoxy resin that has 1.8 or more and less than 2.6 on average of epoxy groups in the molecule; a multi-functional epoxy resin that contains 2.8 or more on average of epoxy groups in one molecule; a hardening agent; an inorganic filler; and a molybdenum compound, wherein the epoxy resin composition for a prepreg is obtained by blending a pre-reacted epoxy resin, which is obtained by reacting at least the phosphorus compound with the bifunctional epoxy resin and the multi-functional epoxy resin, or the bifunctional epoxy resin only in advance, the bifunctional epoxy resin or the multi-functional epoxy resin, the hardening agent, the inorganic filler, and the molybdenum compound, which is excellent in flame retardance, heat resistance, thermal stiffness, and excellent in hole position accuracy without the production of a harmful substance at the time of combustion, a prepreg using the epoxy resin composition for a prepreg, and a multilayer printed circuit board using the prepreg.
摘要翻译：本发明要解决的问题是提供一种用于预浸料的环氧树脂组合物，其用于制造含有多层印刷电路板的印刷电路板，其中预浸料的环氧树脂组合物的特征在于含有必要成分，平均分子中与环氧树脂反应的酚羟基平均为1.8以上且小于3的磷化合物，平均为磷成分为0.8以上的磷化合物; 分子中环氧基团平均为1.8以上且小于2.6的双官能环氧树脂; 在一个分子中含有2.8个或更多个平均环氧基的多官能环氧树脂; 硬化剂; 无机填料; 和钼化合物，其中预浸料用环氧树脂组合物通过将至少使磷化合物与双官能环氧树脂和多官能环氧树脂反应获得的预反应环氧树脂或双官能团环氧树脂仅提前，双功能环氧树脂或多功能环氧树脂，硬化剂，无机填料和钼化合物，其阻燃性，耐热性，热刚度优异，孔位精度优异在燃烧时不产生有害物质，使用该预浸料坯用环氧树脂组合物的预浸料坯和使用该预浸料坯的多层印刷电路板。

14. 发明授权

US08158503B2 Multilayer interconnection substrate and method of manufacturing the same 有权
标题翻译：多层互连基板及其制造方法
公开(公告)号：US08158503B2
公开(公告)日：2012-04-17
申请号：US11474453
申请日：2006-06-26
申请人： Tomoyuki Abe
发明人： Tomoyuki Abe
IPC分类号： H01L21/44
CPC分类号： H05K3/4614 , H01L21/486 , H01L23/49822 , H01L23/49827 , H01L2924/0002 , H05K3/3473 , H05K3/4069 , H05K3/4617 , H05K3/462 , H05K2201/0215 , H05K2201/10378 , H01L2924/00
摘要： A multilayer interconnection substrate is disclosed that includes a multilayer interconnection layer having at least a first interconnection layer and a second interconnection layer stacked with an insulating layer provided therebetween, and a connection via configured to electrically connect the first interconnection layer and the second interconnection layer. The connection via includes an internal conductor and a metal film covering the internal conductor. The internal conductor is an aggregate of metal particles.
摘要翻译：公开了一种多层互连衬底，其包括具有至少第一互连层和层叠有设置在其间的绝缘层的第二互连层的多层互连层，以及经配置以电连接第一互连层和第二互连层的连接通孔。连接通孔包括内部导体和覆盖内部导体的金属膜。内部导体是金属颗粒的聚集体。

15. 发明授权

US08119923B2 Circuit board 失效
标题翻译：电路板
公开(公告)号：US08119923B2
公开(公告)日：2012-02-21
申请号：US12188257
申请日：2008-08-08
申请人： Hideaki Yoshimura , Kenji Fukuzono , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Takashi Nakagawa , Shin Hirano , Takashi Kanda
发明人： Hideaki Yoshimura , Kenji Fukuzono , Kenji Iida , Tomoyuki Abe , Yasutomo Maehara , Takashi Nakagawa , Shin Hirano , Takashi Kanda
IPC分类号： H05K1/00 , B32B9/00
CPC分类号： H05K1/0366 , H05K1/0271 , H05K1/056 , H05K3/4608 , H05K2201/0323 , H05K2201/068 , H05K2201/09145 , Y10T428/24917 , Y10T428/24926
摘要： A circuit board has a low thermal expansion coefficient that suits the thermal expansion coefficient of an element to be mounted thereupon and can prevent the occurrence of delamination and cracking of a core layer when the circuit board is used in a low temperature environment. The circuit board is constructed by laminating a core layer and at least one wiring layer, where the at least one wiring layer has slightly smaller external dimensions in a planar direction than the core layer.
摘要翻译：电路板具有适合要安装的元件的热膨胀系数的低热膨胀系数，并且可以防止当在低温环境中使用电路板时芯层的分层和破裂的发生。电路板通过层叠芯层和至少一个布线层而构成，其中至少一个布线层在平面方向上具有比芯层稍小的外部尺寸。

16. 发明授权

US07429796B2 Semiconductor device and fabrication process thereof 有权
公开(公告)号：US07429796B2
公开(公告)日：2008-09-30
申请号：US11483527
申请日：2006-07-11
申请人： Tomoyuki Abe , Shinya Iijima
发明人： Tomoyuki Abe , Shinya Iijima
IPC分类号： H01L23/48
CPC分类号： H01L21/563 , H01L23/49816 , H01L24/11 , H01L24/12 , H01L24/16 , H01L24/81 , H01L2224/05001 , H01L2224/05085 , H01L2224/05567 , H01L2224/1134 , H01L2224/13012 , H01L2224/13023 , H01L2224/13099 , H01L2224/13144 , H01L2224/73203 , H01L2224/81192 , H01L2224/81205 , H01L2224/81801 , H01L2924/00014 , H01L2924/01006 , H01L2924/01029 , H01L2924/01033 , H01L2924/01046 , H01L2924/01047 , H01L2924/0105 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10329 , H01L2924/14 , H01L2924/1423 , H01L2924/15787 , H01L2924/00 , H01L2224/05599 , H01L2224/05099
摘要： A semiconductor device includes a mount substrate and a semiconductor chip mounted upon the mount substrate via a metal bump, wherein metal bump includes an inner part joined to the semiconductor chip and an outer part covering the inner part, the outer part having an increased hardness as compared with the inner part.

17. 发明授权

US07382746B2 Transport channel selecting apparatus and the selecting method 失效
标题翻译：传输信道选择装置及选择方法
公开(公告)号：US07382746B2
公开(公告)日：2008-06-03
申请号：US10871262
申请日：2004-06-18
申请人： Tomoyuki Abe , Toshiyuki Yokosaka , Kazuto Sasaki
发明人： Tomoyuki Abe , Toshiyuki Yokosaka , Kazuto Sasaki
IPC分类号： H04Q7/00
CPC分类号： H04L69/32 , H04L47/14 , H04L47/2425 , H04L47/50 , H04L47/521 , H04L47/621 , H04W8/26 , H04W28/14 , H04W72/02
摘要： A transport channel selecting apparatus is provided, in which the transport channel selecting apparatus includes: a storage for storing information on combinations of transport blocks of transport channels to be transmitted to a radio base station; a transmission buffer for storing transport blocks of the transport channels; an address generation part for generating an address by using numbers of the transport blocks stored in the transmission buffer for each transport channel; an extraction part for extracting, from the storage, information on a combination of transport blocks of transport channels corresponding to the address; and a selection part for selecting transport blocks from the transmission buffer according to the combination indicated by the extracted information.
摘要翻译：提供了一种传输信道选择装置，其中传输信道选择装置包括：存储关于要发送到无线电基站的传输信道的传输块的组合的信息; 传输缓冲器，用于存储传输信道的传输块; 地址生成部，其通过使用存储在所述发送缓冲器中的每个传送信道的传输块的数量来生成地址; 提取部分，用于从存储器中提取关于与该地址对应的传输信道的传输块的组合的信息; 以及选择部件，用于根据由所提取的信息指示的组合从传输缓冲器中选择传输块。

18. 发明申请

US20060043568A1 Semiconductor device having multilayer printed wiring board and manufacturing method of the same 有权
标题翻译：具有多层印刷线路板的半导体器件及其制造方法
公开(公告)号：US20060043568A1
公开(公告)日：2006-03-02
申请号：US11023044
申请日：2004-12-28
申请人： Tomoyuki Abe , Motoaki Tani
发明人： Tomoyuki Abe , Motoaki Tani
IPC分类号： H01L21/48 , H01L23/04
CPC分类号： H01L21/4857 , H01L23/13 , H01L23/36 , H01L23/49833 , H01L23/5389 , H01L2224/16 , H01L2224/16225 , H01L2224/16235 , H01L2224/73253 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15153 , H01L2924/1517 , H01L2924/15312 , H01L2924/19105 , H01L2924/19106 , H01L2924/3011 , H01L2924/3511
摘要： A semiconductor device includes a support body, a first substrate provided on a surface at one side of the support body, a second substrate provided on a surface at the other side of the support body, and a semiconductor chip provided on the first substrate exposed to an opening part piercing the support body and the second substrate. The first substrate includes a first dielectric layer and a wiring layer, a plurality of first electrodes connected to the semiconductor chip which first electrodes are provided on a first surface of the first substrate exposed to an inside of the opening part, and the second substrate includes a second dielectric layer made of a material substantially the same as the first dielectric layer.
摘要翻译：半导体器件包括支撑体，设置在支撑体的一侧的表面上的第一基板，设置在支撑体的另一侧的表面上的第二基板和设置在第一基板上的半导体芯片，穿过所述支撑体和所述第二基板的开口部。第一基板包括第一介电层和布线层，多个与半导体芯片连接的第一电极，第一电极设置在暴露于开口部的内部的第一基板的第一表面上，第二基板包括由与第一电介质层基本相同的材料制成的第二电介质层。

19. 发明申请

US20050193030A1 File management method 审中-公开
标题翻译：文件管理方式
公开(公告)号：US20050193030A1
公开(公告)日：2005-09-01
申请号：US11066235
申请日：2005-02-25
申请人： Tomoyuki Abe
发明人： Tomoyuki Abe
IPC分类号： G06F12/00 , G06F17/30 , H04N5/76 , H04N5/907
CPC分类号： G06F16/10
摘要： In a file management method, a management entry is recorded in a predetermined position, and creation or deletion of a file is carried out. During file creation or deletion, data relating to the management entry and a file deletion destination entry of a file to be deleted or a file creation destination entry of a file to be created are updated, whereby the latest link is created among the management entry, the deletion entry, and the unused entry. So, even when a deletion entry or an unused entry is located in a backward position in the directory, these entries can be speedily detected during file formation regardless of the number of files.
摘要翻译：在文件管理方法中，将管理条目记录在预定位置，并执行文件的创建或删除。在文件创建或删除期间，更新与要删除的文件的管理条目和文件删除目的地条目相关的数据或要创建的文件的文件创建目的地条目，由此在管理条目中创建最新链接，删除条目和未使用的条目。因此，即使删除条目或未使用的条目位于目录中的后退位置，也可以在文件形成期间快速检测这些条目，而不管文件数量。

20. 发明申请

US20050135400A1 Transport channel selecting apparatus and the selecting method 失效
标题翻译：传输信道选择装置及选择方法
公开(公告)号：US20050135400A1
公开(公告)日：2005-06-23
申请号：US10871262
申请日：2004-06-18
申请人： Tomoyuki Abe , Toshiyuki Yokosaka , Kazuto Sasaki
发明人： Tomoyuki Abe , Toshiyuki Yokosaka , Kazuto Sasaki
IPC分类号： H04W28/00 , H04L12/70 , H04L29/06 , H04L29/08 , H04L29/12 , H04W8/26 , H04W28/14 , H04W72/02 , H04W72/12 , H04W76/02 , H04L1/00 , G01R31/08 , G06F11/00 , G08C15/00 , H04J1/16 , H04J3/14 , H04J3/16 , H04J3/22 , H04L12/26 , H04L12/28 , H04Q7/00
CPC分类号： H04L69/32 , H04L47/14 , H04L47/2425 , H04L47/50 , H04L47/521 , H04L47/621 , H04W8/26 , H04W28/14 , H04W72/02
摘要： A transport channel selecting apparatus is provided, in which the transport channel selecting apparatus includes: a storage for storing information on combinations of transport blocks of transport channels to be transmitted to a radio base station; a transmission buffer for storing transport blocks of the transport channels; an address generation part for generating an address by using numbers of the transport blocks stored in the transmission buffer for each transport channel; an extraction part for extracting, from the storage, information on a combination of transport blocks of transport channels corresponding to the address; and a selection part for selecting transport blocks from the transmission buffer according to the combination indicated by the extracted information.
摘要翻译：提供了一种传输信道选择装置，其中传输信道选择装置包括：存储关于要发送到无线电基站的传输信道的传输块的组合的信息; 传输缓冲器，用于存储传输信道的传输块; 地址生成部，其通过使用存储在所述发送缓冲器中的每个传送信道的传输块的数量来生成地址; 提取部分，用于从存储器中提取关于与该地址对应的传输信道的传输块的组合的信息; 以及选择部件，用于根据由所提取的信息指示的组合从传输缓冲器中选择传输块。

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