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    • 11. 发明申请
    • Method for fast macroblock mode decision
    • 快速宏块模式决策方法
    • US20060203911A1
    • 2006-09-14
    • US11149363
    • 2005-06-10
    • Zhi ZhouMing-Ting SunShin-Huang Chang
    • Zhi ZhouMing-Ting SunShin-Huang Chang
    • H04N11/02H04N11/04H04N7/12H04B1/66
    • H04N19/19H04N19/109H04N19/139H04N19/14H04N19/176H04N19/513H04N19/56H04N19/61
    • A method for fast macroblock mode decision is disclosed. The method includes: (A) determining if a motion cost at the origin (0, 0) or a prediction motion vector (PMV) for a 4n*4n macroblock is smaller than a first threshold; (B) if the motion cost is smaller than the first threshold, determining a macroblock mode as 4n*4n and ending the method; (C) if the motion cost is not smaller than the first threshold, using an adaptive diversity search strategy to perform motion estimation on four 2n*2n blocks associated with the 4n*4n macroblock; (D) determining if all motion costs of the four 2n*2n blocks in step (C) are smaller than a second threshold; and (E) if step (D) determines that the motion costs of the four 2n*2n blocks are smaller than the second threshold, determining the macroblock mode as 2n*2n and ending the method.
    • 公开了一种用于快速宏块模式决策的方法。 该方法包括:(A)确定4n * 4n宏块的原点(0,0)或预测运动矢量(PMV)的运动成本是否小于第一阈值; (B)如果运动成本小于第一阈值,则确定宏块模式为4n * 4n并结束该方法; (C)如果运动成本不小于第一阈值,则使用自适应分集搜索策略对与4n * 4n宏块相关联的四个2n * 2n块执行运动估计; (D)确定步骤(C)中的四个2n * 2n块的所有运动成本是否小于第二阈值; 和(E)如果步骤(D)确定四个2n * 2n块的运动成本小于第二阈值,则将宏块模式确定为2n * 2n并结束该方法。
    • 12. 发明授权
    • Variable-length codeword encoder
    • 可变长码字编码器
    • US5436626A
    • 1995-07-25
    • US906269
    • 1992-06-26
    • Hiroshi FujiwaraToshifumi SakaguchiAkio ShimatzuMing-Ting SunKou-Hu TzouKun-Min Yang
    • Hiroshi FujiwaraToshifumi SakaguchiAkio ShimatzuMing-Ting SunKou-Hu TzouKun-Min Yang
    • H03M7/40H03M7/42
    • H03M7/42
    • A variable-length codeword encoder is disclosed which produces 8-bit output segments for storage in a buffer (23) for subsequent transmission over a transmission channel (24). The encoder includes two memory tables (15, 16), which produce in response to each input symbol to be encoded, a variable-length codeword and an a codeword length. An accumulator (31, 33) accumulates, modulo-8, the successive codeword lengths, producing a carry signal during any clock cycle in which eight or more bits codeword bits are accumulated. At each clock cycle, the variable-length codeword is input to the parallel inputs of a cross bar shift control circuit (30). This shift control circuit produces a 16-bit output in which the input word is embedded. The input word is shifted in the 16-bit output from the more significant bit positions to the less significant positions by a shift value determined from previous accumulated codeword lengths, with the shift value number of "0" bits being inserted in the more significant bit positions preceding the codeword. An OR circuit (38) combines the shifted variable-length codeword with previous variable-length codeword bits to form a concatenated sequence which is stored in upper and lower latches (53, 54). At any clock cycle, when the number of accumulated codeword bits is less than eight, the concatenated bits stored in the first and second latches are fed back to the OR circuit for combination at the next clock cycle with the next shifted variable-length codeword. When eight or more codeword bits are accumulated, the accumulator produces a carry signal and the 8-bit segment in the upper latch is outputted. The 8-bits in the lower latch are then shifted to the more significant bit positions of a concatenated sequence that is fed back to the OR circuit for combination with the next shifted variable-length codeword.
    • 公开了一种可变长度码字编码器,其产生用于存储在缓冲器(23)中的8位输出段,用于通过传输信道(24)进行后续传输。 编码器包括响应于要编码的每个输入符号产生可变长度码字和码字长度的两个存储器表(15,16)。 累加器(31,33)以模8的顺序累积连续的码字长度,在任何时钟周期内产生进位信号,其中8个或更多个比特码字比特被累积。 在每个时钟周期,可变长度码字被输入到横杠移位控制电路(30)的并行输入端。 该移位控制电路产生输入字被嵌入的16位输出。 输入字在16位输出中从更高有效位位置移位到较低有效位置,通过从先前累积的码字长度确定的移位值,将移位值数“0”位插入更高有效位 位于码字之前的位置。 OR电路(38)将移位的可变长度码字与先前的可变长度码字比特组合以形成存储在上锁存器(53)和下锁存器(54)中的级联序列。 在任何时钟周期,当累积的码字比特数小于8时,存储在第一和第二锁存器中的级联比特被反馈到或电路,用于在下一个时钟周期与下一个移位的可变长度码字组合。 当八个或更多个码字比特被累积时,累加器产生进位信号,并且输出上锁存器中的8比特段。 然后,较低锁存器中的8位移动到反馈到OR电路的级联序列的更高有效位位置,以与下一个移位的可变长度码字组合。
    • 13. 发明授权
    • Method for fast multiple reference frame motion estimation
    • 快速多参考帧运动估计方法
    • US07733958B2
    • 2010-06-08
    • US11135326
    • 2005-05-24
    • Yeping SuMing-Ting SunShin-Huang Chang
    • Yeping SuMing-Ting SunShin-Huang Chang
    • H04N7/12H04N11/02H04N11/04H04B1/66
    • H04N19/573H04N19/51H04N19/61
    • A method for fast multiple reference frame motion estimation, which is used to perform motion estimation between a current frame and reference frames Fn−1, Fn−2, . . . , Fn−k. The method performs a special block matching to find a plurality of motion vectors for blocks of each frame with respective to a previous frame and then composes motion vector(s) of the current frame referring to the reference frame Fn−(k−1) and a motion vector of the reference frame Fn−(k−1) referring to the reference frame Fn−k into composed motion vectors of the current frame referring to the reference frame Fn−k for the block in the current frame. The method selects a composed motion vector with a minimum of cost function from the composed motion vectors produced when composing the motion vectors and then finely adjusts the composed motion vector selected, thereby obtaining an adjusted motion vector.
    • 一种用于快速多参考帧运动估计的方法,用于执行当前帧与参考帧Fn-1,Fn-2之间的运动估计。 。 。 ,Fn-k。 该方法执行特殊块匹配以针对前一帧的每个帧的块寻找多个运动矢量,然后参考参考帧Fn-(k-1)和 将参考帧Fn-k的参考帧Fn-(k-1)的参考帧Fn-k的运动矢量参考当前帧中的块的参考帧Fn-k作为当前帧的组合运动矢量。 该方法从构成运动矢量时产生的组合运动矢量中选择具有最小成本函数的组合运动矢量,然后精细调整所选择的组合运动矢量,从而获得调整后的运动矢量。
    • 14. 发明申请
    • Method for fast multiple reference frame motion estimation
    • 快速多参考帧运动估计方法
    • US20060120613A1
    • 2006-06-08
    • US11135326
    • 2005-05-24
    • Yeping SuMing-Ting SunShin-Huang Chang
    • Yeping SuMing-Ting SunShin-Huang Chang
    • G06K9/36
    • H04N19/573H04N19/51H04N19/61
    • A method for fast multiple reference frame motion estimation, which is used to perform motion estimation between a current frame and reference frames Fn−1, Fn−2, . . . , Fn−k. The method performs a special block matching to find a plurality of motion vectors for blocks of each frame with respective to a previous frame and then composes motion vector(s) of the current frame referring to the reference frame Fn−(k−1) and a motion vector of the reference frame Fn−(k−1) referring to the reference frame Fn−k into composed motion vectors of the current frame referring to the reference frame Fn−k for the block in the current frame. The method selects a composed motion vector with a minimum of cost function from the composed motion vectors produced when composing the motion vectors and then finely adjusts the composed motion vector selected, thereby obtaining an adjusted motion vector.
    • 一种用于快速多参考帧运动估计的方法,用于执行当前帧与参考帧Fn-1,Fn-2之间的运动估计。 。 。 ,Fn-k。 该方法执行特殊块匹配以针对前一帧的每个帧的块寻找多个运动矢量,然后参考参考帧Fn-(k-1)和 将参考帧Fn-k的参考帧Fn-(k-1)的参考帧Fn-k的运动矢量参考当前帧中的块的参考帧Fn-k作为当前帧的组合运动矢量。 该方法从构成运动矢量时产生的组合运动矢量中选择具有最小成本函数的组合运动矢量,然后精细调整所选择的组合运动矢量,从而获得调整后的运动矢量。
    • 15. 发明授权
    • Transcoding apparatus and method
    • 转码装置及方法
    • US06650707B2
    • 2003-11-18
    • US09796600
    • 2001-03-02
    • Jeongnam YounMing-Ting SunChia-Wen LinWen-Hao Wang
    • Jeongnam YounMing-Ting SunChia-Wen LinWen-Hao Wang
    • H04N712
    • H04N19/59H04N19/126H04N19/132H04N19/176H04N19/18H04N19/40H04N19/61H04N19/91
    • A transcoder for transcoding digital video signals includes a decoder and an encoder. In the decoder, an end-of-block (EOB) position of an incoming block received by the decoder is determined and a discrete cosine transform (DCT) block type is determined based on the determined EOB position. A reduced number of DCT coefficients is computed in a subsequent inverse DCT computation based on the DCT block type. In the encoder, if the incoming block is intercoded, no DCT coefficients are computed after the EOB of the incoming blocks is performing a DCT. Further, in the encoder when the incoming block is intercoded, an algorithm is applied to predict which DCT coefficients may become zero after a subsequent quantization operation, and only DCT coefficients that may not become zero are computed in performing the DCT.
    • 用于对数字视频信号进行代码转换的代码转换器包括解码器和编码器。 在解码器中,确定由解码器接收的输入块的块结束位置(EOB),并且基于所确定的EOB位置来确定离散余弦变换(DCT)块类型。 基于DCT块类型在后续的逆DCT计算中计算减少数量的DCT系数。 在编码器中,如果输入块被相互编码,则在输入块的EOB执行DCT之后不计算DCT系数。 此外,在输入块被编码时的编码器中,应用算法来预测在后续量化操作之后哪些DCT系数可能变为零,并且在执行DCT时仅计算可能不变为零的DCT系数。
    • 16. 发明授权
    • Method and apparatus for motion estimation for high performance transcoding
    • 用于高性能转码的运动估计的方法和装置
    • US06466623B1
    • 2002-10-15
    • US09276826
    • 1999-03-26
    • Jeongnam YounMing-Ting SunChia-Wen Lin
    • Jeongnam YounMing-Ting SunChia-Wen Lin
    • H04N726
    • H04N19/40H04N19/51
    • Methods and systems for generating motion vectors for re-encoding video signals are disclosed. The motion vector is determined by the sum of a base motion vector and a delta motion vector. In the case of no frame-skipping, the base motion vector is the incoming motion vector. In the case of frame skipping, the base motion vector is the sum of the motion vectors of the incoming signal since the last re-encoded frame and the current frame. The delta motion vector is optimized by a minimum Sum of the Absolute Difference by searching over a smaller area than if searching for a new motion vector without a delta motion vector. These methods and systems may be used to improve re-encoding digital video signals.
    • 公开了用于产生用于重新编码视频信号的运动矢量的方法和系统。 运动矢量由基运动矢量和增量运动矢量之和确定。 在没有跳帧的情况下,基运动矢量是传入运动矢量。 在跳帧的情况下,基运动矢量是自上次再编码帧和当前帧以来的输入信号的运动矢量的和。 通过搜索较小的区域,通过搜索绝对差的最小和来优化增量运动矢量,而不是在没有增量运动矢量的情况下搜索新的运动矢量。 这些方法和系统可以用于改进对数字视频信号的重新编码。
    • 17. 发明授权
    • Two-dimensional discrete cosine transform processor
    • 二维离散余弦变换处理器
    • US4791598A
    • 1988-12-13
    • US29761
    • 1987-03-24
    • Ming-Lei LiouMing-Ting SunLancelot Wu
    • Ming-Lei LiouMing-Ting SunLancelot Wu
    • G06F17/14G06T9/00G06F15/332
    • G06T9/008G06F17/147G06T9/007
    • This processor is capable of real time processing of blocks of video pixel or other two-dimensional data to yield the two-dimensional Discrete Cosine Transform (DCT) thereof. The processor can be used as part of a video bandwidth or image compression system. The circuitry comprises a first one-dimensional DCT processor which simultaneously computes an entire row or column of vector inner products by using distributed arthmetic and using decimation-in-frequency to reduce the amount of memory capacity (ROM) required. Partial sums may also be used to further reduce ROM size. The one-dimensional transformed matrix from the first processor is stored in a transposition memory and the transpose of the stored matrix is applied to a second one-dimensional DCT processor of similar circuitry which computes the desired two-dimensional DCT of the input data matrix.
    • 该处理器能够对视频像素块或其他二维数据进行实时处理,以产生其二维离散余弦变换(DCT)。 处理器可以用作视频带宽或图像压缩系统的一部分。 该电路包括第一个一维DCT处理器,它通过使用分布式关节同时计算矢量内积的整个行或列,并使用频率抽取来减少所需的存储器容量(ROM)量。 也可以使用部分和来进一步减少ROM大小。 来自第一处理器的一维变换矩阵被存储在转置存储器中,并且存储的矩阵的转置被应用于计算输入数据矩阵的所需二维DCT的类似电路的第二一维DCT处理器。