专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

11. 发明授权

US07403426B2 Memory with dynamically adjustable supply 有权
标题翻译：内存动态可调电源
公开(公告)号：US07403426B2
公开(公告)日：2008-07-22
申请号：US11137905
申请日：2005-05-25
申请人： Fatih Hamzaoglu , Kevin Zhang , Nam Sung Kim , Muhammad M. Khellah , Dinesh Somasekhar , Yibin Ye , Vivek K. De , Bo Zheng
发明人： Fatih Hamzaoglu , Kevin Zhang , Nam Sung Kim , Muhammad M. Khellah , Dinesh Somasekhar , Yibin Ye , Vivek K. De , Bo Zheng
IPC分类号： G11C11/34
CPC分类号： G11C5/14 , G11C11/413
摘要： In some embodiments, a memory array is provided with cells that when written to or read from, can have modified supplies to enhance their read stability and/or write margin performance. Other embodiments may be disclosed and/or claimed.
摘要翻译：在一些实施例中，存储器阵列具有当写入或读取时可以具有修改的电源以增强其读取稳定性和/或写入裕度性能的单元。可以公开和/或要求保护其他实施例。

12. 发明申请

US20070223860A1 THIN FILM INTERLEAVER 有权
标题翻译：薄膜交织器
公开(公告)号：US20070223860A1
公开(公告)日：2007-09-27
申请号：US11753499
申请日：2007-05-24
申请人： Johnny Zhong , Yin Zhang , Steve Wang , Ping Xie , Kevin Zhang
发明人： Johnny Zhong , Yin Zhang , Steve Wang , Ping Xie , Kevin Zhang
IPC分类号： G02B6/26
CPC分类号： G02B6/2937 , G02B6/29386 , H04J14/02
摘要： A thin film interleaver device is disclosed. The thin film interleaver includes thin film optics. The thin film(s) are formed such that they reflect one group of wavelengths while allowing a second group of wavelengths to pass through the thin film(s). The thin film(s) exhibit a flat top frequency response across the channel bandwidths of the multiplexed signal for which the thin film filter is designed such that the thin film interleaver is less sensitive to wavelength drift and temperature variations.
摘要翻译：公开了一种薄膜交织器件。薄膜交织器包括薄膜光学器件。薄膜形成为使得它们反射一组波长，同时允许第二组波长穿过薄膜。该薄膜在多路复用信号的通道带宽上表现出平坦的顶频响应，薄膜滤波器被设计成使得薄膜交织器对波长漂移和温度变化较不敏感。

13. 发明申请

US20070005999A1 Cache leakage shut-off mechanism 有权
标题翻译：缓存泄漏关闭机制
公开(公告)号：US20070005999A1
公开(公告)日：2007-01-04
申请号：US11174204
申请日：2005-06-30
申请人： Stefan Rusu , Tsung-Yung Chang , Kevin Zhang , Fatih Hamzaoglu , Jonathan Shoemaker , Ming Huang
发明人： Stefan Rusu , Tsung-Yung Chang , Kevin Zhang , Fatih Hamzaoglu , Jonathan Shoemaker , Ming Huang
IPC分类号： G06F1/00
CPC分类号： G06F1/32 , G06F1/3287 , G11C11/417 , Y02D10/171
摘要： In one embodiment of the present invention, a technique is provided to control leakage of a cache sub-array. Other embodiments are disclosed herein. A sleep and shut-off circuit is connected between a virtual supply terminal and a first physical supply terminal to reduce leakage from the cache sub-array when the cache sub-array is disabled in a shut-off mode. The cache sub-array is connected between the virtual supply terminal and a second physical supply terminal. An active circuit is connected to the sleep and shut-off circuit in parallel to enable the cache sub-array in a normal mode and to disable the cache sub-array in the shut-off mode.
摘要翻译：在本发明的一个实施例中，提供了一种用于控制高速缓存子阵列的泄漏的技术。本文公开了其它实施例。睡眠和关闭电路连接在虚拟供应终端和第一物理供应终端之间，以便在关闭模式下禁用高速缓存子阵列时减少从高速缓存子阵列的泄漏。高速缓存子阵列连接在虚拟供电终端和第二物理供应终端之间。有源电路并联连接到睡眠和关闭电路，以使高速缓存子阵列处于正常模式，并在关闭模式下禁用高速缓存子阵列。

14. 发明申请

US20060002177A1 Six-transistor (6T) static random access memory (SRAM) with dynamically variable p-channel metal oxide semiconductor (PMOS) strength 有权
标题翻译：具有动态可变p沟道金属氧化物半导体（PMOS）强度的六晶体管（6T）静态随机存取存储器（SRAM）
公开(公告)号：US20060002177A1
公开(公告)日：2006-01-05
申请号：US10883609
申请日：2004-06-30
申请人： Bo Zheng , Kevin Zhang , Fatih Hamzaoglu , Yih Wang
发明人： Bo Zheng , Kevin Zhang , Fatih Hamzaoglu , Yih Wang
IPC分类号： G11C11/00
CPC分类号： G11C11/417 , G11C11/412
摘要： In embodiments of the present invention, a static random access memory (SRAM) device has an array of memory cells in columns and rows. An individual memory cell includes two PMOS pull-up devices coupled to two NMOS pull-down devices. In READ mode and/or STANDBY/NO-OP mode of a column, the two PMOS pull-up devices are effectively strengthened by forward biasing the PMOS n-wells or by utilizing a lower threshold voltage PMOS device by implanting a lower halo dose in the PMOS device. In WRITE mode of a column, the two PMOS pull-up devices are effectively weakened by reverse biasing the PMOS n-wells or by coupling the sources of the NMOS devices to virtual ground (VSSi).
摘要翻译：在本发明的实施例中，静态随机存取存储器（SRAM）装置具有列和行中的存储器单元阵列。单个存储单元包括耦合到两个NMOS下拉器件的两个PMOS上拉器件。在列的READ模式和/或STANDBY / NO-OP模式下，通过正向偏置PMOS n阱或利用较低阈值电压PMOS器件，通过将较低的光晕剂量 PMOS器件。在列的写入模式下，通过反向偏置PMOS n阱或通过将NMOS器件的源耦合到虚拟接地（V SUB SSi），两个PMOS上拉器件被有效地削弱。

15. 发明授权

US06891999B1 Method and apparatus for precision tuning an optical filter using a ball-end joint 有权
标题翻译：使用球头接头对光学滤波器进行精密调谐的方法和装置
公开(公告)号：US06891999B1
公开(公告)日：2005-05-10
申请号：US09941474
申请日：2001-08-28
申请人： Kevin Zhang , Ping Xie
发明人： Kevin Zhang , Ping Xie
IPC分类号： G02B6/10 , G02B6/34 , G02B6/38 , G02B6/26 , G02B6/42
CPC分类号： G02B6/2937 , G02B6/105 , G02B6/29395 , G02B6/3812
摘要： Methods and apparatus for tuning an optical element include, in one aspect, an optical element having a specified response at a predetermined location and means for redirecting incident light to a location on the optical element other than the predetermined location so as to achieve a desired response.
摘要翻译：用于调谐光学元件的方法和装置在一个方面包括在预定位置具有特定响应的光学元件，以及用于将入射光重定向到除了预定位置之外的光学元件上的位置的装置，以便实现期望的响应。

16. 发明授权

US06282143B1 Multi-port static random access memory design for column interleaved arrays 失效
标题翻译：用于列交错阵列的多端口静态随机存取存储器设计
公开(公告)号：US06282143B1
公开(公告)日：2001-08-28
申请号：US09084689
申请日：1998-05-26
申请人： Kevin Zhang , John Wuu
发明人： Kevin Zhang , John Wuu
IPC分类号： G11C800
CPC分类号： G11C8/16
摘要： A static random-access memory (SRAM) comprises multi-port storage cells with built-in column-interleave selection circuitry which allow a storage cell to be written to via a plurality of different write paths. Column selects are built into each storage cell by adding an additional isolating switch between the storage node of the storage cell and the bitline of a particular write path in order to prevent a cell write from affecting other storage cells connected to the same wordline in the same interleaved array. The write data bus corresponding to each write path for all interleaved cells are shared by all storage cells in a common interleave group, and each adjacent pair of storage cells in a common row share bitlines coupled to the common data bus, resulting in smaller number of required bitlines.
摘要翻译：静态随机存取存储器（SRAM）包括具有内置列交错选择电路的多端口存储单元，其允许经由多个不同写入路径写入存储单元。通过在存储单元的存储节点和特定写入路径的位线之间添加一个额外的隔离开关，可以在每个存储单元中内置列选择，以防止单元写入影响连接到同一字线的其他存储单元交错数组。与所有交织单元的每个写入路径对应的写数据总线由公共交错组中的所有存储单元共享，并且公共行中的每个相邻的存储单元对共享与公共数据总线相连的位线，导致较小数量的需要的位线

17. 发明授权

US08395923B2 Antifuse programmable memory array 有权
标题翻译：防毒可编程存储器阵列
公开(公告)号：US08395923B2
公开(公告)日：2013-03-12
申请号：US12639446
申请日：2009-12-16
申请人： Zhanping Chen , Sarvesh H. Kulkarni , Kevin Zhang
发明人： Zhanping Chen , Sarvesh H. Kulkarni , Kevin Zhang
IPC分类号： G11C17/00 , G11C7/00 , G11C17/18 , G11C5/14
CPC分类号： G11C17/16 , G11C17/18
摘要： Techniques and circuitry are disclosed for efficiently implementing programmable memory array circuit architectures, such as PROM, OTPROM, and other such programmable non-volatile memories. The circuitry employs an antifuse scheme that includes an array of memory bitcells, each containing a program device and an antifuse element configured with current path isolation well and for storing the memory cell state. The bitcell configuration, which can be used in conjunction with column/row select circuitry, power selector circuitry, and/or readout circuitry, allows for high-density memory array circuit designs and layouts.
摘要翻译：公开了用于有效实现诸如PROM，OTPROM和其它这样的可编程非易失性存储器的可编程存储器阵列电路架构的技术和电路。电路采用反熔丝方案，其包括存储位单元阵列，每个存储器单元包含程序设备和配置有电流路径隔离阱并用于存储存储单元状态的反熔丝元件。可以与列/行选择电路，功率选择器电路和/或读出电路结合使用的位单元配置允许高密度存储器阵列电路设计和布局。

18. 发明授权

US07660498B2 Multimode reflective tap 有权
标题翻译：多模反光丝锥
公开(公告)号：US07660498B2
公开(公告)日：2010-02-09
申请号：US12103365
申请日：2008-04-15
申请人： Kevin Zhang , Guojun Lai , Youjian Wu , Fahua Lan
发明人： Kevin Zhang , Guojun Lai , Youjian Wu , Fahua Lan
IPC分类号： G02B6/32
CPC分类号： G02B6/327 , G02B6/14
摘要： A glass optical reflective tap is described that optically connects two optical fibers and may tap a portion of the light that is being communicated between the optical fibers. In one embodiment of the invention, the optical filter includes two D-lenses that operate as focusing or collimator lenses. The first D-lens focuses an optical signal onto a tap filter that allows a majority of the light within an optical signal to pass and also reflects a small portion of optical signal light to a reflective port. The second D-lens focuses the passed light into a transmission port of an optical fiber.
摘要翻译：描述了玻璃光学反射抽头，其光学地连接两根光纤并且可以抽出正在光纤之间连通的一部分光。在本发明的一个实施例中，滤光器包括作为聚焦或准直透镜操作的两个D透镜。第一个D透镜将光信号聚焦到抽头滤波器上，允许光信号内的大部分光通过，并将一小部分光信号光反射到反射端口。第二个D镜头将通过的光线聚焦到光纤的传输端口。

19. 发明授权

US07561766B2 Thin film interleaver 有权
标题翻译：薄膜交织器
公开(公告)号：US07561766B2
公开(公告)日：2009-07-14
申请号：US11753499
申请日：2007-05-24
申请人： Johhny Zhong , Yin Zhang , Steve Wang , Ping Xie , Kevin Zhang
发明人： Johhny Zhong , Yin Zhang , Steve Wang , Ping Xie , Kevin Zhang
IPC分类号： G02B6/26 , G02B6/42 , G02B6/32
CPC分类号： G02B6/2937 , G02B6/29386 , H04J14/02
摘要： A thin film interleaver device is disclosed. The thin film interleaver includes thin film optics. The thin film(s) are formed such that they reflect one group of wavelengths while allowing a second group of wavelengths to pass through the thin film(s). The thin film(s) exhibit a flat top frequency response across the channel bandwidths of the multiplexed signal for which the thin film filter is designed such that the thin film interleaver is less sensitive to wavelength drift and temperature variations.
摘要翻译：公开了一种薄膜交织器件。薄膜交织器包括薄膜光学器件。薄膜形成为使得它们反射一组波长，同时允许第二组波长穿过薄膜。该薄膜在多路复用信号的通道带宽上表现出平坦的顶频响应，薄膜滤波器被设计成使得薄膜交织器对波长漂移和温度变化较不敏感。

20. 发明申请

US20080151593A1 Fuse cell array with redundancy features 有权
标题翻译：具有冗余特性的保险丝座阵列
公开(公告)号：US20080151593A1
公开(公告)日：2008-06-26
申请号：US11644381
申请日：2006-12-22
申请人： Zhanping Chen , Jonathan P. Douglas , Praveen Mosalikanti , Kevin Zhang , Gregory F. Taylor
发明人： Zhanping Chen , Jonathan P. Douglas , Praveen Mosalikanti , Kevin Zhang , Gregory F. Taylor
IPC分类号： G11C17/16
CPC分类号： G11C17/16 , G11C17/14 , G11C17/18 , G11C29/816
摘要： An apparatus, a method, and a system for a fuse cell array are disclosed herein. A plurality of fuse cells are arranged in an array. One or more fuse cells include a pair of fuse devices to output a pair of voltages, respectively, wherein the pair of fuse devices are redundantly programmed. A sense amplifier is coupled to the plurality of fuse cells to read the pair of voltage outputs from each of the plurality of fuse cells, respectively. A comparator circuit is coupled to the sense amplifier to compare the pair of voltage outputs for each of the plurality of fuse cells and to output the compared result.
摘要翻译：本文公开了一种用于熔丝单元阵列的装置，方法和系统。多个熔丝单元被布置成阵列。一个或多个保险丝单元包括分别输出一对电压的一对熔丝器件，其中该对熔丝器件被冗余编程。感测放大器耦合到多个熔丝单元以分别从多个熔丝单元中的每一个读出一对电压输出。比较器电路耦合到读出放大器以比较多个熔丝单元中的每一个的一对电压输出并输出比较结果。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式