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11. 发明申请

US20060172505A1 Structure and method of integrating compound and elemental semiconductors for high-performace CMOS 失效
标题翻译：化合物和元素半导体用于高性能CMOS的结构和方法
公开(公告)号：US20060172505A1
公开(公告)日：2006-08-03
申请号：US11046912
申请日：2005-01-31
申请人： Steven Koester , Devendra Sadana , Ghavam Shahidi
发明人： Steven Koester , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L21/30 , H01L21/46
CPC分类号： H01L21/823807 , H01L21/02002 , H01L21/76254 , H01L21/76256 , H01L21/8258 , H01L21/84 , H01L27/1203
摘要： A method for fabricating a semiconductor substrate includes epitaxially growing an elemental semiconductor layer on a compound semiconductor substrate. An insulating layer is deposited on top of the elemental semiconductor layer, so as to form a first substrate. The first substrate is wafer bonded onto a monocrystalline Si substrate, such that the insulating layer bonds with the monocrystalline Si substrate. A semiconductor device includes a monocrystalline substrate, and a dielectric layer formed on the monocrystalline substrate. A semiconductor compound is formed on the dielectric layer and an elemental semiconductor material formed in proximity of the semiconductor compound and lattice-matched to the semiconductor compound.
摘要翻译：制造半导体衬底的方法包括在化合物半导体衬底上外延生长元素半导体层。绝缘层沉积在元素半导体层的顶部上，以形成第一衬底。第一衬底被晶片结合到单晶Si衬底上，使得绝缘层与单晶Si衬底结合。半导体器件包括单晶衬底和形成在单晶衬底上的电介质层。在介电层上形成半导体化合物，在半导体化合物附近形成与半导体化合物晶格匹配的元素半导体材料。

12. 发明申请

US20050093100A1 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-insulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和绝缘体上（GeI）绝缘体（GOI）基板的方法
公开(公告)号：US20050093100A1
公开(公告)日：2005-05-05
申请号：US10700085
申请日：2003-11-03
申请人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
发明人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L21/762 , H01L27/12 , H01L27/144 , H01L31/0232 , H01L31/028 , H01L31/0352 , H01L31/105 , H01L31/18 , H01L31/117
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

13. 发明申请

US20080001173A1 BURIED CHANNEL MOSFET USING III-V COMPOUND SEMICONDUCTORS AND HIGH k GATE DIELECTRICS 审中-公开
公开(公告)号：US20080001173A1
公开(公告)日：2008-01-03
申请号：US11767188
申请日：2007-06-22
申请人： Edward Kiewra , Steven Koester , Devendra Sadana , Ghavam Shahidi , Yanning Sun
发明人： Edward Kiewra , Steven Koester , Devendra Sadana , Ghavam Shahidi , Yanning Sun
IPC分类号： H01L29/778 , H01L21/336
CPC分类号： H01L29/7787 , H01L29/66462
摘要： A semiconductor-containing heterostructure including, from bottom to top, a III-V compound semiconductor buffer layer, a III-V compound semiconductor channel layer, a III-V compound semiconductor barrier layer, and an optional, yet preferred, III-V compound semiconductor cap layer is provided. The barrier layer may be doped, or preferably undoped. The III-V compound semiconductor buffer layer and the III-V compound semiconductor barrier layer are comprised of materials that have a wider band gap than that of the III-V compound semiconductor channel layer. Since wide band gap materials are used for the buffer and barrier layer and a narrow band gap material is used for the channel layer, carriers are confined to the channel layer under certain gate bias range. The inventive heterostructure can be employed as a buried channel structure in a field effect transistor.

14. 发明申请

US20070228484A1 STRUCTURE AND METHOD OF INTEGRATING COMPOUND AND ELEMENTAL SEMICONDUCTORS FOR HIGH-PERFORMANCE CMOS 有权
标题翻译：高性能CMOS组合化合物和元素半导体的结构与方法
公开(公告)号：US20070228484A1
公开(公告)日：2007-10-04
申请号：US11762376
申请日：2007-06-13
申请人： STEVEN KOESTER , Devendra Sadana , Ghavam Shahidi
发明人： STEVEN KOESTER , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L29/768 , H01L21/30
CPC分类号： H01L21/823807 , H01L21/02002 , H01L21/76254 , H01L21/76256 , H01L21/8258 , H01L21/84 , H01L27/1203
摘要： A method for fabricating a semiconductor substrate includes epitaxially growing an elemental semiconductor layer on a compound semiconductor substrate. An insulating layer is deposited on top of the elemental semiconductor layer, so as to form a first substrate. The first substrate is wafer bonded onto a monocrystalline Si substrate, such that the insulating layer bonds with the monocrystalline Si substrate. A semiconductor device includes a monocrystalline substrate, and a dielectric layer formed on the monocrystalline substrate. A semiconductor compound is formed on the dielectric layer and an elemental semiconductor material formed in proximity of the semiconductor compound and lattice-matched to the semiconductor compound.
摘要翻译：制造半导体衬底的方法包括在化合物半导体衬底上外延生长元素半导体层。绝缘层沉积在元素半导体层的顶部上，以形成第一衬底。第一衬底被晶片结合到单晶Si衬底上，使得绝缘层与单晶Si衬底结合。半导体器件包括单晶衬底和形成在单晶衬底上的电介质层。在介电层上形成半导体化合物，在半导体化合物附近形成与半导体化合物晶格匹配的元素半导体材料。

15. 发明申请

US20070122634A1 HYBRID CRYSTALLOGRAPHIC SURFACE ORIENTATION SUBSTRATE HAVING ONE OR MORE SOI REGIONS AND/OR BULK SEMICONDUCTOR REGIONS 失效
标题翻译：混合晶体表面取向
公开(公告)号：US20070122634A1
公开(公告)日：2007-05-31
申请号：US11164345
申请日：2005-11-18
申请人： Junedong Lee , Devendra Sadana , Dominic Schepis , Ghavam Shahidi
发明人： Junedong Lee , Devendra Sadana , Dominic Schepis , Ghavam Shahidi
IPC分类号： B32B13/04 , B05D5/12
CPC分类号： H01L21/84 , H01L21/76251 , H01L21/823807 , H01L21/823878 , H01L27/1203 , H01L27/1207 , H01L29/04
摘要： A substrate for a semiconductor device is disclosed including, in one embodiment, a plurality of semiconductor-on-insulator (SOI) wafers bonded to one another in a single stack. A distal end of the stack includes a first SOI region with a first semiconductor layer having a thickness and a first surface orientation. A surface of the single stack may further include a non-SOI region and/or at least one second SOI region. The non-SOI region may include bulk silicon that extends through all of the insulator layers of the single stack and has a thickness different than that of the first silicon layer. Each second SOI region has a second semiconductor layer having a thickness different than that of the first semiconductor layer and/or a different surface orientation than the first surface orientation. The substrate thus allows formation of different devices on optimal substrate regions that may include different surface orientations and/or different thicknesses and/or different bulk or SOI structures.
摘要翻译：公开了一种用于半导体器件的衬底，在一个实施例中，包括在单个堆叠中彼此结合的多个绝缘体上半导体（SOI）晶片。堆叠的远端包括具有厚度和第一表面取向的第一半导体层的第一SOI区域。单个堆叠的表面可以进一步包括非SOI区域和/或至少一个第二SOI区域。非SOI区域可以包括延伸穿过单个堆叠的所有绝缘体层并且具有与第一硅层的厚度不同的厚度的体硅。每个第二SOI区域具有与第一半导体层的厚度不同的第二半导体层和/或与第一表面取向不同的表面取向。因此，衬底允许在可以包括不同表面取向和/或不同厚度和/或不同的体或SOI结构的最佳衬底区域上形成不同的器件。

16. 发明授权

US08802477B2 Heterojunction III-V photovoltaic cell fabrication 有权
标题翻译：异质结III-V光伏电池制造
公开(公告)号：US08802477B2
公开(公告)日：2014-08-12
申请号：US12713584
申请日：2010-02-26
申请人： Stephen W. Bedell , Norma Sosa Cortes , Keith E. Fogel , Devendra Sadana , Ghavam Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Norma Sosa Cortes , Keith E. Fogel , Devendra Sadana , Ghavam Shahidi , Davood Shahrjerdi
IPC分类号： H01L21/00 , H01L21/30 , H01L21/46 , H01L21/762 , H01L21/20 , H01L31/0304
CPC分类号： H01L31/0304 , H01L21/20 , H01L21/76254 , H01L31/03762 , H01L31/0725 , H01L31/074 , H01L31/075 , H01L31/076 , H01L31/184 , H01L31/1892 , H01L31/20 , Y02E10/548
摘要： A method for forming a heterojunction III-V photovoltaic (PV) cell includes performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.
摘要翻译：用于形成异质结III-V光伏（PV）电池的方法包括从III-V衬底的晶片执行基底层的层转移，所述基底层小于约20微米厚; 在基层上形成本征层; 在本征层上形成非晶硅层; 以及在所述非晶硅层上形成透明导电氧化物层。异质结III-V光伏（PV）电池包括包含III-V衬底的基层，所述基层小于约20微米厚; 位于基层上的本征层; 位于本征层上的非晶硅层; 以及位于非晶硅层上的透明导电氧化物层。

17. 发明申请

US20080111189A1 HYBRID CRYSTALLOGRAPHIC SURFACE ORIENTATION SUBSTRATE HAVING ONE OR MORE SOI REGIONS AND/OR BULK SEMICONDUCTOR REGIONS 审中-公开
标题翻译：具有一个或多个SOI区域和/或大块半导体区域的混合晶体表面方向衬底
公开(公告)号：US20080111189A1
公开(公告)日：2008-05-15
申请号：US12013932
申请日：2008-01-14
申请人： Junedong Lee , Devendra Sadana , Dominic Schepis , Ghavam Shahidi
发明人： Junedong Lee , Devendra Sadana , Dominic Schepis , Ghavam Shahidi
IPC分类号： H01L27/12
CPC分类号： H01L21/84 , H01L21/76251 , H01L21/823807 , H01L21/823878 , H01L27/1203 , H01L27/1207 , H01L29/04
摘要： A substrate for a semiconductor device is disclosed including, in one embodiment, a plurality of semiconductor-on-insulator (SOI) wafers bonded to one another in a single stack. A distal end of the stack includes a first SOI region with a first semiconductor layer having a thickness and a first surface orientation. A surface of the single stack may further include a non-SOI region and/or at least one second SOI region. The non-SOI region may include bulk silicon that extends through all of the insulator layers of the single stack and has a thickness different than that of the first silicon layer. Each second SOI region has a second semiconductor layer having a thickness different than that of the first semiconductor layer and/or a different surface orientation than the first surface orientation. The substrate thus allows formation of different devices on optimal substrate regions that may include different surface orientations and/or different thicknesses and/or different bulk or SOI structures.
摘要翻译：公开了一种用于半导体器件的衬底，在一个实施例中，包括在单个堆叠中彼此结合的多个绝缘体上半导体（SOI）晶片。堆叠的远端包括具有厚度和第一表面取向的第一半导体层的第一SOI区域。单个堆叠的表面可以进一步包括非SOI区域和/或至少一个第二SOI区域。非SOI区域可以包括延伸穿过单个堆叠的所有绝缘体层并且具有与第一硅层的厚度不同的厚度的体硅。每个第二SOI区域具有与第一半导体层的厚度不同的第二半导体层和/或与第一表面取向不同的表面取向。因此，衬底允许在可以包括不同表面取向和/或不同厚度和/或不同的体或SOI结构的最佳衬底区域上形成不同的器件。

18. 发明申请

US20060249790A1 Method for fabricating SiGe-on-insulator (SGOI) and Ge-on-inulator (GOI) substrates 有权
标题翻译：用于制造绝缘体上硅（SGOI）和Ge-in-inulator（GOI）基板的方法
公开(公告)号：US20060249790A1
公开(公告)日：2006-11-09
申请号：US11481525
申请日：2006-07-06
申请人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
发明人： Tze-chiang Chen , Guy Cohen , Alexander Reznicek , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L27/12
CPC分类号： H01L21/76254 , H01L31/02327 , H01L31/028 , H01L31/1812 , Y02E10/547
摘要： A method for fabricating germanium-on-insulator (GOI) substrate materials, the GOI substrate materials produced by the method and various structures that can include at least the GOI substrate materials of the present invention are provided. The GOI substrate material include at least a substrate, a buried insulator layer located atop the substrate, and a Ge-containing layer, preferably pure Ge, located atop the buried insulator layer. In the GOI substrate materials of the present invention, the Ge-containing layer may also be referred to as the GOI film. The GOI film is the layer of the inventive substrate material in which devices can be formed.
摘要翻译：提供了绝缘体上（锗）绝缘体（GOI）衬底材料的方法，通过该方法生产的GOI衬底材料和至少可以包括本发明的GOI衬底材料的各种结构。 GOI衬底材料至少包括衬底，位于衬底顶部的掩埋绝缘体层，以及位于掩埋绝缘体层顶部的优选纯Ge的Ge含有层。在本发明的GOI基板材料中，Ge含有层也可以称为GOI膜。 GOI膜是可以形成器件的本发明的基底材料的层。

19. 发明申请

US20100307572A1 Heterojunction III-V Photovoltaic Cell Fabrication 有权
标题翻译：异质结III-V光伏电池制造
公开(公告)号：US20100307572A1
公开(公告)日：2010-12-09
申请号：US12713584
申请日：2010-02-26
申请人： Stephen W. Bedell , Norma Sosa Cortes , Keith E. Fogel , Devendra Sadana , Ghavam Shahidi , Davood Shahrjerdi
发明人： Stephen W. Bedell , Norma Sosa Cortes , Keith E. Fogel , Devendra Sadana , Ghavam Shahidi , Davood Shahrjerdi
IPC分类号： H01L31/00 , H01L31/18
CPC分类号： H01L31/0304 , H01L21/20 , H01L21/76254 , H01L31/03762 , H01L31/0725 , H01L31/074 , H01L31/075 , H01L31/076 , H01L31/184 , H01L31/1892 , H01L31/20 , Y02E10/548
摘要： A method for forming a heterojunction III-V photovoltaic (PV) cell includes performing layer transfer of a base layer from a wafer of a III-V substrate, the base layer being less than about 20 microns thick; forming an intrinsic layer on the base layer; forming an amorphous silicon layer on the intrinsic layer; and forming a transparent conducting oxide layer on the amorphous silicon layer. A heterojunction III-V photovoltaic (PV) cell includes a base layer comprising a III-V substrate, the base layer being less than about 20 microns thick; an intrinsic layer located on the base layer; an amorphous silicon layer located on the intrinsic layer; and a transparent conducting oxide layer located on the amorphous silicon layer.
摘要翻译：用于形成异质结III-V光伏（PV）电池的方法包括从III-V基片的晶片执行基底层的层转移，所述基底层小于约20微米厚; 在基层上形成本征层; 在本征层上形成非晶硅层; 以及在所述非晶硅层上形成透明导电氧化物层。异质结III-V光伏（PV）电池包括包含III-V衬底的基层，所述基层小于约20微米厚; 位于基层上的本征层; 位于本征层上的非晶硅层; 以及位于非晶硅层上的透明导电氧化物层。

20. 发明申请

US20060105507A1 Method to form Si-containing SOI and underlying substrate with different orientations 失效
标题翻译：形成含Si的SOI和具有不同取向的下层衬底的方法
公开(公告)号：US20060105507A1
公开(公告)日：2006-05-18
申请号：US10992150
申请日：2004-11-18
申请人： Meikei Ieong , Devendra Sadana , Ghavam Shahidi
发明人： Meikei Ieong , Devendra Sadana , Ghavam Shahidi
IPC分类号： H01L21/84
CPC分类号： H01L21/76251 , H01L21/2007
摘要： A method of forming a hybrid SOI substrate comprising an upper Si-containing layer and a lower Si-containing layer, wherein the upper Si-containing layer and the lower Si-containing layer have different crystallographic orientations. In accordance with the present invention, the buried insulating region may be located within one of the Si-containing layers or through an interface located between the two Si-containing layers.
摘要翻译：一种形成包含上层含Si层和下层含Si层的混合SOI衬底的方法，其中上层含Si层和下层含Si层具有不同的结晶取向。根据本发明，掩埋绝缘区域可以位于一个含硅层内或通过位于两个含Si层之间的界面。

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