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    • 17. 发明授权
    • Multi-level memory cell read, program, and erase techniques
    • 多级存储单元读,编程和擦除技术
    • US08792274B1
    • 2014-07-29
    • US13590230
    • 2012-08-21
    • Qiang TangBo WangChih-Hsin Wang
    • Qiang TangBo WangChih-Hsin Wang
    • G11C16/04G11C7/06
    • G11C16/3445G11C7/1006G11C11/56G11C11/5628G11C11/5635G11C11/5642G11C2013/0076
    • A system is provided and includes an array of cells, a first module, and a third module. The first module reads a state of a cell in the array to detect first bits stored in the cell. The third module, subsequent to the first module reading the state, performs a first operation on a first bit of the first bits and performs the first operation on a first of multiple signal inputs. The signal inputs indicate second bits of data to be stored in the cell. The third module performs a second operation on a second bit of the first bits and performs the second operation on a second one of the signal inputs. The first module, based on results of the first and second operations, performs a first erase operation or a first program operation on the cell to match the state of the cell to the second bits.
    • 提供了一种系统,包括一个单元阵列,一个第一模块和一个第三模块。 第一模块读取阵列中的单元的状态以检测存储在单元中的第一位。 第三模块在第一模块读取状态之后,对第一位的第一位执行第一操作,并且在多个信号输入中的第一个上执行第一操作。 信号输入表示要存储在单元中的数据的第二位。 第三模块对第一位的第二位执行第二操作,并对第二信号输入执行第二操作。 第一模块基于第一和第二操作的结果,对单元执行第一擦除操作或第一程序操作,以将该单元的状态与第二位相匹配。
    • 20. 发明申请
    • SEMI-INSULATING SILICON CARBIDE MONOCRYSTAL AND METHOD OF GROWING THE SAME
    • 半绝缘碳化硅单晶及其生长方法
    • US20130313575A1
    • 2013-11-28
    • US13976351
    • 2011-12-06
    • Xiaolong ChenChunjun LiuTonghua PengLongyuan LiBo WangGang WangWenjun WangYu Liu
    • Xiaolong ChenChunjun LiuTonghua PengLongyuan LiBo WangGang WangWenjun WangYu Liu
    • H01L29/16H01L21/02
    • H01L29/1608C30B23/00C30B23/002C30B23/005C30B23/06C30B29/36H01L21/02529H01L29/435
    • A semi-insulating silicon carbide monocrystal and a method of growing the same are disclosed. The semi-insulating silicon carbide monocrystal comprises intrinsic impurities, deep energy level dopants and intrinsic point defects. The intrinsic impurities are introduced unintentionally during manufacture of the silicon carbide monocrystal, and the deep energy level dopants and the intrinsic point defects are doped or introduced intentionally to compensate for the intrinsic impurities. The intrinsic impurities include shallow energy level donor impurities and shallow energy level acceptor impurities. A sum of a concentration of the deep energy level dopants and a concentration of the intrinsic point defects is greater than a difference between a concentration of the shallow energy level donor impurities and a concentration of the shallow energy level acceptor impurities, and the concentration of the intrinsic point defects is less than the concentration of the deep energy level dopants. The semi-insulating SiC monocrystal has resistivity greater than 1×105 Ω·cm at room temperature, and its electrical performances and crystal quality satisfy requirements for manufacture of microwave devices. The deep energy level dopants and the intrinsic point defects jointly serve to compensate the intrinsic impurities, so as to obtain a high quality semi-insulating single crystal.
    • 公开了一种半绝缘碳化硅单晶及其生长方法。 半绝缘碳化硅单晶包括固有杂质,深能级掺杂剂和固有点缺陷。 在碳化硅单晶的制造期间无意中引入固有杂质,并且有意地掺杂或引入深能级掺杂剂和固有点缺陷以补偿固有杂质。 本征杂质包括浅能级供体杂质和浅能级受体杂质。 深能级掺杂剂的浓度和本征点缺陷的浓度的总和大于浅能级供体杂质的浓度与浅能级受体杂质的浓度之间的差异, 内在点缺陷小于深能级掺杂剂的浓度。 半绝缘SiC单晶在室温下的电阻率大于1×105Ω·cm,其电性能和晶体质量满足微波器件制造要求。 深能级掺杂剂和固有点缺陷共同用于补偿固有杂质,从而获得高质量的半绝缘单晶。