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11. 发明申请

US20080002597A1 TRANSCEIVING SYSTEM AND COMPOUND FILTER 有权
标题翻译：收货系统和化合物过滤器
公开(公告)号：US20080002597A1
公开(公告)日：2008-01-03
申请号：US11853072
申请日：2007-09-11
申请人： Yiping Fan , Chieh-Yuan Chao
发明人： Yiping Fan , Chieh-Yuan Chao
IPC分类号： H04B7/212
CPC分类号： H03H11/22 , H03H2011/0494 , H04B1/30 , H04B1/40
摘要： A transceiving system utilizing a shared filter module is provided. The shared filter module is selectively filtering signals in a first band in a first mode and a second band in a second mode. The first mode is a receiver mode whereas the second mode is a transmission mode. The shared filter module comprises a compound filter comprising two low pass filters and a coupling controller to manage input and output wiring of the low pass filters. When the coupling controller is enabled in the first mode, the compound filter acts as a bandpass filter. When the coupling controller is disabled, the compound filter acts as two independent low pass filters.
摘要翻译：提供了一种利用共享滤波器模块的收发系统。共享滤波器模块选择性地在第一模式中过滤第一频带中的信号，并且以第二模式滤波第二频带中的信号。第一模式是接收器模式，而第二模式是传输模式。共享滤波器模块包括具有两个低通滤波器的复合滤波器和用于管理低通滤波器的输入和输出布线的耦合控制器。当耦合控制器在第一模式下使能时，复合滤波器用作带通滤波器。当耦合控制器被禁用时，复合滤波器作为两个独立的低通滤波器。

12. 发明授权

US07982533B2 Transceiving system and compound filter 有权
标题翻译：收发系统和复合滤波器
公开(公告)号：US07982533B2
公开(公告)日：2011-07-19
申请号：US11853072
申请日：2007-09-11
申请人： Yiping Fan , Chieh-Yuan Chao
发明人： Yiping Fan , Chieh-Yuan Chao
IPC分类号： H03K5/00
CPC分类号： H03H11/22 , H03H2011/0494 , H04B1/30 , H04B1/40
摘要： A transceiving system utilizing a shared filter module is provided. The shared filter module is selectively filtering signals in a first band in a first mode and a second band in a second mode. The first mode is a receiver mode whereas the second mode is a transmission mode. The shared filter module comprises a compound filter comprising two low pass filters and a coupling controller to manage input and output wiring of the low pass filters. When the coupling controller is enabled in the first mode, the compound filter acts as a bandpass filter. When the coupling controller is disabled, the compound filter acts as two independent low pass filters.
摘要翻译：提供了一种利用共享滤波器模块的收发系统。共享滤波器模块选择性地在第一模式中过滤第一频带中的信号，并且以第二模式滤波第二频带中的信号。第一模式是接收器模式，而第二模式是传输模式。共享滤波器模块包括具有两个低通滤波器的复合滤波器和用于管理低通滤波器的输入和输出布线的耦合控制器。当耦合控制器在第一模式下使能时，复合滤波器用作带通滤波器。当耦合控制器被禁用时，复合滤波器作为两个独立的低通滤波器。

13. 发明申请

US20050064426A1 Probe correction for gene expression level detection 有权
标题翻译：基因表达水平检测的探针校正
公开(公告)号：US20050064426A1
公开(公告)日：2005-03-24
申请号：US10500587
申请日：2003-01-17
申请人： Guangzhou Zou , Hur-Song Change , Yiping Fan , Fan Long , Xun Wang , Tong Zhu
发明人： Guangzhou Zou , Hur-Song Change , Yiping Fan , Fan Long , Xun Wang , Tong Zhu
IPC分类号： G01N33/566 , C07H21/02 , C07H21/04 , C12N15/09 , C12P19/34 , C12Q20060101 , C12Q1/68 , G01N31/00 , G01N33/48 , G01N33/50 , G01N33/53 , G06F15/00 , G06F17/00 , G06F19/20 , G06F19/00
CPC分类号： G06F19/20 , C12Q1/6837 , C12Q2600/158
摘要： Individual probes on micro-arrays are re-scaled and corrected with a set of probe dependent coefficients derived from genomic-DNA hybridization signals. A dynamic range for gDNA binding is determined by measuring a concentration signal curve. Signals for each probe are measured during multiple hybridizations within a linear range. Concentration insensitive probes are then found for two sets of experiments. Probes are discarded based on a threshold compared to their standard deviation divided by their average in each set. The correction coefficients are used to calculate a corrected intensity for each probe. Probes having high uncertainty (0.5 in one embodiment) are discarded. A weighting factor for each probe is determined along with an uncertainty factor. Finally, a call for each gene is made, such as absent, marginal or present.
摘要翻译：使用从基因组DNA杂交信号衍生的一组探针依赖系数对微阵列上的单个探针进行重新定标和校正。通过测量浓度信号曲线确定gDNA结合的动态范围。在线性范围内的多次杂交期间测量每个探针的信号。然后发现两组实验的浓度不敏感探针。探针根据其标准偏差除以每组中的平均值的阈值进行丢弃。校正系数用于计算每个探针的校正强度。具有高不确定度的探针（在一个实施例中为0.5）被丢弃。确定每个探头的加权系数以及不确定因素。最后，调用每个基因，如缺席，边缘或存在。

14. 发明授权

US07715990B2 Probe correction for gene expression level detection 有权
标题翻译：基因表达水平检测的探针校正
公开(公告)号：US07715990B2
公开(公告)日：2010-05-11
申请号：US10500587
申请日：2003-01-17
申请人： Guangzhou Zou , Hur-Song Chang , Yiping Fan , Fan Long , Xun Wang , Tong Zhu
发明人： Guangzhou Zou , Hur-Song Chang , Yiping Fan , Fan Long , Xun Wang , Tong Zhu
IPC分类号： G01N33/483
CPC分类号： G06F19/20 , C12Q1/6837 , C12Q2600/158
摘要： Individual probes on micro-arrays are re-scaled and corrected with a set of probe dependent coefficients derived from genomic-DNA hybridization signals. A dynamic range for gDNA binding is determined by measuring a concentration signal curve. Signals for each probe are measured during multiple hybridizations within a linear range. Concentration insensitive probes are then found for two sets of experiments. Probes are discarded based on a threshold compared to their standard deviation divided by their average in each set. The correction coefficients are used to calculate a corrected intensity for each probe. Probes having high uncertainty (0.5 in one embodiment) are discarded. A weighting factor for each probe is determined along with an uncertainty factor. Finally, a call for each gene is made, such as absent, marginal or present.
摘要翻译：使用从基因组DNA杂交信号衍生的一组探针依赖系数对微阵列上的单个探针进行重新定标和校正。通过测量浓度信号曲线确定gDNA结合的动态范围。在线性范围内的多次杂交期间测量每个探针的信号。然后发现两组实验的浓度不敏感探针。探针根据其标准偏差除以每组中的平均值的阈值进行丢弃。校正系数用于计算每个探针的校正强度。具有高不确定度的探针（在一个实施例中为0.5）被丢弃。确定每个探头的加权系数以及不确定因素。最后，调用每个基因，如缺席，边缘或存在。

15. 发明授权

US06693494B2 Frequency synthesizer with three mode loop filter charging 失效
标题翻译：频率合成器具有三路环路滤波充电
公开(公告)号：US06693494B2
公开(公告)日：2004-02-17
申请号：US09935861
申请日：2001-08-20
申请人： Yiping Fan
发明人： Yiping Fan
IPC分类号： H03L700
CPC分类号： H03L7/187 , H03L7/0893 , H03L7/095 , H03L7/10 , H03L7/1976
摘要： A phase-locked loop fractional-N frequency synthesizer, particularly of a sigma delta type, has a voltage controlled oscillator, a fractional-N frequency divider, a phase comparator, a charge pump, and a loop filter. The loop filter has a capacitive element for receiving a charge pump current from the charge pump. A filtered charge pump current controls the voltage controlled oscillator. The charge pump is operable in three current modes, a pre-charging/pre-discharging mode, a speed up mode, and a normal, locked mode. In the pre-charging/pre-discharging mode the charge pump is decoupled from the phase comparator so that the phase locked loop is open, and in the speed up and normal modes the charge pump is coupled to the phase comparator so that the phase locked-loop is closed.
摘要翻译：特别是Σ-Δ型的锁相环分数N频率合成器具有压控振荡器，分数N分频器，相位比较器，电荷泵和环路滤波器。环路滤波器具有用于从电荷泵接收电荷泵电流的电容元件。滤波电荷泵电流控制压控振荡器。电荷泵可在三种电流模式中工作，即预充电/预放电模式，加速模式和正常锁定模式。在预充电/预放电模式下，电荷泵与相位比较器分离，使得锁相环打开，并且在加速和正常模式下，电荷泵耦合到相位比较器，使得锁相 -loop关闭。

16. 发明申请

US20140073278A1 RSSI estimation based on VGA control and threshold detection 审中-公开
标题翻译：基于VGA控制和阈值检测的RSSI估计
公开(公告)号：US20140073278A1
公开(公告)日：2014-03-13
申请号：US13607822
申请日：2012-09-10
申请人： Yiping Fan , Chun-Yuan Lin , Li-Feng Chen , Sheng-Chia Huang
发明人： Yiping Fan , Chun-Yuan Lin , Li-Feng Chen , Sheng-Chia Huang
IPC分类号： H03G3/20
CPC分类号： H03G3/3078
摘要： A circuit for RSSI estimation includes a cascaded chain of variable gain amplifier stages, a threshold detector configured to output an indication signal according to a comparison of output of the cascaded chain of variable gain amplifier stages with a predetermined threshold, and an automatic gain controller configured to adjust gain of at least one variable gain amplifier of the cascaded chain of variable gain amplifier stages according to the indication signal. Each stage may include a switch module configured to electrically connect or disconnect an input of the variable gain amplifier of the at least one variable gain amplifier stage to/from an output of a previous variable gain amplifier stage according to a switch control signal.
摘要翻译：用于RSSI估计的电路包括可变增益放大器级的级联链，阈值检测器，被配置为根据可变增益放大器级联链路的输出与预定阈值的比较输出指示信号，以及配置的自动增益控制器根据指示信号来调整可变增益放大器级联级链的至少一个可变增益放大器的增益。每个级可以包括开关模块，其被配置为根据开关控制信号将至少一个可变增益放大器级的可变增益放大器的输入与前一个可变增益放大器级的输出电连接或断开。

17. 发明授权

US06433726B1 Fractional decimation filter using oversampled data 失效
标题翻译：使用过采样数据的分数抽取滤波器
公开(公告)号：US06433726B1
公开(公告)日：2002-08-13
申请号：US09887454
申请日：2001-06-22
申请人： Yiping Fan
发明人： Yiping Fan
IPC分类号： H03M112
CPC分类号： H03H17/0642 , H03H17/0685
摘要： A decimator is provided that selectively varies the output sampling rate of an integer decimating device, such that the average output sampling rate corresponds to a desired output sampling rate. The output sampling rate varies such that an output sample is provided selectively after N input samples, or after N+1 input samples, to provide an output-to-input sampling ratio that is between N and N+1. This process introduces phase jitter as the sampling frequency varies between 1/N and 1/(N+1), but if the oversampling rate is high, and therefore N is high, as is typical of many applications that employ oversampling, the relative magnitude of the phase jitter is slight. A fractional accumulator is used to control whether the output occurs after N or N+1 input cycles, and is clocked by the input sampling clock, thereby minimizing the complexity of the embodiment.
摘要翻译：提供了一种抽取器，其选择性地改变整数抽取装置的输出采样率，使得平均输出采样速率对应于期望的输出采样率。输出采样率变化，使得在N个输入采样之后或在N + 1个输入采样之后选择性地提供输出采样，以提供在N和N + 1之间的输出到输入采样率。当采样频率在1 / N和1 /（N + 1）之间变化时，该过程引入相位抖动，但是如果过采样率高，因此N为高，则采用过采样的许多应用的典型值是相对幅度的相位抖动很小。分数累加器用于控制输出是在N或N + 1个输入周期之后发生的，并且由输入采样时钟计时，从而使实施例的复杂度最小化。

18. 发明授权

US09640984B2 Current limiting device, current limiter and current limiting system for power grid 有权
公开(公告)号：US09640984B2
公开(公告)日：2017-05-02
申请号：US14441918
申请日：2013-01-09
申请人： Shaogui Al , Chuan Wang , Yongning Huang , Yiping Fan , Guoyong Zhang , Yanjun Li , Ning Pan , Shuang Zhang
发明人： Shaogui Al , Chuan Wang , Yongning Huang , Yiping Fan , Guoyong Zhang , Yanjun Li , Ning Pan , Shuang Zhang
IPC分类号： H02H9/02
CPC分类号： H02H9/02 , H02H9/021
摘要： A current limiting device for a power grid includes a first current limiting reactor; a first smart fast switch connected with the first current limiting reactor in parallel; a current transformer sleeved on a bus bar located on one side of a circuit resulting from the parallel connection of the first current limiting reactor with the first smart fast switch to monitor the current in the bus bar in real time; and a controller connected with the current transformer to control the switch-off of the first smart fast switch when the current in the bus bar is higher than a first preset value and the switch-on of the first smart fast switch when the current in the bus bar is smaller than a second preset value, wherein the first preset value is higher than the second preset value. The current limiting device improves the operational reliability of a power grid.

19. 发明申请

US20060267677A1 Method and system for passband ripple cancellation in cascading filters 审中-公开
标题翻译：级联滤波器中通带纹波消除的方法和系统
公开(公告)号：US20060267677A1
公开(公告)日：2006-11-30
申请号：US10570050
申请日：2004-08-28
申请人： Yiping Fan
发明人： Yiping Fan
IPC分类号： H03K5/00
CPC分类号： H03F3/45475 , H03F2203/45138 , H03F2203/45166 , H03H11/1217 , H03H11/1252
摘要： A composite filter (200) includes at least two cascading filters (202, 204) designed to minimize a passband ripple in the composite filter (200). The at least two cascading filters (202, 204) may also be designed to maximize stopband rejection in the composite filter (200). Filter characteristics, such as the order, bandwidth, stopband attenuation, and ripple magnitude, for the cascading filters (202, 204) are selected in order to achieve minimal passband ripple and maximum stopband rejection in the composite filter (200). The passband ripple in the composite filter (200) is minimized or cancelled by having the passband ripple in the cascading filters (202, 204) be equal or nearly equal in magnitude but out of phase with respect to each other.
摘要翻译：复合滤波器（200）包括设计成使复合滤波器（200）中的通带纹波最小化的至少两个级联滤波器（202,204）。还可以将至少两个级联滤波器（202,204）设计成使复合滤波器（200）中的阻带抑制最大化。选择用于级联滤波器（202,204）的滤波器特性，例如顺序，带宽，阻带衰减和纹波幅度，以便在复合滤波器（200）中实现最小通带纹波和最大阻带抑制。复合滤波器（200）中的通带纹波通过使级联滤波器（202,204）中的通带纹波相等或几乎相等于或相差相位而被最小化或抵消。

20. 发明授权

US06456164B1 Sigma delta fractional-N frequency divider with improved noise and spur performance 失效
$Sigma delta fractional-N frequency divider with improved noise and spur performance$
标题翻译： Sigma delta分数N分频器，具有改进的噪声和支线性能
公开(公告)号：US06456164B1
公开(公告)日：2002-09-24
申请号：US09800118
申请日：2001-03-05
申请人： Yiping Fan
发明人： Yiping Fan
IPC分类号： H03L718
CPC分类号： H03L7/1976 , H03K23/68
摘要： A frequency synthesizer is provided that allows for a half-cycle division of the synthesized frequency. In a conventional sigma-delta fractional-N frequency synthesizer, a controllable divider is configured to allow for the division of the synthesized frequency by an integer factor of N or an integer factor of N+1. A sigma-delta calculator controls a half-cycle divider so as to selectively divide the synthesized frequency by an integer factor of N, or a fractional factor of (N+½). If a higher order sigma-delta calculator is employed that provides S output symbols, the half-cycle divider is correspondingly controlled to select a division factor of (N+s/2), where s is selectable from set of S symbols.
摘要翻译：提供了允许合成频率的半周期分频的频率合成器。在常规的Σ-Δ分数N频率合成器中，可控分频器被配置为允许合成频率除以整数因子N或N + 1的整数因子。 Σ-Δ计算器控制半周期分频器，以便选择性地将合成频率除以N的整数因子或（N +½）的分数因子。如果采用提供S个输出符号的较高阶Σ-Δ计算器，则相应地控制半周分频器以选择（N + s / 2）的分频因子，其中s可从S个符号集中选择。

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