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11. 发明授权

US07504327B2 Method of manufacturing thin film semiconductor device 有权
标题翻译：制造薄膜半导体器件的方法
公开(公告)号：US07504327B2
公开(公告)日：2009-03-17
申请号：US11148426
申请日：2005-06-09
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L21/425 , H01L21/00 , H01L21/84 , H01L21/8238 , H01L21/336
CPC分类号： H01L27/1214 , H01L21/26586 , H01L27/127 , H01L27/1274 , H01L29/66757 , H01L29/78624
摘要： In the invention, a low concentration impurity region is formed between a channel formation region and a source region or a drain region in a semiconductor layer and covered with a gate electrode layer in a thin film transistor The semiconductor layer is doped obliquely to the surface thereof using the gate electrode layer as a mask to form the low concentration impurity region. The semiconductor layer is formed to have an impurity region including an impurity element for imparting one conductivity which is different from conductivity of the thin film transistor, thereby being able to minutely control the properties of the thin film transistor.
摘要翻译：在本发明中，在半导体层中的沟道形成区域和源极区域或漏极区域之间形成低浓度杂质区域，并且在薄膜晶体管中被栅极电极层覆盖。半导体层倾斜地掺杂在其表面上使用栅极电极层作为掩模形成低浓度杂质区域。半导体层形成为具有包含用于赋予与薄膜晶体管的导电性不同的一种导电性的杂质元素的杂质区域，从而能够精细地控制薄膜晶体管的性质。

12. 发明申请

US20050024339A1 Display device and folding portable terminal 有权
标题翻译：显示设备和折叠便携式终端
公开(公告)号：US20050024339A1
公开(公告)日：2005-02-03
申请号：US10788255
申请日：2004-02-27
申请人： Shunpei Yamazaki , Yasuyuki Arai , Yasuko Watanabe , Aya Anzai , Hiromichi Godo , Junichiro Sakata , Kaoru Tsuchiya
发明人： Shunpei Yamazaki , Yasuyuki Arai , Yasuko Watanabe , Aya Anzai , Hiromichi Godo , Junichiro Sakata , Kaoru Tsuchiya
IPC分类号： G06F1/16 , G06F3/14 , H01L27/32 , H01L51/52 , H04M1/02 , H04M1/725 , G09G5/00
CPC分类号： H01L27/3267 , G06F1/1616 , G06F1/1637 , G06F1/1647 , G06F1/1677 , G06F1/1686 , G06F3/1423 , G06F2200/1614 , G09G2300/023 , G09G2340/0492 , H01L27/3209 , H01L27/3234 , H01L51/5262 , H01L51/5281 , H01L2251/5323 , H01L2251/558 , H04M1/0214 , H04M1/0245 , H04M1/72519 , H04M2250/16
摘要： It is an object to provide a highly functioned and highly value-added display device and mobile terminal. It is another object to provide a display device and mobile terminal characterized by including a plurality of pixels arranged in a matrix form and a first display screen over one surface of a substrate having a translucency, a second display screen over the opposite surface of the one surface of the substrate, each of the plurality of pixels having a light emitting element for emitting light toward the first display screen and the second display screen, and a first polarizer over one surface of the substrate and a second polarizer over the opposite surface of the one surface of the substrate.
摘要翻译：本发明的目的是提供一种高功能且高附加值的显示设备和移动终端。另一个目的是提供一种显示装置和移动终端，其特征在于包括以矩阵形式布置的多个像素，以及在具有半透明度的基板的一个表面上的第一显示屏幕，在一个相对表面上的第二显示屏幕所述多个像素中的每一个具有用于朝向所述第一显示屏和所述第二显示屏发射光的发光元件，以及在所述基板的一个表面上的第一偏振器和位于所述第二显示屏的相对表面上的第二偏振器衬底的一个表面。

13. 发明授权

US08895976B2 Transistor and semiconductor device 有权
标题翻译：晶体管和半导体器件
公开(公告)号：US08895976B2
公开(公告)日：2014-11-25
申请号：US13164296
申请日：2011-06-20
申请人： Masashi Tsubuku , Takayuki Inoue , Suzunosuke Hiraishi , Erumu Kikuchi , Hiromichi Godo , Shuhei Yoshitomi , Koki Inoue , Akiharu Miyanaga , Shunpei Yamazaki
发明人： Masashi Tsubuku , Takayuki Inoue , Suzunosuke Hiraishi , Erumu Kikuchi , Hiromichi Godo , Shuhei Yoshitomi , Koki Inoue , Akiharu Miyanaga , Shunpei Yamazaki
IPC分类号： H01L29/78 , H01L29/786
CPC分类号： H01L29/7869 , H01L29/408
摘要： Manufactured is a transistor including an oxide semiconductor layer, a source electrode layer and a drain electrode layer overlapping with part of the oxide semiconductor layer, a gate insulating layer overlapping with the oxide semiconductor layer, the source electrode layer, and the drain electrode layer, and a gate electrode overlapping with part of the oxide semiconductor layer with the gate insulating layer provided therebetween, wherein, after the oxide semiconductor layer which is to be a channel formation region is irradiated with light and the light irradiation is stopped, a relaxation time of carriers in photoresponse characteristics of the oxide semiconductor layer has at least two kinds of modes: τ1 and τ2, τ1
摘要翻译：制造的是包括与氧化物半导体层的一部分重叠的氧化物半导体层，源极电极层和漏极电极层，与氧化物半导体层重叠的栅极绝缘层，源极电极层和漏极电极层的晶体管，以及与所述氧化物半导体层的与氧化物半导体层的一部分重叠的栅电极，其间设置有栅极绝缘层，其中，在作为沟道形成区域的氧化物半导体层被照射光并停止光照射之后，弛豫时间氧化物半导体层的光响应特性中的载流子具有至少两种模式：τ1和τ2，τ1<τ2，τ2为300秒以下。此外，制造包括晶体管的半导体器件。

14. 发明授权

US08754409B2 Field-effect transistor, and memory and semiconductor circuit including the same 有权
标题翻译：场效应晶体管，以及包括其的存储器和半导体电路
公开(公告)号：US08754409B2
公开(公告)日：2014-06-17
申请号：US13428008
申请日：2012-03-23
申请人： Shunpei Yamazaki , Hiromichi Godo , Yasuhiko Takemura
发明人： Shunpei Yamazaki , Hiromichi Godo , Yasuhiko Takemura
IPC分类号： H01L29/12
CPC分类号： H01L29/7869 , H01L27/0688 , H01L27/108 , H01L27/10805 , H01L27/10826 , H01L27/10852 , H01L27/10879 , H01L27/10894 , H01L27/10897 , H01L27/1156 , H01L27/1203 , H01L27/1225 , H01L28/90 , H01L29/41733 , H01L29/785 , H01L29/78609
摘要： Provided is a field-effect transistor (FET) having small off-state current, which is used in a miniaturized semiconductor integrated circuit. The field-effect transistor includes a thin oxide semiconductor which is formed substantially perpendicular to an insulating surface and has a thickness of greater than or equal to 1 nm and less than or equal to 30 nm, a gate insulating film formed to cover the oxide semiconductor, and a strip-like gate which is formed to cover the gate insulating film and has a width of greater than or equal to 10 nm and less than or equal to 100 nm. In this structure, three surfaces of the thin oxide semiconductor are covered with the gate, so that electrons injected from a source or a drain can be effectively removed, and most of the space between the source and the drain can be a depletion region; thus, off-state current can be reduced.
摘要翻译：提供了一种具有小截止电流的场效应晶体管（FET），其用于小型化的半导体集成电路中。场效应晶体管包括形成为基本上垂直于绝缘表面并且具有大于或等于1nm且小于或等于30nm的厚度的薄氧化物半导体，形成为覆盖氧化物半导体的栅极绝缘膜以及形成为覆盖栅极绝缘膜并且具有大于或等于10nm且小于或等于100nm的宽度的条状栅极。在这种结构中，薄氧化物半导体的三个表面被栅极覆盖，使得可以有效地去除从源极或漏极注入的电子，并且源极和漏极之间的大部分空间可以是耗尽区; 因此，可以减小截止电流。

15. 发明授权

US08581309B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08581309B2
公开(公告)日：2013-11-12
申请号：US13277489
申请日：2011-10-20
申请人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo , Yutaka Okazaki
发明人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo , Yutaka Okazaki
IPC分类号： H01L27/092
CPC分类号： H01L27/1266 , H01L21/823807 , H01L21/823871 , H01L23/433 , H01L23/481 , H01L23/552 , H01L27/0688 , H01L27/1214 , H01L27/1229 , H01L29/7843 , H01L2224/16 , H01L2224/73253 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/16152 , H01L2924/16195
摘要： An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable.
摘要翻译：目的是在具有SOI结构的半导体器件中实现高性能和低功耗。此外，另一个目的是提供一种具有更高集成度的高性能半导体元件的半导体器件。半导体器件使得多个n沟道场效应晶体管和p沟道场效应晶体管层叠在其间具有绝缘表面的衬底之间的层间绝缘层。通过控制由于具有应力的绝缘膜，半导体层的平面取向和沟道长度方向的晶轴引起的半导体层的失真，n沟道场效应晶体管和可以减小p沟道场效应晶体管，由此n沟道场效应晶体管的电流驱动能力和响应速度与p沟道场效应相当。

16. 发明授权

US08044464B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08044464B2
公开(公告)日：2011-10-25
申请号：US12209739
申请日：2008-09-12
申请人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo , Yutaka Okazaki
发明人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo , Yutaka Okazaki
IPC分类号： H01L27/01
CPC分类号： H01L27/1266 , H01L21/823807 , H01L21/823871 , H01L23/433 , H01L23/481 , H01L23/552 , H01L27/0688 , H01L27/1214 , H01L27/1229 , H01L29/7843 , H01L2224/16 , H01L2224/73253 , H01L2924/01046 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/09701 , H01L2924/12044 , H01L2924/16152 , H01L2924/16195
摘要： An object is to realize high performance and low power consumption in a semiconductor device having an SOI structure. In addition, another object is to provide a semiconductor device having a high performance semiconductor element which is more highly integrated. A semiconductor device is such that a plurality of n-channel field-effect transistors and p-channel field-effect transistors are stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. By controlling a distortion caused to a semiconductor layer due to an insulating film having a stress, a plane orientation of the semiconductor layer, and a crystal axis in a channel length direction, difference in mobility between the n-channel field-effect transistor and the p-channel field-effect transistor can be reduced, whereby current driving capabilities and response speeds of the n-channel field-effect transistor and the p-channel field-effect can be comparable.
摘要翻译：目的是在具有SOI结构的半导体器件中实现高性能和低功耗。此外，另一个目的是提供一种具有更高集成度的高性能半导体元件的半导体器件。半导体器件使得多个n沟道场效应晶体管和p沟道场效应晶体管层叠在其间具有绝缘表面的衬底之间的层间绝缘层。通过控制由于具有应力的绝缘膜，半导体层的平面取向和沟道长度方向的晶轴引起的半导体层的失真，n沟道场效应晶体管与可以减小p沟道场效应晶体管，由此n沟道场效应晶体管的电流驱动能力和响应速度与p沟道场效应相当。

17. 发明授权

US07982250B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07982250B2
公开(公告)日：2011-07-19
申请号：US12209696
申请日：2008-09-12
申请人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo , Yutaka Okazaki
发明人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo , Yutaka Okazaki
IPC分类号： H01L27/12
CPC分类号： H01L21/8221 , H01L27/0688 , H01L2224/16225 , H01L2224/16227 , H01L2224/32245 , H01L2924/00011 , H01L2924/00014 , H01L2224/29099 , H01L2224/13099 , H01L2224/80001
摘要： A semiconductor device is demonstrated in which a plurality of field-effect transistors is stacked with an interlayer insulating layer interposed therebetween over a substrate having an insulating surface. Each of the plurality of filed-effect transistors has a semiconductor layer which is prepared by a process including separation of the semiconductor layer from a semiconductor substrate followed by bonding thereof over the substrate. Each of the plurality of field-effect transistors is covered with an insulating film which provides distortion of the semiconductor layer. Furthermore, the crystal axis of the semiconductor layer, which is parallel to the crystal plane thereof, is set to a channel length direction of the semiconductor layer, which enables production of the semiconductor device with high performance and low power consumption having an SOI structure.
摘要翻译：示出了一种半导体器件，其中在具有绝缘表面的衬底上层叠多个场效应晶体管，层间绝缘层介于其间。多个场效应晶体管中的每一个具有半导体层，该半导体层通过包括将半导体层与半导体衬底分离并随后在衬底上结合的工艺制备。多个场效应晶体管中的每一个被覆盖有提供半导体层失真的绝缘膜。此外，将半导体层的与其晶面平行的晶轴设定为半导体层的沟道长度方向，能够制造具有SOI结构的高性能，低功耗的半导体器件。

18. 发明授权

US07692194B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US07692194B2
公开(公告)日：2010-04-06
申请号：US12015362
申请日：2008-01-16
申请人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Hiromichi Godo
IPC分类号： H01L29/04 , H01L31/036 , H01L31/0376 , H01L31/20
CPC分类号： H01L29/78621 , H01L29/42384 , H01L29/4908 , H01L29/66757 , H01L29/78618 , H01L2924/0002 , H01L2924/00
摘要： A semiconductor device having a novel structure by which the operating characteristics and reliability are improved and a manufacturing method thereof. An island-shaped semiconductor layer provided over a substrate, including a channel formation region provided between a pair of impurity regions; a first insulating layer provided so as to be in contact with the side surface of the semiconductor layer; a gate electrode provided over the channel formation region so as to get across the semiconductor layer; and a second insulating layer provided between the channel formation region and the gate electrode are included. The semiconductor layer is locally thinned, the channel formation region is provided in the thinned region, and the second insulating layer covers the first insulating layer provided on the side surface of the semiconductor layer at least in the region which overlaps with the gate electrode.
摘要翻译：具有改善其操作特性和可靠性的新颖结构的半导体器件及其制造方法。一种岛状半导体层，设置在衬底上，包括设置在一对杂质区之间的沟道形成区; 设置成与半导体层的侧表面接触的第一绝缘层; 栅电极，设置在所述沟道形成区上方以穿过所述半导体层; 并且包括设置在沟道形成区域和栅电极之间的第二绝缘层。半导体层被局部变薄，沟道形成区域设置在减薄区域中，并且第二绝缘层至少在与栅电极重叠的区域中覆盖设置在半导体层的侧表面上的第一绝缘层。

19. 发明授权

US07476908B2 Light emitting device 有权
标题翻译：发光装置
公开(公告)号：US07476908B2
公开(公告)日：2009-01-13
申请号：US11121070
申请日：2005-05-04
申请人： Shunpei Yamazaki , Hideto Ohnuma , Aya Anzai , Masayuki Sakakura , Hiromichi Godo
发明人： Shunpei Yamazaki , Hideto Ohnuma , Aya Anzai , Masayuki Sakakura , Hiromichi Godo
IPC分类号： H01L29/207 , H01L33/00
CPC分类号： H01L27/3244 , H01L27/3248 , H01L27/3258 , H01L51/5262
摘要： An object of the invention is to provide a light emitting device in which the variation in emission spectrum depending on an angle for seeing a surface through which light is emitted is reduced. The light emitting device of the invention includes a first insulating layer formed over a substrate, a second insulating layer formed over the first insulating layer, and a semiconductor layer formed over the second insulating layer. A gate insulating layer is formed to cover the second insulating layer and the semiconductor layer. A gate electrode is formed over the gate insulating layer. A first interlayer insulating layer is formed to cover the gate insulating layer and the gate electrode. An opening is formed through the first interlayer insulating layer, the gate insulating layer and the second insulating layer. A second interlayer insulating layer is formed to cover the first insulating layer and the opening. A light emitting element is formed over the opening.
摘要翻译：本发明的一个目的是提供一种发光装置，其中发光光谱的变化取决于用于观察发射光的表面的角度。本发明的发光器件包括形成在衬底上的第一绝缘层，形成在第一绝缘层上的第二绝缘层，以及形成在第二绝缘层上的半导体层。形成栅极绝缘层以覆盖第二绝缘层和半导体层。在栅绝缘层上形成栅电极。形成第一层间绝缘层以覆盖栅极绝缘层和栅电极。通过第一层间绝缘层，栅极绝缘层和第二绝缘层形成开口。形成第二层间绝缘层以覆盖第一绝缘层和开口。在开口上形成发光元件。

20. 发明申请

US20060071210A1 Semiconductor device and method of fabricating the same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US20060071210A1
公开(公告)日：2006-04-06
申请号：US11148289
申请日：2005-06-09
申请人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
发明人： Shunpei Yamazaki , Atsuo Isobe , Tetsuji Yamaguchi , Hiromichi Godo
IPC分类号： H01L31/0376
CPC分类号： H01L27/127 , H01L27/1214 , H01L27/1285 , H01L27/1288 , H01L27/13 , H01L29/458 , H01L29/4908 , H01L29/78621 , H01L29/78624
摘要： It is an object of the present invention to manufacture a thin film transistor having a required property without complicating steps and devices. It is another object of the present invention to provide a technique for manufacturing a semiconductor device having high reliability and better electrical characteristics with a higher yield at lower cost. In the present invention, a lightly doped impurity region is formed in a source region side or a drain region side of a semiconductor layer covered with a gate electrode layer in a thin film transistor. The semiconductor layer is doped diagonally to the surface thereof using the gate electrode layer as a mask to form the lightly doped impurity region. Therefore, the properties of the thin film transistor can be minutely controlled.
摘要翻译：本发明的目的是制造具有所需性能的薄膜晶体管，而不会使步骤和装置复杂化。本发明的另一个目的是提供一种以更低的成本制造具有高可靠性和更好的电气特性并以较高产量获得的半导体器件的技术。在本发明中，在薄膜晶体管中由栅极电极层覆盖的半导体层的源区域侧或漏极区侧形成有轻掺杂杂质区。使用栅极电极层作为掩模将半导体层以其对面的方式对角地掺杂以形成轻掺杂杂质区域。因此，可以精细地控制薄膜晶体管的性质。

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