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11. 发明申请

US20120263246A1 METHOD FOR REDUCING LATENCY ON LTE DL IMPLEMENTATION 有权
标题翻译：降低LTE DL实现延迟的方法
公开(公告)号：US20120263246A1
公开(公告)日：2012-10-18
申请号：US13086737
申请日：2011-04-14
申请人： Ido Gazit , Shai Kalfon , Sharon Rosenschein
发明人： Ido Gazit , Shai Kalfon , Sharon Rosenschein
IPC分类号： H04L27/28
CPC分类号： H04L27/2634 , H04L1/0066 , H04L5/0007 , H04L5/0044 , H04L25/03866 , H04L25/03891 , H04L27/263
摘要： An apparatus including a processor and a radio frequency (RF) interface. The processor may be configured to process downlink information such that a latency of the apparatus is determined by an amount of time involved in processing the downlink information to obtain a single orthogonal frequency division multiplexed (OFDM) symbol for presentation to the RF interface.
摘要翻译：一种包括处理器和射频（RF）接口的设备。处理器可以被配置为处理下行链路信息，使得设备的等待时间由处理下行链路信息所涉及的时间量确定以获得用于呈现给RF接口的单个正交频分复用（OFDM）符号。

12. 发明授权

US08830966B2 Discontinuous transmission in a frame 有权
标题翻译：不连续传输在一个帧
公开(公告)号：US08830966B2
公开(公告)日：2014-09-09
申请号：US13187640
申请日：2011-07-21
申请人： Shai Kalfon , Ido Gazit
发明人： Shai Kalfon , Ido Gazit
IPC分类号： H04B7/216 , H04B7/24 , H04W52/02
CPC分类号： H04B7/24 , H04W52/0216 , Y02D70/1262 , Y02D70/25 , Y02D70/448
摘要： An apparatus having a database and a circuit is disclosed. The database may be configured to store a plurality of entries. The circuit may be configured to (i) insert a plurality of indicators into a frame, (ii) generate the entries in the database and (iii) transmit the frame in response to the entries such that power is applied to an antenna corresponding to each of a plurality of data items in the frame and no power is applied to the antenna corresponding to each of the indicators in the frame. Each of the entries generally identifies a respective location in the frame. Each of the locations may begin a respective string comprising at least one of the indicators.
摘要翻译：公开了具有数据库和电路的装置。数据库可以被配置为存储多个条目。电路可以被配置为（i）将多个指示符插入到帧中，（ii）在数据库中生成条目，以及（iii）响应于条目发送帧，使得功率被施加到对应于每个的帧中的多个数据项，并且没有功率被施加到对应于帧中的每个指示符的天线。每个条目通常标识帧中的相应位置。每个位置可以开始包括至少一个指示符的相应串。

13. 发明授权

US08724722B2 Method for reducing latency on LTE DL implementation 有权
标题翻译：降低LTE DL实现延迟的方法
公开(公告)号：US08724722B2
公开(公告)日：2014-05-13
申请号：US13086737
申请日：2011-04-14
申请人： Ido Gazit , Shai Kalfon , Sharon Rosenschein
发明人： Ido Gazit , Shai Kalfon , Sharon Rosenschein
IPC分类号： H04K1/10 , H04L27/28
CPC分类号： H04L27/2634 , H04L1/0066 , H04L5/0007 , H04L5/0044 , H04L25/03866 , H04L25/03891 , H04L27/263
摘要： An apparatus including a processor and a radio frequency (RF) interface. The processor may be configured to process downlink information such that a latency of the apparatus is determined by an amount of time involved in processing the downlink information to obtain a single orthogonal frequency division multiplexed (OFDM) symbol for presentation to the RF interface.
摘要翻译：一种包括处理器和射频（RF）接口的设备。处理器可以被配置为处理下行链路信息，使得设备的等待时间由处理下行链路信息所涉及的时间量确定以获得用于呈现给RF接口的单个正交频分复用（OFDM）符号。

14. 发明申请

US20130024489A1 METHOD FOR FAST CALCULATION OF THE BEGINNING OF PSEUDO RANDOM SEQUENCES FOR LONG TERM EVOLUTION 有权
标题翻译：用于长时间演化的PSEUDO随机序列开始快速计算的方法
公开(公告)号：US20130024489A1
公开(公告)日：2013-01-24
申请号：US13184646
申请日：2011-07-18
申请人： Assaf Prihed , Ido Gazit , Shai Kalfon , Sharon Rosenschein
发明人： Assaf Prihed , Ido Gazit , Shai Kalfon , Sharon Rosenschein
IPC分类号： G06F7/58
CPC分类号： G06F7/584
摘要： An apparatus including a first circuit and a second circuit. The first circuit may be configured to generate pseudo-random sequences in response to a first m-sequence and a second m-sequence, where the first m-sequence is initialized with a pre-calculated constant and the second m-sequence is initialized based on a pre-defined initial sequence and a table of pre-calculated values indicating which components of the initial sequence participate in initializing the second m-sequence. The second circuit may be configured to store the table of pre-calculated values.
摘要翻译：一种包括第一电路和第二电路的装置。第一电路可以被配置为响应于第一m序列和第二m序列产生伪随机序列，其中第一m序列以预先计算的常数初始化，并且第二m序列被初始化在预定义的初始序列和预先计算的值的表上，指示初始序列的哪些组分参与初始化第二个m序列。第二电路可以被配置为存储预先计算的值的表。

15. 发明授权

US07738369B2 Data structure caching for PDU re-generation and transmission in a 3G wireless network 失效
标题翻译：用于在3G无线网络中重新生成和传输PDU的数据结构缓存
公开(公告)号：US07738369B2
公开(公告)日：2010-06-15
申请号：US11623906
申请日：2007-01-17
申请人： Rafael Carmon , Ido Gazit , Simon Issakov , Vladimir Kopilevitch
发明人： Rafael Carmon , Ido Gazit , Simon Issakov , Vladimir Kopilevitch
IPC分类号： H04L12/26 , H04L1/00
CPC分类号： H04W28/06 , H04W4/18 , H04W28/14
摘要： In one embodiment, a transmitter (a) caches one or more MAC-d PDUs received from a network layer, (b) selects a subset of the MAC-d PDUs for combination into a MAC-e PDU, (c) generates the MAC-e PDU from the subset of selected MAC-d PDUs, (d) caches a data structure to allow re-generation of the MAC-e PDU, wherein the re-generation does not rely on any cached copy of the MAC-e PDU, (e) transmits the MAC-e PDU for receipt by a receiver; and (f) determines whether an ACK was received, wherein if an ACK was not received, then the MAC-e PDU is re-generated using the cached data structure and the subset of selected MAC-d PDUs, and steps (e) and (f) are repeated, and if an ACK was received, then the memories used to cache the data structure and the first subset of MAC-d PDUs are freed.
摘要翻译：在一个实施例中，发射机（a）高速缓存从网络层接收的一个或多个MAC-d PDU，（b）选择用于组合的MAC-d PDU的子集到MAC-e PDU中，（c）生成MAC - 从所选MAC-d PDU的子集中获取PDU，（d）缓存数据结构以允许重新生成MAC-e PDU，其中重新生成不依赖于MAC-e PDU的任何高速缓存副本（e）发送MAC-e PDU以供接收者接收; 和（f）确定是否接收到ACK，其中如果未接收到ACK，则使用所缓存的数据结构和所选MAC-d PDU的子集来重新生成MAC-e PDU，并且步骤（e）和（f），并且如果接收到ACK，则用于缓存数据结构的存储器和MAC-d PDU的第一子集被释放。

16. 发明申请

US20130223355A1 METHOD FOR IMPLEMENTING POWER GRANT ALLOCATION IN A MAC SCHEDULER 审中-公开
标题翻译：在MAC调度器中实现功率分配的方法
公开(公告)号：US20130223355A1
公开(公告)日：2013-08-29
申请号：US13408195
申请日：2012-02-29
申请人： Ido Gazit
发明人： Ido Gazit
IPC分类号： H04W72/04
CPC分类号： H04W72/0473
摘要： An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an estimated power unit table used to store power information in response to one or more of a plurality of input parameters. The second circuit may be configured to individually allocate one or more power usage parameters to each of a plurality of mobile units through a wireless network in response to the parameters stored in said power unit table. The power usage parameters may comprise (i) an absolute power grant when in a first mode and (ii) a relative power grant when in a second mode.
摘要翻译：一种包括第一电路和第二电路的装置。第一电路可以被配置为生成用于响应于多个输入参数中的一个或多个来存储功率信息的估计功率单元表。第二电路可以被配置为响应于存储在所述功率单元表中的参数，通过无线网络向多个移动单元中的每一个单独地分配一个或多个功率使用参数。功率使用参数可以包括（i）当处于第一模式时的绝对功率授权和（ii）处于第二模式时的相对功率授权。

17. 发明申请

US20120327864A1 REDUCING COMPLEXITY OF PHYSICAL DOWNLINK CONTROL CHANNEL RESOURCE ELEMENT GROUP MAPPING ON LONG TERM EVOLUTION DOWNLINK 审中-公开
标题翻译：减少物理下行链路控制信道资源元素组合对长期演进下载映射的复杂度
公开(公告)号：US20120327864A1
公开(公告)日：2012-12-27
申请号：US13167354
申请日：2011-06-23
申请人： Ido Gazit
发明人： Ido Gazit
IPC分类号： H04W72/04
CPC分类号： H04L5/003
摘要： An apparatus including a control bit generating module and a control channel mapping module. The control bit generating module may be configured to generate control bits to be carried by at least one control channel. The control channel mapping module may be configured to map at least one control channel to resource element groups. A resource element pointer of the control channel mapping module is generally incremented by a multiple of two on each mapping iteration.
摘要翻译：一种包括控制位产生模块和控制信道映射模块的装置。控制位产生模块可以被配置为产生要由至少一个控制信道承载的控制位。控制信道映射模块可以被配置为将至少一个控制信道映射到资源元素组。控制通道映射模块的资源元素指针通常在每个映射迭代中增加两倍的倍数。

18. 发明申请

US20120324195A1 ALLOCATION OF PRESET CACHE LINES 审中-公开
标题翻译：预置高速缓存行的分配
公开(公告)号：US20120324195A1
公开(公告)日：2012-12-20
申请号：US13159653
申请日：2011-06-14
申请人： Alexander Rabinovitch , Eliahou Arviv , Ido Gazit , Leonid Dubrovin
发明人： Alexander Rabinovitch , Eliahou Arviv , Ido Gazit , Leonid Dubrovin
IPC分类号： G06F12/02
CPC分类号： G06F12/0862 , G06F2212/6022 , G06F2212/6028
摘要： An apparatus generally having a cache memory and a circuit is disclosed. The circuit may be configured to (i) parse a single first command received from a processor into a first address and a first value and (ii) allocate a first one of a plurality of lines in the cache memory to a buffer in response to the first command. The first line (a) is generally associated with the first address and (b) may have a plurality of first words. The circuit may be further configured to (iii) preset each of the first words in the first line to the first value.
摘要翻译：公开了一种通常具有高速缓冲存储器和电路的装置。电路可以被配置为（i）将从处理器接收的单个第一命令解析为第一地址和第一值，并且（ii）响应于所述缓冲器将高速缓冲存储器中的多行中的第一行分配给缓冲器第一个命令。第一行（a）通常与第一地址相关联，并且（b）可以具有多个第一个单词。该电路还可以被配置为（iii）将第一行中的每个第一个字预设为第一个值。

19. 发明申请

US20100235721A1 Rate Matching and De-Rate Matching for an LTE Transport Channel 审中-公开
标题翻译：用于LTE传输信道的速率匹配和去速率匹配
公开(公告)号：US20100235721A1
公开(公告)日：2010-09-16
申请号：US12403621
申请日：2009-03-13
申请人： Moshe Bukris , Ido Gazit
发明人： Moshe Bukris , Ido Gazit
IPC分类号： H03M13/27 , G06F11/08
CPC分类号： G06F11/10 , H03M13/271 , H03M13/2957 , H03M13/635 , H03M13/6525 , H04L1/0067 , H04L1/0071
摘要： Described embodiments provide for rate matching with an encoded sequence of data bits. The encoded sequence of data bits is divided into two or more sub-blocks, with each sub-block having at least one column of bits, each including a set of valid bits. A set of dummy bits is generated and appended to each column of each sub-block. A starting point index for the set of valid bits within each sub-block is generated and the number of bits supported by the physical layer is determined. Only the valid bits of each sub-block are interleaved, based on each starting point index, until either i) there are no valid bits remaining, or ii) the number of interleaved bits reaches the number of bits supported by the physical layer. All dummy bits and any valid bits exceeding the number of bits supported by the physical layer are omitted.
摘要翻译：所描述的实施例提供了与编码的数据比特序列的速率匹配。数据位的编码序列被分成两个或更多个子块，每个子块具有至少一列位，每一列包括一组有效位。生成一组虚拟位并将其附加到每个子块的每一列。生成每个子块内有效位集合的起点索引，并确定物理层所支持的比特数。基于每个起点索引，只有每个子块的有效比特被交织，直到i）没有剩余有效比特，或者ii）交织比特数达到物理层支持的比特数。所有虚拟位和超过物理层支持的位数的任何有效位都被省略。

20. 发明申请

US20080170516A1 DATA STRUCTURE CACHING FOR PDU RE-GENERATION AND TRANSMISSION IN A 3G WIRELESS NETWORK 失效
标题翻译： 3G无线网络中PDU重新生成和传输的数据结构缓存
公开(公告)号：US20080170516A1
公开(公告)日：2008-07-17
申请号：US11623906
申请日：2007-01-17
申请人： Rafael Carmon , Ido Gazit , Simon Issakov , Vladimir Kopilevitch
发明人： Rafael Carmon , Ido Gazit , Simon Issakov , Vladimir Kopilevitch
IPC分类号： H04B7/00
CPC分类号： H04W28/06 , H04W4/18 , H04W28/14
摘要： In one embodiment, a transmitter (a) caches one or more MAC-d PDUs received from a network layer, (b) selects a subset of the MAC-d PDUs for combination into a MAC-e PDU, (c) generates the MAC-e PDU from the subset of selected MAC-d PDUs, (d) caches a data structure to allow re-generation of the MAC-e PDU, wherein the re-generation does not rely on any cached copy of the MAC-e PDU, (e) transmits the MAC-e PDU for receipt by a receiver; and (f) determines whether an ACK was received, wherein if an ACK was received, then the MAC-e PDU is re-generated using the cached data structure and the subset of selected MAC-d PDUs, and steps (e) and (f) are repeated, and if an ACK was not received, then the memories used to cache the data structure and the first subset of MAC-d PDUs are freed.
摘要翻译：在一个实施例中，发射机（a）高速缓存从网络层接收的一个或多个MAC-d PDU，（b）选择用于组合的MAC-d PDU的子集到MAC-e PDU中，（c）生成MAC - 从所选MAC-d PDU的子集中获取PDU，（d）缓存数据结构以允许重新生成MAC-e PDU，其中重新生成不依赖于MAC-e PDU的任何高速缓存副本（e）发送MAC-e PDU以供接收者接收; 并且（f）确定是否接收到ACK，其中如果接收到ACK，则使用所缓存的数据结构和所选MAC-d PDU的子集重新生成MAC-e PDU，并且步骤（e）和（ f）被重复，并且如果没有接收到ACK，则用于缓存数据结构的存储器和MAC-d PDU的第一子集被释放。

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