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11. 发明授权

US06182248B2 Method and tool for computer bus fault isolation and recovery design verification 失效
标题翻译：计算机总线故障隔离和恢复设计验证方法与工具
公开(公告)号：US06182248B2
公开(公告)日：2001-01-30
申请号：US09056591
申请日：1998-04-07
申请人： Cynthia Joan Armstrong , Scott Leonard Daniels , Alongkorn Kitamorn , Brian Anthony Oehlke , Richard Martin Tonry
发明人： Cynthia Joan Armstrong , Scott Leonard Daniels , Alongkorn Kitamorn , Brian Anthony Oehlke , Richard Martin Tonry
IPC分类号： H02H305
CPC分类号： G06F11/221
摘要： An error injection tool, connected to a bus to be tested in such a manner as not to interfere with normal operation, is employed for error detection and recovery design verification. The error injection tool is connected to the bus to be tested within a data processing system, the system is powered on, and applications simulating normal system loading are run. A desired error is then selected, and the error injection tool is actuated. The error injection tool monitors bus cycles and transactions through selected signals and, upon detecting an appropriate cycle or transaction, overdrives a selected conductor within the bus being tested to inject an error. The selected bus conductor is overdriven (forced) to a logic high or a logic low for a single clock cycle, simulating the intermittent nature of errors likely to occur during normal operation. Bus error signals are then monitored to ascertain whether the error was successfully injected. If not, subsequent attempts during appropriate bus cycles or transaction may continue until error injection is successful. Once an error is successfully injected, the operation of fault isolation and recovery facilities for the bus being tested may be observed to ascertain whether they are properly functioning. The error injection tool is inexpensive, readily built from off-the-shelf components, easily adaptable to a variety of bus architectures, and very simple to employ.
摘要翻译：错误检测和恢复设计验证采用了以不干扰正常操作的方式连接到待测试总线的错误注入工具。错误注入工具在数据处理系统中连接到要测试的总线，系统通电，并运行模拟正常系统加载的应用程序。然后选择所需的误差，并且启动错误注入工具。错误注入工具通过所选信号监视总线周期和事务，并且在检测到适当的周期或事务后，会过动驱动被测总线内的所选导线以注入错误。所选择的总线导体在单个时钟周期内被过驱动（强制）为逻辑高电平或逻辑低电平，模拟正常运行期间可能发生的错误的间歇性。然后监测总线误差信号，以确定误差是否成功注入。如果没有，在适当的总线周期或事务期间的后续尝试可以继续，直到错误注入成功。一旦成功注入了错误，就可以观察到被测总线的故障隔离和恢复设施的操作，以确定它们是否正常工作。错误注入工具便宜，易于搭建成现成的组件，易于适应各种总线架构，并且使用起来非常简单。

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