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11. 发明授权

US08138802B2 Symmetrical electrical physical layer activity detector 有权
标题翻译：对称电物理层活动检测器
公开(公告)号：US08138802B2
公开(公告)日：2012-03-20
申请号：US13182576
申请日：2011-07-14
申请人： Scott C. McLeod
发明人： Scott C. McLeod
IPC分类号： H03K5/153
CPC分类号： H03F3/3076 , H03F3/45
摘要： A low-current differential signal activity detector circuit may be configured to reject large common mode signals on differential input lines, while still detecting smaller differential signals applied to the same set of differential input lines. The detector circuit may comprise a translinear buffer that is driven at the buffer input and at the buffer output by the differential input signals. The differential signal thereby driving the inputs of the detector circuit may be half-wave rectified through the buffer output devices and may be filtered to provide the detected output. When applying a common mode signal, the buffer's input and output may track each other, and no current may be rectified in the output devices, thus providing common-mode signal rejection. The detector circuit may also be configured with two buffers having their outputs coupled to a common node, each buffer input driven by a respective one of the differential input signals. The differential signal thereby driving the inputs of the detector circuit may be fully rectified through the output devices of the two buffers, and may be filtered to provide the detected output. The two buffers may be configured in a symmetrical structure that allows for the rejection of common-mode signals when the outputs of the buffers are coupled to a common node.
摘要翻译：低电流差分信号活动检测器电路可以被配置为在差分输入线上抑制大的共模信号，同时仍然检测到施加到同一组差分输入线的较小的差分信号。检测器电路可以包括在缓冲器输入处被驱动并且通过差分输入信号在缓冲器输出处被驱动的跨线性缓冲器。因此驱动检测器电路的输入的差分信号可以通过缓冲器输出装置进行半波整流，并且可以被滤波以提供检测的输出。当应用共模信号时，缓冲器的输入和输出可以彼此跟踪，并且在输出设备中不会纠正电流，从而提供共模信号抑制。检测器电路还可以配置有两个缓冲器，其具有耦合到公共节点的输出，每个缓冲器输入由差分输入信号中的相应一个驱动。由此驱动检测器电路的输入的差分信号可以通过两个缓冲器的输出装置完全整流，并且可以被滤波以提供检测到的输出。两个缓冲器可以配置成对称结构，当缓冲器的输出耦合到公共节点时允许抑制共模信号。

12. 发明申请

US20100213917A1 Frequency Compensation Scheme for Stabilizing the LDO Using External NPN in HV Domain 有权
标题翻译：使用外部NPN在HV域中稳定LDO的频率补偿方案
公开(公告)号：US20100213917A1
公开(公告)日：2010-08-26
申请号：US12389581
申请日：2009-02-20
申请人： Srinivas K. Pulijala , Scott C. McLeod
发明人： Srinivas K. Pulijala , Scott C. McLeod
IPC分类号： G05F1/00
CPC分类号： G05F1/575
摘要： A voltage regulator may comprise a regulator output configured to provide a regulated voltage, which may be controlled by an error amplifier based on the regulated voltage and a reference voltage. The error amplifier may control a source-follower stage to mirror a multiple of the current flowing in the source-follower stage into an internal pass device. A voltage developed by the mirror current may control an external pass device configured to deliver the load current into the regulator output. A first resistor may be configured to decouple a load capacitor coupled between the regulator output and reference ground, when the load current is below a specified value. A second resistor may be configured to create a bias current in the internal pass device even when the external pass device is close to cut-off region. A third resistor may be configured to counter the effects of negative impedance at the control terminal of the external pass device caused by the current-gain of the external pass device. A compensation capacitor and resistor may be coupled in series between the output of the error amplifier and the output of the voltage regulator to provide frequency compensation for the Miller-Effect.
摘要翻译：电压调节器可以包括被配置为提供调节电压的调节器输出，其可以由基于调节电压和参考电压的误差放大器控制。误差放大器可以控制源极跟随器级将在源极跟随器级中流动的电流的倍数镜像成内部通过器件。由反射镜电流产生的电压可以控制配置成将负载电流传递到调节器输出中的外部通过装置。当负载电流低于规定值时，第一电阻器可以被配置为去耦耦合在调节器输出端和参考地之间的负载电容器。第二电阻器可以被配置为在内部通路器件中产生偏置电流，即使当外部通过器件接近截止区域时。第三电阻器可以被配置为对抗由外部通过器件的电流增益引起的外部通过器件的控制端子处的负阻抗的影响。补偿电容器和电阻器可以串联耦合在误差放大器的输出端和电压调节器的输出端之间，为米勒效应提供频率补偿。

13. 发明授权

US07545214B2 Class AB rail-to-rail input and output operational amplifier 有权
标题翻译： AB类轨至轨输入和输出运算放大器
公开(公告)号：US07545214B2
公开(公告)日：2009-06-09
申请号：US11742516
申请日：2007-04-30
申请人： Madan G. Rallabandi , Scott C. McLeod
发明人： Madan G. Rallabandi , Scott C. McLeod
IPC分类号： H03F3/45
CPC分类号： H03F3/3022 , H03F3/45219 , H03F2203/45032 , H03F2203/45091
摘要： An operational amplifier including an input stage. The input stage may include first and second differential input circuits and a first current mirror. When an input terminal of the operational amplifier is at a positive voltage rail, the first differential input circuit may be activated. When the input terminal is at a negative voltage rail, the second differential input circuit may be activated. In either case, this may cause the first current mirror to provide a current of a predetermined value to each of first and second input terminals of a control circuit, and to each of first and second nodes coupled to a rail-to-rail output stage. The input stage may maintain the current provided to each of the input terminals of the control circuit and to each of the nodes coupled to the rail-to-rail output stage constant over the full input voltage range from the negative voltage rail to the positive voltage rail.
摘要翻译：包括输入级的运算放大器。输入级可以包括第一和第二差分输入电路和第一电流镜。当运算放大器的输入端处于正电压轨时，第一差分输入电路可以被激活。当输入端子处于负电压轨时，可以激活第二差分输入电路。在任一种情况下，这可能使得第一电流镜向控制电路的第一和第二输入端子中的每一个提供预定值的电流，并且耦合到轨至轨输出级的每个第一和第二节点。输入级可以保持提供给控制电路的每个输入端的电流以及耦合到轨到轨输出级的每个节点在从负电压轨到正电压的整个输入电压范围内恒定轨。

14. 发明申请

US20080165465A1 Current Limiting Protection Circuit 有权
标题翻译：限流保护电路
公开(公告)号：US20080165465A1
公开(公告)日：2008-07-10
申请号：US11621595
申请日：2007-01-10
申请人： Madan G. Rallabandi , Scott C. McLeod
发明人： Madan G. Rallabandi , Scott C. McLeod
IPC分类号： H02H9/08
CPC分类号： G05F1/573
摘要： A power supply management device including a current limiting protection circuit. The power supply management device may include an output terminal, a first transistor, a replication circuit, a comparator circuit, and a control circuit. The first transistor may provide an output current to the output terminal of the power supply management device. The replication circuit may be connected to the first transistor and may replicate the output current to a separate path to monitor the output current. The comparator circuit may be connected to the replication circuit and may compare the replicated output current to a current reference. The control circuit may be connected to the first transistor and to the comparator circuit. In response to the replicated output current being greater than the current reference, the control circuit may limit the output current the first transistor provides to the output terminal to an amount corresponding to the current reference.
摘要翻译：一种电源管理装置，包括限流保护电路。电源管理装置可以包括输出端子，第一晶体管，复制电路，比较器电路和控制电路。第一晶体管可以向电源管理装置的输出端提供输出电流。复制电路可以连接到第一晶体管，并且可以将输出电流复制到单独的路径以监视输出电流。比较器电路可以连接到复制电路，并且可以将复制的输出电流与电流参考进行比较。控制电路可以连接到第一晶体管和比较器电路。响应于复制的输出电流大于电流基准，控制电路可以将第一晶体管提供给输出端的输出电流限制为对应于电流参考的量。

15. 发明授权

US07332952B2 Accurate temperature measurement method for low beta transistors 有权
标题翻译：低β晶体管的精确温度测量方法
公开(公告)号：US07332952B2
公开(公告)日：2008-02-19
申请号：US11286706
申请日：2005-11-23
申请人： Scott C. McLeod , Aniruddha Bashar
发明人： Scott C. McLeod , Aniruddha Bashar
IPC分类号： H03K17/78
CPC分类号： G01K7/01
摘要： An accurate temperature monitoring system that uses a precision current control circuit to apply accurately ratioed currents to a semiconductor device, which may be a bipolar junction transistor (BJT), used for sensing temperature. A change in base-emitter voltage (ΔVBE) proportional to the temperature of the BJT may be captured and provided to an ADC, which may generate a numeric value corresponding to that temperature. The precision current control circuit may be configured to generate a reference current, capture the base current of the BJT, generate a combined current equivalent to a sum total of the base current and a multiple of the reference current, and provide the combined current to the emitter of the BJT. In response to this combined current, the collector current of the BJT will be equivalent to the multiple of the reference current. The ratios of the various collector currents conducted by the BJT may thus be accurately controlled, leading to more accurate temperature measurements.
摘要翻译：一种精确的温度监测系统，其使用精密电流控制电路将精确比例的电流施加到用于感测温度的半导体器件（可以是双极结型晶体管（BJT））。可以捕获与BJT的温度成比例的基极 - 发射极电压（DeltaV BAT）的变化，并将其提供给ADC，该ADC可产生对应于该温度的数值。精密电流控制电路可以被配置为产生参考电流，捕获BJT的基极电流，产生等于基极电流的总和和参考电流的倍数的组合电流，并将组合电流提供给发射器。响应于该组合电流，BJT的集电极电流将等于参考电流的倍数。因此，可以精确地控制由BJT传导的各种集电极电流的比率，从而导致更准确的温度测量。

16. 发明授权

US07030793B2 Accurate testing of temperature measurement unit 有权
标题翻译：温度测量单元的精确测试
公开(公告)号：US07030793B2
公开(公告)日：2006-04-18
申请号：US10781063
申请日：2004-02-18
申请人： Scott C. McLeod , William Castellano
发明人： Scott C. McLeod , William Castellano
IPC分类号： H03M1/06
CPC分类号： G01K15/00 , G01K7/01
摘要： Various embodiments of a method and apparatus for simulating temperature characteristics of a diode are disclosed. The output of a diode simulator may not depend upon its ambient temperature. Therefore, it may be used to calibrate a temperature measurement unit at any ambient temperature within its operational range regardless of the temperature to which the temperature measurement unit is to be calibrated. Even if the ambient temperature of the facility in which the calibration is performed varies during the calibration procedure, the output of the diode simulator may remain constant. These characteristics of the diode simulator may allow for calibration of a temperature measurement unit in significantly less time than by using prior art methods, which include the requirement to tightly control the temperature of one or more system components.
摘要翻译：公开了用于模拟二极管的温度特性的方法和装置的各种实施例。二极管模拟器的输出可能不取决于其环境温度。因此，无论温度测量单元要被校准的温度如何，它都可用于在其工作范围内的任何环境温度下校准温度测量单元。即使执行校准的设备的环境温度在校准过程中变化，二极管模拟器的输出也可保持恒定。二极管模拟器的这些特性可以允许温度测量单元的校准要比使用现有技术方法显着更少的时间进行校准，其中包括要严格控制一个或多个系统组件的温度的要求。

17. 发明授权

US08299577B2 Fringe capacitor using bootstrapped non-metal layer 有权
标题翻译：边缘电容器采用自举非金属层
公开(公告)号：US08299577B2
公开(公告)日：2012-10-30
申请号：US13303437
申请日：2011-11-23
申请人： Scott C. McLeod
发明人： Scott C. McLeod
IPC分类号： H01L29/00
CPC分类号： H01L23/5223 , H01L28/87 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A switched-capacitor circuit on a semiconductor device may include accurately matched, high-density metal-to-metal capacitors, using top-plate-to-bottom-plate fringe-capacitance for obtaining the desired capacitance values. A polysilicon plate may be inserted below the bottom metal layer, and bootstrapped to the top plate of each capacitor in order to minimize and/or eliminate the parasitic top-plate-to-substrate capacitance. This may free up the bottom metal layer to be used in forming additional fringe-capacitance, thereby increasing capacitance density. By forming each capacitance solely based on fringe-capacitance from the top plate to the bottom plate, no parallel-plate-capacitance is used, which may reduce capacitor mismatch. Parasitic bottom plate capacitance to the substrate may also be eliminated, with only a small capacitance to the bootstrapped polysilicon plate remaining. The capacitors may be bootstrapped by coupling the top plate of each capacitor to a respective one of the differential inputs of an amplifier comprised in the switched-capacitor circuit.
摘要翻译：半导体器件上的开关电容器电路可以包括精确匹配的高密度金属 - 金属电容器，使用顶板到底板条纹电容来获得所需的电容值。多晶硅板可以插入底部金属层的下面，并且自举到每个电容器的顶板，以便最小化和/或消除寄生顶板对衬底电容。这可以释放用于形成额外的边缘电容的底部金属层，从而增加电容密度。通过仅根据从顶板到底板的边缘电容形成每个电容，不使用平行板电容，这可以减少电容器失配。也可以消除与衬底的寄生底板电容，仅剩余少量的自举多晶硅板的电容。电容器可以通过将每个电容器的顶板耦合到开关电容器电路中包括的放大器的差分输入中的相应一个来自举。

18. 发明授权

US08237599B2 Analog-to-digital converter in a motor control device 有权
标题翻译：电机控制装置中的模数转换器
公开(公告)号：US08237599B2
公开(公告)日：2012-08-07
申请号：US12627734
申请日：2009-11-30
申请人： Joe A. Marrero , Lynn R. Kern , Scott C. McLeod
发明人： Joe A. Marrero , Lynn R. Kern , Scott C. McLeod
IPC分类号： H03M1/56
CPC分类号： H03K7/08 , H03M1/56
摘要： System and method for digitizing analog voltage signals. A first voltage signal may be received at a comparator. A ramp signal may be received at the comparator. The ramp signal may be generated by a ramp generator. An output signal may be generated by the comparator. The output signal may indicate whether the analog voltage signal or the ramp signal is greater. The output signal may be conveyed to logic circuitry by the comparator. Control information may be conveyed by the logic circuitry to the ramp generator. The ramp generator may generate the ramp signal based on the control information. The logic circuitry may determine a digital representation of the first voltage signal based on the output signal from the comparator and the control information.
摘要翻译：数字化模拟电压信号的系统和方法。可以在比较器处接收第一电压信号。可以在比较器处接收斜坡信号。斜坡信号可以由斜坡发生器产生。输出信号可以由比较器产生。输出信号可以指示模拟电压信号或斜坡信号是否较大。输出信号可以由比较器传送到逻辑电路。控制信息可以由逻辑电路传送到斜坡发生器。斜坡发生器可以基于控制信息产生斜坡信号。逻辑电路可以基于来自比较器的输出信号和控制信息来确定第一电压信号的数字表示。

19. 发明申请

US20120092068A1 Fringe Capacitor Using Bootstrapped Non-Metal Layer 有权
标题翻译：边缘电容器使用自举非金属层
公开(公告)号：US20120092068A1
公开(公告)日：2012-04-19
申请号：US13303437
申请日：2011-11-23
申请人： Scott C. McLeod
发明人： Scott C. McLeod
IPC分类号： H03F3/45 , H02J4/00 , H01L27/06
CPC分类号： H01L23/5223 , H01L28/87 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A switched-capacitor circuit on a semiconductor device may include accurately matched, high-density metal-to-metal capacitors, using top-plate-to-bottom-plate fringe-capacitance for obtaining the desired capacitance values. A polysilicon plate may be inserted below the bottom metal layer, and bootstrapped to the top plate of each capacitor in order to minimize and/or eliminate the parasitic top-plate-to-substrate capacitance. This may free up the bottom metal layer to be used in forming additional fringe-capacitance, thereby increasing capacitance density. By forming each capacitance solely based on fringe-capacitance from the top plate to the bottom plate, no parallel-plate-capacitance is used, which may reduce capacitor mismatch. Parasitic bottom plate capacitance to the substrate may also be eliminated, with only a small capacitance to the bootstrapped polysilicon plate remaining. The capacitors may be bootstrapped by coupling the top plate of each capacitor to a respective one of the differential inputs of an amplifier comprised in the switched-capacitor circuit.
摘要翻译：半导体器件上的开关电容器电路可以包括精确匹配的高密度金属 - 金属电容器，使用顶板到底板条纹电容来获得所需的电容值。多晶硅板可以插入底部金属层的下面，并且自举到每个电容器的顶板，以便最小化和/或消除寄生顶板对衬底电容。这可以释放用于形成额外的边缘电容的底部金属层，从而增加电容密度。通过仅根据从顶板到底板的边缘电容形成每个电容，不使用平行板电容，这可以减少电容器失配。也可以消除与衬底的寄生底板电容，仅剩余少量的自举多晶硅板的电容。电容器可以通过将每个电容器的顶板耦合到开关电容器电路中包括的放大器的差分输入中的相应一个来自举。

20. 发明申请

US20110291675A1 Bi-Directional High Side Current Sense Measurement 有权
标题翻译：双向高边电流检测
公开(公告)号：US20110291675A1
公开(公告)日：2011-12-01
申请号：US12788896
申请日：2010-05-27
申请人： Madan G. Rallabandi , Scott C. McLeod
发明人： Madan G. Rallabandi , Scott C. McLeod
IPC分类号： G01R27/26
CPC分类号： G01R19/10 , G01R1/203
摘要： A system for measuring a voltage drop between two nodes in an electrical circuit, comprising a switched capacitor integrator (SCI), a comparator and a counter. The SCI alternately (a) captures charge onto a set of sampling capacitors and (b) selectively accumulates/transfers the charge onto a pair of integration capacitors, where the charge includes a first portion that is based on the voltage drop and a second portion that depends on a digital indicator signal. The comparator generates the digital indicator signal based on whether an analog output of the SCI is positive or negative. The counter counts a number of ones occurring in the digital indicator signal during a measurement interval. At the end of the measurement interval, the count value represents a measure of the voltage drop. Knowing the resistance between the two nodes, the voltage drop may be converted into a current measurement.
摘要翻译：一种用于测量电路中两个节点之间的电压降的系统，包括开关电容积分器（SCI），比较器和计数器。 SCI交替地（a）将电荷捕获到一组采样电容器上，并且（b）选择性地将电荷累积/传送到一对积分电容器，其中电荷包括基于电压降的第一部分和第二部分，取决于数字指示灯信号。比较器根据SCI的模拟输出是正还是负，产生数字指示信号。在测量间隔期间，计数器对数字指示信号中发生的数目进行计数。在测量间隔结束时，计数值表示电压降的度量。知道两个节点之间的电阻，电压降可以转换为电流测量。

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