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    • 11. 发明申请
    • DISPLAY APPARATUS HAVING REDUCED KICKBACK VOLTAGE
    • 具有减少KICKBACK电压的显示设备
    • US20090262058A1
    • 2009-10-22
    • US12327256
    • 2008-12-03
    • Sang-Jin PAKYoung-Ok CHA
    • Sang-Jin PAKYoung-Ok CHA
    • G09G3/36
    • G09G3/3648G09G3/3677G09G2300/0426G09G2310/0283G09G2310/08G09G2320/0219G09G2340/0492
    • A display apparatus includes; a display panel including a plurality of data lines which receive a data signal, a plurality of gate lines which receive a gate signal and a plurality of pixels, a data driving circuit which provides the data liens with the data signal, and a gate driving circuit which sequentially applies the gate signal to the plurality of gate lines, wherein an area between an ith gate line and an (i+1)th gate line is divided into a plurality of areas by the plurality of data lines, and wherein each area includes first and second pixel areas which are aligned in an extension direction of the data lines, and the first pixel area and the second pixel area are provided with a first pixel connected to the ith gate line and a second pixel connected to the (i+1)th gate line, respectively.
    • 显示装置包括: 显示面板,包括接收数据信号的多条数据线,接收门信号和多个像素的多条栅极线,向数据信号提供数据留置的数据驱动电路,以及栅极驱动电路 其顺序地将栅极信号施加到多条栅极线,其中,第i栅极线与第(i + 1)栅极线之间的区域被多条数据线划分成多个区域,并且其中每个区域包括 在数据线的延伸方向上对准的第一和第二像素区域,并且第一像素区域和第二像素区域设置有连接到第i个栅极线的第一像素和连接到第(i + 1个) )门线。
    • 13. 发明申请
    • DISPLAY DEVICE
    • 显示设备
    • US20100118220A1
    • 2010-05-13
    • US12434191
    • 2009-05-01
    • Yong-Kyu JANGSang-Jin PAK
    • Yong-Kyu JANGSang-Jin PAK
    • G02F1/1335G02F1/1343
    • G09G3/3648G02F1/133555G02F1/136213G02F1/13624G02F2001/134345G09G3/3655G09G2300/0426G09G2300/043G09G2300/0456G09G2300/0852G09G2300/0876G09G2310/0205G09G2310/0251
    • A display device, including a lower substrate; an upper substrate disposed opposite to the lower substrate; a liquid crystal layer interposed between the lower substrate and the upper substrate; and a plurality of pixels, each of the pixels including at least one reflective electrode and at least one transparent electrode; the reflective electrodes and the transparent electrodes disposed on the lower substrate and electrically insulated from each other, wherein a reflective region corresponds to a region of the reflective electrodes and a transmissive region corresponds to a region of the transparent electrodes, and when a display luminance in the reflective region and the transmissive region is increased, a first voltage applied to the liquid crystal layer in one of the reflective region and the transmissive region is increased and a second voltage applied to the liquid crystal layer in the other of the reflective region and the transmissive region is decreased.
    • 一种显示装置,包括下基板; 与所述下基板相对设置的上基板; 插入在下基板和上基板之间的液晶层; 和多个像素,每个像素包括至少一个反射电极和至少一个透明电极; 所述反射电极和所述透明电极设置在所述下基板上并且彼此电绝缘,其中反射区域对应于所述反射电极的区域,并且透射区域对应于所述透明电极的区域,并且当显示亮度 反射区域和透射区域增加,施加到反射区域和透射区域之一中的液晶层的第一电压增加,并且施加到反射区域中的另一个中的液晶层的第二电压和 透射区域减少。
    • 14. 发明申请
    • GATE DRIVING CIRCUIT AND DISPLAY APPARATUS USING THE SAME
    • 门控驱动电路和使用它的显示设备
    • US20130249884A1
    • 2013-09-26
    • US13596496
    • 2012-08-28
    • Cheol-Min KIMSang-Jin PAKMin-Seok BAE
    • Cheol-Min KIMSang-Jin PAKMin-Seok BAE
    • G09G3/36G06F3/038H03K3/00
    • G09G3/3677G09G2310/0286G11C19/28
    • A gate driving circuit includes a plurality of stages, each stage including an input unit to determine a level of voltage to input to a first node based on the first and second input signals and the first clock signal that is input according to the level of the voltage input to the first node and a first gate-off voltage that is input in response to the second clock signal, a second driving unit outputting the gate signals based on the third clock signal input according to the voltage input to the first node and a second gate-off voltage input in response to the second clock signal, and a leakage blocking unit blocking leakage current of a transistor by maintaining a level of voltage input to a third node connected to the first node via at least one transistor.
    • 门驱动电路包括多级,每级包括输入单元,用于基于第一和第二输入信号确定输入到第一节点的电压电平,以及根据第一输入信号的电平输入的第一时钟信号 输入到第一节点的电压和响应于第二时钟信号输入的第一栅极截止电压;第二驱动单元,基于根据输入到第一节点的电压输入的第三时钟信号,以及 响应于第二时钟信号的第二栅极截止电压输入,以及泄漏阻断单元,通过经由至少一个晶体管维持输入到连接到第一节点的第三节点的电压电平来阻止晶体管的漏电流。